GXemul Code2

Status: Alpha

Brought to you by: gavare

Commit [r4454] Maximize Restore History

Adding disassembly support for more MIPS64 revision 2 opcodes (seb, seh, wsbh, jalr.hb, jr.hb, synci, ins, dins, dinsu, dinsm, dsbh, dshd, ror, dror, rorv, drorv, dror32). Also implementing seb, seh, dsbh, dshd, and wsbh.

Authored by: debug 2006-09-30

Browse code at this revision

Parent: [r4453]

Child: [r4455]

changed	/gxemul-legacy/trunk/HISTORY
changed	/gxemul-legacy/trunk/TODO
changed	/gxemul-legacy/trunk/src/cpus/cpu_mips.c
changed	/gxemul-legacy/trunk/src/cpus/cpu_mips_instr.c
changed	/gxemul-legacy/trunk/src/include/opcodes_mips.h

GXemul Code2

Commit [r4454] Maximize Restore History

/gxemul-legacy/trunk/HISTORY Diff Switch to side-by-side view

/gxemul-legacy/trunk/TODO Diff Switch to side-by-side view

/gxemul-legacy/trunk/src/cpus/cpu_mips.c Diff Switch to side-by-side view

/gxemul-legacy/trunk/src/cpus/cpu_mips_instr.c Diff Switch to side-by-side view

/gxemul-legacy/trunk/src/include/opcodes_mips.h Diff Switch to side-by-side view