I just got a MMU address mapping problem on PXA270. Wondering maybe someone
here can help me out of that issue.
Basically what i want to do is to use high-end address as the vector table
by enabling V bit of MMU register. I would like to put my vector table at
address 0xFFFF0000~0xFFFF001C. This 0xFFFF0000 memory range is mapped from
SDRAM memory 0xA3FF0000~0xA3FF001C. The big page (1M bytes) mapping is
enabled in MMU and page tables.
The actual problem is that vector table is placed to high-end address which
has no problem, but only reset address is mapping to the real reset branch
instruction, and only the reset vector's content can be changed, all the
other vectors' contents look like not mapping to 0xA3FF0004~0xA3FF001C, or
mapping to wrong addresses. Here's the data in physical address and virtual
0xA3FF0000 -- EA 00 00 06 0xFFFF0000 -- EA FF FF 06
0xA3FF0004 -- EA 00 00 06 0xFFFF0004 -- EA FF FF FD
0xA3FF0008 -- EA 00 00 06 0xFFFF0008 -- EA FF FF FC
0xA3FF000C -- EA 00 00 06 0xFFFF000C -- EA FF FF FB
0xA3FF0010 -- EA 00 00 06 0xFFFF0010 -- EA FF FF FA
0xA3FF0014 -- EA 00 00 06 0xFFFF0014 -- EA FF FF F9
0xA3FF0018 -- EA 00 00 06 0xFFFF0018 -- EA FF FF F8
0xA3FF001C -- EA 00 00 06 0xFFFF001C -- EA FF FF F7
But it doesn't make sense, since the 1M bytes starting from 0xA3FF0000 are
mapped to 0xFFFF0000, all the other data are mapped correctly, except the
Does anybody know why?
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