Hi Dave,
thank you for your reply.
I do the work again and record it as follow, and I notice there are two errors when I use the 'i2c_bus=3,100' and reboot. Does this mean that the 'i2c_bus=3,100' don't work. At last, it shows i2c_omap i2c_omap.3: bus 3 rev3.12 at 400 kHz, the bus data rate do not change. You said  setting a variable like i2c_bus only works if there is another
command that puts it into bootargs, can you tell me the details how to do it. And I wonder if there is any way to change
that data rate after login the system like config the wifi,ssh.
Thank you.

Texas Instruments X-Loader 1.4.4ss (Nov 15 2010 - 08:42:50)
OMAP3503-GP ES3.1
Board revision: 0
Reading boot sector
Loading u-boot.bin from mmc

U-Boot 2010.09 (Nov 15 2010 - 08:50:11)

OMAP3503-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 600 mHz
Gumstix Overo board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
NAND:  256 MiB
In:    serial
Out:   serial
Err:   serial
Board revision: 0
Tranceiver detected on mmc2
No EEPROM on expansion board
Die ID #52c800240000000004035c140e02300a
Net:   No ethernet found.
Hit any key to stop autoboot:  0
Overo # printenv
bootcmd=if mmc init; then if run loadbootscript; then run bootscript; else if run loaduimage; then run mmcboot; else run nandboot; fi; fi; else run nandboot; fi
mmcroot=/dev/mmcblk0p2 rw
mmcrootfstype=ext3 rootwait
nandroot=/dev/mtdblock4 rw
mmcargs=setenv bootargs console=${console} mpurate=${mpurate} vram=${vram} omapfb.mode=dvi:${dvimode} omapfb.debug=y omapdss.def_disp=${defaultdisplay} root=${mmcroot} rootfstype=${mmcrootfstype}
nandargs=setenv bootargs console=${console} mpurate=${mpurate} vram=${vram} omapfb.mode=dvi:${dvimode} omapfb.debug=y omapdss.def_disp=${defaultdisplay} root=${nandroot} rootfstype=${nandrootfstype}
loadbootscript=fatload mmc 0 ${loadaddr} boot.scr
bootscript=echo Running bootscript from mmc ...; source ${loadaddr}
loaduimage=fatload mmc 0 ${loadaddr} uImage
mmcboot=echo Booting from mmc ...; run mmcargs; bootm ${loadaddr}
nandboot=echo Booting from nand ...; run nandargs; nand read ${loadaddr} 280000 400000; bootm ${loadaddr}
bootargs=init=/bin/sh init=/bin/sh

Environment size: 1244/131068 bytes
Overo # showvar
Overo # i2c_bus=3,100
Overo # showvar
Overo # boot
I2C read: I/O error
I2C read: I/O error
mmc1 is available
reading boot.scr

** Unable to read "boot.scr" from mmc 0:1 **
reading uImage

2899544 bytes read
Booting from mmc ...
## Booting kernel from Legacy Image at 82000000 ...
   Image Name:   Angstrom/2.6.35/overo
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2899480 Bytes = 2.8 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.35 (steve@www.sakoman.com) (gcc version 4.3.3 (GCC) ) #1 Mon Nov 15 08:58:53 PST 2010
CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: Gumstix Overo
Memory policy: ECC disabled, Data cache writeback
OMAP3525 ES3.1 (l2cache iva neon isp )
SRAM: Mapped pa 0x40200000 to va 0xfe400000 size: 0x100000
Reserving 12582912 bytes SDRAM for VRAM
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 65024
Kernel command line: console=ttyS2,115200n8 mpurate=500 vram=12M omapfb.mode=dvi:1024x768MR-16@60 omapfb.debug=y omapdss.def_disp=dvi root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 128MB 128MB = 256MB total
Memory: 241616k/241616k available, 20528k reserved, 0K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xd0800000 - 0xf8000000   ( 632 MB)
    lowmem  : 0xc0000000 - 0xd0000000   ( 256 MB)
    modules : 0xbf000000 - 0xc0000000   (  16 MB)
      .init : 0xc0008000 - 0xc0030000   ( 160 kB)
      .text : 0xc0030000 - 0xc0548000   (5216 kB)
      .data : 0xc056c000 - 0xc05ab520   ( 254 kB)
Hierarchical RCU implementation.
    RCU-based detection of stalled CPUs is disabled.
    Verbose stalled-CPUs detection is disabled.
Clocking rate (Crystal/Core/MPU): 26.0/224/500 MHz
omap_hwmod: l3_hwmod: cannot be enabled (3)
omap_hwmod: l4_core_hwmod: cannot be enabled (3)
omap_hwmod: l4_per_hwmod: cannot be enabled (3)
omap_hwmod: l4_wkup_hwmod: cannot be enabled (3)
Reprogramming SDRC clock to 224791666 Hz
dpll3_m2_clk rate change failed: -22
GPMC revision 5.0
IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts
Total of 96 interrupts on 1 active controller
OMAP GPIO hardware version 2.5
OMAP clockevent source: GPTIMER1 at 32768 Hz
Console: colour dummy device 80x30
Calibrating delay loop... 499.92 BogoMIPS (lpj=1949696)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
regulator: core version 0.5
NET: Registered protocol family 16
Found NAND on CS0
Switched to new clocking rate (Crystal/Core/MPU): 26.0/500/224 MHz
OMAP DMA hardware revision 4.0
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
i2c_omap i2c_omap.1: bus 1 rev3.12 at 2600 kHz
twl4030: PIH (irq 7) chaining IRQs 368..375
twl4030: power (irq 373) chaining IRQs 376..383
twl4030: gpio (irq 368) chaining IRQs 384..401
regulator: VUSB1V5: 1500 mV normal standby
regulator: VUSB1V8: 1800 mV normal standby
regulator: VUSB3V1: 3100 mV normal standby
twl4030_usb twl4030_usb: Initialized TWL4030 USB module
regulator: VMMC1: 1850 <--> 3150 mV at 3000 mV normal standby
regulator: VDAC: 1800 mV normal standby
regulator: VDVI: 1800 mV normal standby
i2c_omap i2c_omap.3: bus 3 rev3.12 at 400 kHz