It appears that the pic12f1571 has an incorrect ending address for linear_ram_addrs in static struct px pics[] in gpprocessor.c. The end address is 0x206F, indicating 112 general purpose registers, but per the datasheet, this processor has 128 general purpose registers. I think the end address should be 0x207F.
The entry for the pic12F1572 has a linear_ram_addrs end address of 0x20EF, which matches the 240 general purpose registers indicated by the datasheet.
The entry for the pic12F1822 has a linear_ram_addrs end address of 0x206F, matching the 112 general purpose registers indicated by its datasheet. Hopefully the 12F1571 definition is an isolated copy/paste error.
Anonymous
The form only accepts one attachment at a time. I can do two here because it lets me edit comments, but I don't think I can edit the original request...
Last edit: Ben Tesch 2020-11-01
The datasheet is inconsistent and GPUtils is correct, I believe. If you look closely at your third attachment, the one that shows "48 bytes" of RAM in page 1, you'll see that the address range is A0 to BF - which is only 32 bytes and matches the 1822. Since the datasheet also specifies that the 1571 has 128 bytes RAM in total, including the 16 bytes shared RAM, the 112 byte linear region is correct.
The linear memory size is indeed incorrect. This is because the lkr file used as the source also contains incorrect data:
The content of struct px pics[] is generated by a script based on the content of the inc and lkr files. That's why the error may have been introduced. I need to correct the lkr files. There have been examples of this before.
Thanks for the bug report. Version [r1326] is now free of this bug.
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Commit: [r1326]
I'm sorry to say this but this "fix" needs reverting as the bug report is in error.
The relevant page of the datasheet contains misleading information.