#13 Does simulating TIMER2 in pic16f716 work?

[John Coppens]

I wrote a very simplistic program to start TIMER2, basically just setting PR2 to 63, prescaler to 1:1, Postscaler to 1:1, and enable the timer, but I never see it change in the simulator (while Timer0 _is_counting normally). Of course no comparison occurs with PR2, so TMR2IF is never set. This is the code:

    movlw   0x8f        ; Set OPTION_REG
    bsf     0x03, 0x5   ; RB1
    movwf   0x01

    movlw   0x03        ; Some bits in TRISB set to output
    movwf   0x06

    movlw   0x3f        ; Set PR2 to 63
    movwf   0x12        

    bcf     0x03, 0x5   ; RB0
    bcf     0x0c, 0x1   ; Reset TMR2IF
    movlw   0x04        ; Start TIMER2, no pre- or post-scaling
    movwf   0x12
here:
    goto    here

In the register window, TMR2 doesn't change (no counting). Of course, no hit with PR2, and no TMR2IF.

Is this normal, or am I forgetting something here? Or is 16F716 incomplete?

[Roy Rankin]

John,

I can confirm that tmr2 does not work with your program in 0.30.0, Howeve, it does work with the svn version 0.30.1. I can see I need to create a new release when I finish my cureent efforts of adding p16f1705, p16f1709 processors.

Roy

[John Coppens]

On Mon, 13 May 2019 02:42:44 -0000
"Roy Rankin" roy_r_rankin@users.sourceforge.net wrote:

I can confirm that tmr2 does not work with your program in 0.30.0,
Howeve, it does work with the svn version 0.30.1. I can see I need
to create a new release when I finish my cureent efforts of adding
p16f1705, p16f1709 processors.

I downloaded the SVN version, and the TIMER2 is now working, but there
still seem to existe some issues:

• The test program worked fine,
• but when I enable the PWM, it seems as if the PR2 registered is not
  checked anymore. TMR2 increments over the PR2 limit.
• sometimes, when counting over 255, the counter just stops (even with
  T2CON still set correctly and TMR2ON enabled.

I now hit the > 256 error:

...
114: bcf STATUS,RP0
Wrote: 0x0019 to status(0x0003) was 0x0039
0x00000000000000E5 p16f716 0x0019 0x0191 clrf tmr2
115: clrf TMR2
Wrote: 0x0000 to tmr2(0x0011) was 0x000A
Wrote: 0x001D to status(0x0003) was 0x0019
TMR2 BUG!! value = 0x4294967287 which is greater than 0x256
...

On line 115, clrf writes 0 to TMR2, which becomes 0x4294967287 (known
error).

John

[John Coppens]

Roy, thanks! As always very attentive... Have these changes been commited to SVN? I did not see any comment yet.

[Roy Rankin]

John,

It looks like there is a bug in gpsim. Documentation says to start T2 last when setting up PWM. This is currently not working in gpsim. If I start T2 before enabling PWM in CCP1CON it works OK.

Roy

[John Coppens]

On Tue, 14 May 2019 12:04:18 -0000
"Roy Rankin" roy_r_rankin@users.sourceforge.net wrote:

It looks like there is a bug in gpsim. Documentation says to start T2
last when setting up PWM. This is currently not working in gpsim. If
I start T2 before enabling PWM in CCP1CON it works OK.

Yes. I was following the 'recipe' from the 16f716 datasheet to the
letter.

I remembered I had MPLAB X installed (v3.30) but couldn't get it to
work anymore. So I installed 5.15 and there my code worked fine (even
starting T2 last). But running MPLAB X is overkill. I spent more than
an hour figuring out just how to compile.

As always, thanks for the work!

John