#252 PWM3 interacts with CCP1 on 16f1705

[Anonymous]

When emulating the code in the attachment, I get traces like the following:

0x00000000009C3F7E p16f1705 0x1FC7 0x1D11 btfss pir1,2
99: BTFSS PIR1,CCP1IF
Wrote: 0x0043 to ccpr1h(0x0292) was 0x0043
Wrote: 0x0090 to pwm3con(0x0619) was 0x00B0
Read: 0x0003 from pir1(0x0011)
Wrote: 0x0003 to pir1(0x0011) was 0x0003
Read: 0x0003 from pir1(0x0011)

I believe this is an error, as the the datasheet suggests that pwm3/4 are independent of ccp1/2.

The version is: gpsim-0.31.0 # (Dec 30 2019)

[Anonymous]

.. Specifically figure 17-1 as opposed to figure 27-4 in the PIC16F1705 Datasheet.
I'd post the link but their website keeps crashing on me.

[Roy Rankin]

I have found an issue in this area. However, what I found was pwm3 interrating with ccp1. A fix is in SVN 2522 and later. Please check if this fix resolves your issues and let me know.

[Anonymous]

Downloaded the current trunk and tried building. It was missng a header.
configuration is:
./configure --prefix="/usr" CFLAGS="-g -Os" CXXFLAGS="-g -Os -std=gnu++11" --disable-gui --disable-leak-sanitize --disable-address-sanitize --disable-undefined-sanitize

I get:

libtool: compile: g++ -DHAVE_CONFIG_H -I. -I.. -pthread -I/usr/include/glib-2.0 -I/usr/lib/i386-linux-gnu/glib-2.0/include -g -Os -std=gnu++11 -Wall -MT pir.lo -MD -MP -MF .deps/pir.Tpo -c pir.cc -o pir.o >/dev/null 2>&1
processor.cc: In member function ‘virtual Value& ProgramMemoryCollection::GetAt(unsigned int, Value*)’:
processor.cc:1768:22: error: aggregate ‘std::ostringstream sIndex’ has incomplete type and cannot be defined
std::ostringstream sIndex;
^
processor.cc: In static member function ‘static std::__cxx11::string ProcessorConstructorList::DisplayString()’:
processor.cc:2560:22: error: aggregate ‘std::ostringstream stream’ has incomplete type and cannot be defined
std::ostringstream stream;
^
Makefile:832: recipe for target 'processor.lo' failed

(patch attached)

[Anonymous]

The writes to the CCPR1H is gone. So far so good. BUT....

I'm now trying to add a stimulus and running into those mystery errors with the stimulus again.
I had gotten it right last week but deleted the file inbetween. Still not sure what's going on.

I'm running a script.

!/bin/bash

set -e

gdb --args gpsim -pp16f1705 -L ../pic -c ./start.txt -s ../pic/main.cod -i

the start.txt is attached.

For some reason it does not like the `stimulus line'

[Anonymous]

nermind. was user error.

[Anonymous]

I have now been able to verify that the ZCD bit updates ok, and that the logic cell output toggles, but waiting on the CCP1IF still gets a watchdog timeout.

I have this trace of the capture event:

0x0000000000048065 p16f1705 0x0464 0x1A90 btfsc INVREG_10,5
123: BTFSC CLC1CON,LC1OUT
Read: 0x00A2 from clc1con(0x0F10)
0x0000000000048066 p16f1705 0x0465 0x33FE bra $-0x2 ;(0x008c8)
124: BRA $-1
Read: 0x00FB from tmr1l(0x0016)
Read: 0x0079 from tmr1h(0x0017)
Wrote: 0x00FB to ccpr1l(0x0291) was 0x0021
Wrote: 0x0079 to ccpr1h(0x0292) was 0x0000
Read: 0x0020 from pir2(0x0012)
Wrote: 0x0020 to pir2(0x0012) was 0x0020
0x0000000000048068 p16f1705 0x0464 0x1A90 btfsc INVREG_10,5
123: BTFSC CLC1CON,LC1OUT
Read: 0x0082 from clc1con(0x0F10)

It sets pir2 but I have PIR1..
datasheet sez PIR1,bit2 is the CCPR1F
but I got: 0x0020
PIR2,bit5 is C1IF
It's the comparator 1 interrupt flag which is set. I believe
it's the wrong one.

Is this enough or do you need a test case? or a new bug report?

[Roy Rankin]

SVN 2524 should now use the correct pir bits for ccp1 and ccp2.
I was clearly a bit sloppy about the 16f1705, However thanks for the bug reports.
Roy

[Anonymous]

Thank you. It works now.

[Anonymous]

Sorry to nag you again, but I just noticed the #include<sstream> is still missing in processor.cc in your repository.</sstream>