#72 [VHDL08] aggregate with array elements

[Olof Kraigher]

bug.vhd:

entity ent is
end entity;

architecture a of ent is
begin
  main : process
    variable s : string(4 to 15);
  begin
    s := (4 to 15 => "Hello world!");
    report s;
    wait;
  end process;
end architecture;

command line output:

ghdl -a bug.vhd && ghdl -e ent && ghdl -r ent
bug.vhd:9:22: can't match string literal with type character
ghdl: compilation error

ModelSim supports this and the LRM does mention:

For an aggregate of a one-dimensional array type, each choice shall specify values of the index type, and the
expression of each element association shall be of either the element type or the type of the aggregate. If the
type of the expression of an element association is the type of the aggregate, then either the element
association shall be positional or the choice shall be a discrete range.

[Tristan Gingold]

This is a vhdl 2008 feature that is currently not supported by ghdl.

Do you really need it ?

[Olof Kraigher]

I did not realize it was a 2008 only feature. I can work around it. Would be nice to have eventually though.

[Tristan Gingold]

Sure. I first have to carefully study the new rules.