#3 Bound check failure raised before a reset could be made

[Brian Drummond]

Upstream report from Debian bug 585750.
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=585750

From original report:

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"When simulating this code, the signal i_s is at first uninitialized and
has the value -2147483648.

Then, as shown below, a bound check failure is raised because it is
trying to convert a negativ value to an unsigned at the line "u_s <=
to_unsigned(i_s, 8)".

./tb_test:error: bound check failed (#11)
./tb_test:error: simulation failed
ghdl: compilation error

It is possible to avoid that by initialising i_s when it is declared,
but signals are usually initialised during a reset and that's what is
trying to make this code but it doesn't have time to do it before the
failure.

I think the best would be to put a warning instead an error and leave
the signal u_s to its uninitialised value ("UUUUUUUU")."

---

Testcase attached.
Problem confirmed.

[Brian Drummond]

• Description has changed:

Diff:

--- old
+++ new
@@ -2,6 +2,7 @@
 http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=585750

 From original report:
+
 ------------------------------------------------------------------------
 "When simulating this code, the signal i_s is at first uninitialized and
 has the value -2147483648.

[Joris van Rantwijk]

Is this really a bug?
I'm no expert, but it seems to me that GHDL is behaving correctly, while the proposed solution would cause GHDL to behave incorrectly.

[Brian Drummond]

On Sun, 2013-12-15 at 20:12 +0000, Joris van Rantwijk wrote:

Is this really a bug?
I'm no expert, but it seems to me that GHDL is behaving correctly,
while the proposed solution would cause GHDL to behave incorrectly.

I agree with you, though I'm open to persuasion otherwise.
It's not clear to me that ghdl's behaviour is entirely correct, but
the suggested "fix" definitely looks wrong.

You will notice that part is quoted, and this is not one of the issues I
have already patched! Nor am I rushing to do so... I am merely
transferring it to our tracker so that it has visibility.

Thanks,
- Brian

[Anonymous]

An error is required to stop simulation. A value not belonging to to target type is an error.

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12.4.4 Other concurrent statements

All other concurrent statements are either process statements or are statements for which there is an equivalent process statement.

Elaboration of a process statement proceeds as follows:

The process declarative part is elaborated.
The drivers required by the process statement are created.
The initial transaction defined by the default value associated with each scalar signal driven by the process statement is inserted into the corresponding driver.

Elaboration of all concurrent signal assignment statements and concurrent assertion statements consists of the construction of the equivalent process statement followed by the elaboration of the equivalent process statement.

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8.4 Signal assignment statement

A signal assignment statement modifies the projected output waveforms contained in the drivers of one or more signals (see 12.6.1 ).

...

If the target of the signal assignment statement is a name, then the name must denote a signal, and the base type of the value component of each transaction produced by a waveform element on the right-hand side must be the same as the base type of the signal denoted by that name. This form of signal assignment assigns right-hand side values to the drivers associated with a single (scalar or composite) signal.

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The signal assignment in the equivalent process statement must obey 'must':

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0.2 Structure and terminology of this document

...

Additionally, the word "must" is used to indicate mandatory weight. This word is preferred over the more common "shall," as "must" denotes a different meaning to different readers of this standard.

[Tristan Gingold]

ghdl is correct here.
If i_a is converted to unsigned, you should simply declare i_a as a natural signal.

Note that there is no uninitialised values in VHDL, that's almost doesn't exist.
i_s is initialized to its 'left value.