Instruction Set Summary
ADD Rd, Rr Add two Registers Rd < Rd + Rr Z, C, N, V, H 1
ADC Rd, Rr Add with Carry two Registers Rd < Rd + Rr + C Z, C, N, V, H 1
ADIW Rdl,K Add Immediate to Word Rdh:Rdl < Rdh:Rdl + K Z, C, N, V, S 2
SUB Rd, Rr Subtract two Registers Rd < Rd - Rr Z, C, N, V, H 1
SUBI Rd, K Subtract Constant from Register Rd < Rd - K Z, C, N, V, H 1
SBC Rd, Rr Subtract with Carry two Registers Rd < Rd - Rr - C Z, C, N, V, H 1
SBCI Rd, K Subtract with Carry Constant from Reg. Rd < Rd - K - C Z, C, N, V, H 1
SBIW Rdl,K Subtract Immediate from Word Rdh:Rdl < Rdh:Rdl - K Z, C, N, V, S 2
AND Rd, Rr Logical AND Registers Rd < Rd • Rr Z, N, V 1
ANDI Rd, K Logical AND Register and Constant Rd < Rd • K Z, N, V 1
OR Rd, Rr Logical OR Registers Rd < Rd v Rr Z, N, V 1
ORI Rd, K Logical OR Register and Constant Rd < Rd v K Z, N, V 1
EOR Rd, Rr Exclusive OR Registers Rd < Rd . Rr Z, N, V 1
COM Rd One’s Complement Rd < 0xFF . Rd Z, C, N, V 1
NEG Rd Two’s Complement Rd < 0x00 . Rd Z, C, N, V, H 1
SBR Rd,K Set Bit(s) in Register Rd < Rd v K Z, N, V 1
CBR Rd,K Clear Bit(s) in Register Rd < Rd • (0xFF - K) Z, N, V 1
INC Rd Increment Rd < Rd + 1 Z, N, V 1
DEC Rd Decrement Rd < Rd . 1 Z, N, V 1
TST Rd Test for Zero or Minus Rd < Rd • Rd Z, N, V 1
CLR Rd Clear Register Rd < Rd . Rd Z, N, V 1
SER Rd Set Register Rd < 0xFF None 1
MUL Rd, Rr Multiply Unsigned R1:R0 < Rd x Rr Z, C 2
MULS Rd, Rr Multiply Signed R1:R0 < Rd x Rr Z, C 2
MULSU Rd, Rr Multiply Signed with Unsigned R1:R0 < Rd x Rr Z, C 2
FMUL Rd, Rr Fractional Multiply Unsigned R1:R0 < (Rd x Rr) << 1 Z, C 2
FMULS Rd, Rr Fractional Multiply Signed R1:R0 < (Rd x Rr) << 1 Z, C 2
FMULSU Rd, Rr Fractional Multiply Signed with Unsigned R1:R0 < (Rd x Rr) << 1 Z, C 2
RJMP k Relative Jump PC < PC + k + 1 None 2
IJMP Indirect Jump to (Z) PC < Z None 2
EIJMP Extended Indirect Jump to (Z) PC <(EIND:Z) None 2
JMP k Direct Jump PC < k None 3
RCALL k Relative Subroutine Call PC < PC + k + 1 None 4
ICALL Indirect Call to (Z) PC < Z None 4
EICALL Extended Indirect Call to (Z) PC <(EIND:Z) None 4
CALL k Direct Subroutine Call PC < k None 5
RET Subroutine Return PC < STACK None 5
RETI Interrupt Return PC < STACK I 5
CPSE Rd,Rr Compare, Skip if Equal if (Rd = Rr) PC < PC + 2 or 3 None 1/2/3
CP Rd,Rr Compare Rd . Rr Z, N, V, C, H 1
CPC Rd,Rr Compare with Carry Rd . Rr . C Z, N, V, C, H 1
CPI Rd,K Compare Register with Immediate Rd . K Z, N, V, C, H 1
SBRC Rr, b Skip if Bit in Register Cleared if (Rr(b)=0) PC < PC + 2 or 3 None 1/2/3
SBRS Rr, b Skip if Bit in Register is Set if (Rr(b)=1) PC < PC + 2 or 3 None 1/2/3
SBIC P, b Skip if Bit in I/O Register Cleared if (P(b)=0) PC < PC + 2 or 3 None 1/2/3
SBIS P, b Skip if Bit in I/O Register is Set if (P(b)=1) PC < PC + 2 or 3 None 1/2/3
BRBS s, k Branch if Status Flag Set if (SREG(s) = 1) then PC