I spotted a small bug in two chipfiles: 16f570.dat and 16f527.dat
Both contain a line FamilyVariant=1 to signify a PIC16F1xx device with 64 RAM pages
(having an alternative MOVLB encoding of "00 0001 01kk kkkk" instead of 00 0000 001k kkkk).
The FamilyVariant=1 line should be deleted for these two chips IMHO.
By the way, all devices with FamilyVariant=1 always have (WREG_SHAD >= 8165),
so this FamilyVariant property could be detected automatically.
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'Add family variant where neededChipFamilyVariant=0IfChipFamily=12Then'16F527 and 16F570 chips have some extra instructions, can detect with presence of IBSR registerIfHasSFR("IBSR")ThenChipFamilyVariant=1EndIfElseIfChipFamily=15ThenIfHasSFRBit("BSR5")ThenChipFamilyVariant=1' Removed next two lines at thes 16f15325 and other chips that need ChipFamilyVariant = 1 are less than 2048 - errant warning' ElseIf ChipRAM >= 2048 Then' Print "Warning: BSR5 detection may have failed, movlb may be broken"EndIfElseIfChipFamily=16Then'18F chips with 4096 or more data addresses have movffl and different lfsr instructionIfMaxChipAddress>=4096ThenChipFamilyVariant=1EndIf
It this FAMILY is detected automatically. Can you see an oversight?
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Sorry for wasting your time, Evan!
I thought that ChipVariant=1 only indicated the new movlb instruction encoding for 16F1xx devices. I learn every day! ;-)
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Not a problem. Here are the notes from the developer guide.
FamilyVariant is to handle chips that have added instructions and need different treatment in the assembler. It is used for 3 PIC families where some chips have added instructions not found in most. The default value is 0, but it can be set to anything as shown below.
Family
FamilyVariant values
12
0: Default
1: Newer chips (16F527, 16F570) which have movlb, return and retfie instructions.
14
Not used
15
0: Default
1: Chips with more RAM that have an extra bit for the bank in the movlb instruction (6 bits rather than 5)
16
0: Default
1: Chips with more RAM (K42 and K83 series) that have a movffl instruction and 2 more bits for the address in the lfsr instruction. Controls Automatic Context Save during interrupts for K42 and K83 with MVECEN = OFF, the EEPROM base address at 0x31000
AVR:
Not used, although the HardwareMult parameter has a similar role in identifying which chips have a hardware multiplier.
FamilyVariant is exposed as ChipFamilyVariant. This is NOT use within any libraries. And, to my knowledge is ONLY used within the compiler.
FamilyVariant IS used within the compiler. The chipfamily (shown in column #1 above) will determine the method the compile users to address using the correct ASM instructions that are specfic to a chip family.
Hope this helps.
Last edit: Anobium 2020-09-04
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16f1512, 16f1513,16f1516, 16f1517, 16F1518, 16F1519, 16F1526 and 16F1527 chipfiles updated to support internal frequencies.
These will be included in future releases.
New commit [r949] by evanvenn
Related
Commit: [r949]
I spotted a small bug in two chipfiles: 16f570.dat and 16f527.dat
Both contain a line FamilyVariant=1 to signify a PIC16F1xx device with 64 RAM pages
(having an alternative MOVLB encoding of "00 0001 01kk kkkk" instead of 00 0000 001k kkkk).
The FamilyVariant=1 line should be deleted for these two chips IMHO.
By the way, all devices with FamilyVariant=1 always have (WREG_SHAD >= 8165),
so this FamilyVariant property could be detected automatically.
Looks correct to me.
It this FAMILY is detected automatically. Can you see an oversight?
I spotted another FamilyVariant typo in file 16f19197.dat,
I see WREG_SHAD,8165, so 64 RAM pages, but the FamilyVariant=1 line is missing!
Please add FamilyVariant=1 in 16f19197.dat ..
The code shown above are the rules. Are the rules incorrect?
I think I caused trouble here; I see that my 16f19197.dat file is from 21 december 2018.
Sorry for troubling you again!
Sorry for wasting your time, Evan!
I thought that ChipVariant=1 only indicated the new movlb instruction encoding for 16F1xx devices. I learn every day! ;-)
Not a problem. Here are the notes from the developer guide.
FamilyVariant is to handle chips that have added instructions and need different treatment in the assembler. It is used for 3 PIC families where some chips have added instructions not found in most. The default value is 0, but it can be set to anything as shown below.
FamilyVariant is exposed as ChipFamilyVariant. This is NOT use within any libraries. And, to my knowledge is ONLY used within the compiler.
FamilyVariant IS used within the compiler. The chipfamily (shown in column #1 above) will determine the method the compile users to address using the correct ASM instructions that are specfic to a chip family.
Hope this helps.
Last edit: Anobium 2020-09-04
@SPostma. See the URL for the latest info on ChipFamily. It has a new class added recently.
https://github.com/Anobium/Great-Cow-BASIC-Help/blob/master/source/otherdirectives.adoc
This is will also help. Details of the sources of the chipfile and the process.
https://github.com/Anobium/Great-Cow-BASIC-Help/blob/master/source/ChipFilesDetails.pdf