Hello, I noticed that the 16c84.dat definition contains errors. A pic16c84 is very similar to a pic16f84, with less RAM.
Here is my new definition
Ciao! Paolo
'-------------------------------------------- 'GCBASIC/GCGB Chip Data File 'Chip: 16C84 'Generated 31/1/2010 'Format last revised: 07/11/2014
[ChipData] Prog=1024 EEPROM=64 RAM=36 I/O=13 ADC=0 MaxMHz=10 IntOsc=0 Pins=18 Family=14 ConfigWords=1 PSP=0 MaxAddress=207
[Interrupts] EEPROMReady:EEIE,EEIF ExtInt0:INTE,INTF PORTBChange:RBIE,RBIF Timer0Overflow:T0IE,T0IF
[Registers] INDF,0 TMR0,1 PCL,2 STATUS,3 FSR,4 PORTA,5 PORTB,6 EEDATA,8 EEADR,9 PCLATH,10 INTCON,11 OPTION_REG,129 TRISA,133 TRISB,134 EECON1,136 EECON2,137
[Bits] IRP,STATUS,7 RP1,STATUS,6 RP0,STATUS,5 NOT_TO,STATUS,4 NOT_PD,STATUS,3 Z,STATUS,2 DC,STATUS,1 C,STATUS,0 GIE,INTCON,7 EEIE,INTCON,6 T0IE,INTCON,5 INTE,INTCON,4 RBIE,INTCON,3 T0IF,INTCON,2 INTF,INTCON,1 RBIF,INTCON,0 NOT_RBPU,OPTION_REG,7 INTEDG,OPTION_REG,6 T0CS,OPTION_REG,5 T0SE,OPTION_REG,4 PSA,OPTION_REG,3 PS2,OPTION_REG,2 PS1,OPTION_REG,1 PS0,OPTION_REG,0 EEIF,EECON1,4 WRERR,EECON1,3 WREN,EECON1,2 WR,EECON1,1 RD,EECON1,0
[FreeRAM] 0C:2F
[NoBankRAM] 0C:2F
[Pins-DIP] 17,RA0(IO) 18,RA1(IO) 1,RA2(IO) 2,RA3(IO) 3,RA4(IO),T0CKI(I) 6,RB0(IO) 7,RB1(IO) 8,RB2(IO) 9,RB3(IO) 10,RB4(IO) 11,RB5(IO) 12,RB6(IO) 13,RB7(IO) 4,MCLR 16,OSC1 15,OSC2 5,Vss 14,Vdd
[ConfigOps] CP=ON,OFF PWRTE=ON,OFF WDT=ON,OFF OSC=LP,XT,HS,RC
[Config] CP_ON,1,15 CP_OFF,1,16383 PWRTE_ON,1,16375 PWRTE_OFF,1,16383 WDT_ON,1,16383 WDT_OFF,1,16379 LP_OSC,1,16380 XT_OSC,1,16381 HS_OSC,1,16382 RC_OSC,1,16383
Thank you. I have posted to release code.
Most grateful for the corrections.
:-)
Hello, this file too is wrong in the version v0.95.007. All the corrections are away
ciao Paolo
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Hello,
I noticed that the 16c84.dat definition contains errors. A pic16c84 is very similar to a pic16f84, with less RAM.
Here is my new definition
Ciao!
Paolo
'--------------------------------------------
'GCBASIC/GCGB Chip Data File
'Chip: 16C84
'Generated 31/1/2010
'Format last revised: 07/11/2014
[ChipData]
Prog=1024
EEPROM=64
RAM=36
I/O=13
ADC=0
MaxMHz=10
IntOsc=0
Pins=18
Family=14
ConfigWords=1
PSP=0
MaxAddress=207
[Interrupts]
EEPROMReady:EEIE,EEIF
ExtInt0:INTE,INTF
PORTBChange:RBIE,RBIF
Timer0Overflow:T0IE,T0IF
[Registers]
INDF,0
TMR0,1
PCL,2
STATUS,3
FSR,4
PORTA,5
PORTB,6
EEDATA,8
EEADR,9
PCLATH,10
INTCON,11
OPTION_REG,129
TRISA,133
TRISB,134
EECON1,136
EECON2,137
[Bits]
IRP,STATUS,7
RP1,STATUS,6
RP0,STATUS,5
NOT_TO,STATUS,4
NOT_PD,STATUS,3
Z,STATUS,2
DC,STATUS,1
C,STATUS,0
GIE,INTCON,7
EEIE,INTCON,6
T0IE,INTCON,5
INTE,INTCON,4
RBIE,INTCON,3
T0IF,INTCON,2
INTF,INTCON,1
RBIF,INTCON,0
NOT_RBPU,OPTION_REG,7
INTEDG,OPTION_REG,6
T0CS,OPTION_REG,5
T0SE,OPTION_REG,4
PSA,OPTION_REG,3
PS2,OPTION_REG,2
PS1,OPTION_REG,1
PS0,OPTION_REG,0
EEIF,EECON1,4
WRERR,EECON1,3
WREN,EECON1,2
WR,EECON1,1
RD,EECON1,0
[FreeRAM]
0C:2F
[NoBankRAM]
0C:2F
[Pins-DIP]
17,RA0(IO)
18,RA1(IO)
1,RA2(IO)
2,RA3(IO)
3,RA4(IO),T0CKI(I)
6,RB0(IO)
7,RB1(IO)
8,RB2(IO)
9,RB3(IO)
10,RB4(IO)
11,RB5(IO)
12,RB6(IO)
13,RB7(IO)
4,MCLR
16,OSC1
15,OSC2
5,Vss
14,Vdd
[ConfigOps]
CP=ON,OFF
PWRTE=ON,OFF
WDT=ON,OFF
OSC=LP,XT,HS,RC
[Config]
CP_ON,1,15
CP_OFF,1,16383
PWRTE_ON,1,16375
PWRTE_OFF,1,16383
WDT_ON,1,16383
WDT_OFF,1,16379
LP_OSC,1,16380
XT_OSC,1,16381
HS_OSC,1,16382
RC_OSC,1,16383
Thank you. I have posted to release code.
Most grateful for the corrections.
:-)
Hello,
this file too is wrong in the version v0.95.007. All the corrections are away
ciao
Paolo