.
The measured TX baud rate is ~1/4 of the expected baud rate at any clock frequency or baud setting.
MCU clock speed was verified correct with output on clock out pin and testing 1 ms wait time.
Below is the code I used to test. Without looking too deeply into the USART.H file and the PIC Datasheet, my guess is that the settings/formulas for the BRG in the USART.H file will need to be adapted to support this "family" of chips.
Complete ASM is attached:
GCB:
#chip 18F25K80, 32
#config XINST OFF
#config FOSC = INTIO2
#define USART_BAUD_RATE 9600
#define USART_BLOCKING
Dir PORTC.6 Out 'TX
Dir PortC.7 In 'RX
DO
hserprint "UUUU"
wait 10 ms
Loop
.
The measured TX baud rate is ~1/4 of the expected baud rate at any clock frequency or baud setting.
MCU clock speed was verified correct with output on clock out pin and testing 1 ms wait time.
Compiler: 0.94 2015-04-02
This will likely affect the following chips.
• PIC18F25K80 • PIC18LF25K80
• PIC18F26K80 • PIC18LF26K80
• PIC18F45K80 • PIC18LF45K80
• PIC18F46K80 • PIC18LF46K80
• PIC18F65K80 • PIC18LF65K80
• PIC18F66K80 • PIC18LF66K80
Below is the code I used to test. Without looking too deeply into the USART.H file and the PIC Datasheet, my guess is that the settings/formulas for the BRG in the USART.H file will need to be adapted to support this "family" of chips.
Complete ASM is attached:
GCB:
ASM CODE (USART SECTION)
Last edit: William Roth 2015-04-08
This problem has been resolved in the latest USART.h file. The file can be downloaded at the link below.
https://sourceforge.net/p/gcbasic/code/HEAD/tree/GCBASIC/trunk/include/lowlevel/usart.h