The 18F4550 oscillator configuration makes my brain hurt! You get it to run at almost any speed from any oscillator, but good luck working out the settings properly on the first try!
When using an external oscillator, the speed in the #chip line has no effect on the actual clock speed. It is used to calculate the timing needed in delay routines and serial routines, among other places. So if the chip is meant to be running at 48 MHz, that's what you need in the #chip line.
I think the config settings you have are ok. I haven't tried it, but PLLDIV of 1 should result in the required 4 MHz being fed into the PLL module, and then CPUDIV of 2 should put 48 MHz into the CPU. The OS = HSPLL_HS also sounds correct.
If the chip is actually running at 48 MHz, but the #chip line is setting all of the timing for 4 MHz, everything is running 12 times faster and normal and that could explain some problems!
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Thanks Anobium and Hugh. I've been reviewing the data sheets again and am very confused.
The Microchip document has this:
bit 4-3 CPUDIV1:CPUDIV0: System Clock Postscaler Selection bits
For XT, HS, EC and ECIO Oscillator modes:
11 = Primary oscillator divided by 4 to derive system clock
10 = Primary oscillator divided by 3 to derive system clock
01 = Primary oscillator divided by 2 to derive system clock
00 = Primary oscillator used directly for system clock (no postscaler)
For XTPLL, HSPLL, ECPLL and ECPIO Oscillator modes:
11 = 96 MHz PLL divided by 6 to derive system clock
10 = 96 MHz PLL divided by 4 to derive system clock
01 = 96 MHz PLL divided by 3 to derive system clock
00 = 96 MHz PLL divided by 2 to derive system clock
bit 2-0 PLLDIV2:PLLDIV0: PLL Prescaler Selection bits
111 = Divide by 12 (48 MHz oscillator input)
110 = Divide by 10 (40 MHz oscillator input)
101 = Divide by 6 (24 MHz oscillator input)
100 = Divide by 5 (20 MHz oscillator input)
011 = Divide by 4 (16 MHz oscillator input)
010 = Divide by 3 (12 MHz oscillator input)
001 = Divide by 2 (8 MHz oscillator input)
000 = No prescale (4 MHz oscillator input drives PLL directly)
Since I'm using a 4 MHz crystal with #chip = 48 and PLL, it appears
00 = 96 MHz PLL divided by 2 to derive system clock
is correct which would be CPUDIV= 000 or OSC1_PLL2 in the GCB Hardware Settings drop down menu. Is that correct?
The PLLDIV with HSPLL should be
000 = No prescale (4 MHz oscillator input drives PLL directly)
which means divide by one or option 1 in the drop down menu. Is that correct?
These setting seem to agree with the Microchip timing diagram in Figure 2-1 of their data sheet.
Unfortunately, with these settings the LCD works but the GLCD does not.
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Help me understand. The LCD was working very slowly but now is working correctly? if you program a delay of one second do you get a delay of one second?
Regarding the GLCD. What is your date of gbasic.exe? And of your glcd.h? We have improved glcd.h since the May 2014 release. So, I need the dates of these files.
Thank you.
Last edit: Anobium 2014-12-18
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I tried your suggestion with values of 1, 2, 3, 4, 5, 6, 7, 8, 16, 32, 64, 128, 256, 512, and 1024 but unfortunately the GLCD did not work with any of them. The LCD worked with all values.
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;ChipSettings#chip 18F4550,48#config PLLDIV=1, CPUDIV=OSC1_PLL2, OSC=HSPLL_HS, MCLRE=ON, LVP=OFF;Includefiles(Libraries)#include<glcd.h>;Defines(Constants)#define GLCD_DB0 PORTB.3 'D0 to pin 4 on LCD#define GLCD_DB1 PORTB.2 'D1 to pin 5 on LCD#define GLCD_DB2 PORTB.1 'D2 to pin 6 on LCD#define GLCD_DB3 PORTB.0 'D3 to pin 7 on LCD#define GLCD_DB4 PORTD.7 'D4 to pin 8 on LCD#define GLCD_DB5 PORTD.6 'D5 to pin 9 on LCD#define GLCD_DB6 PORTD.5 'D6 to pin 10 on LCD#define GLCD_DB7 PORTD.4 'D7 to pin 11 on LCD#define GLCD_CS2 PORTC.7 'D8 to pin 12 on LCD - CS1, CS2 are backwards #define GLCD_CS1 PORTC.6 'D9 to pin 13 on LCD - CS1, CS2 are backwards #define GLCD_RESET PORTB.5 'D10 to pin 14 of LCD #define GLCD_RW PORTB.4 'D11 to pin 15 of LCD #define GLCD_RS PORTD.3 'D12 to pin 16 D/I pin on LCD #define GLCD_ENABLE PORTD.2 'D13 to Pin 17 on LCD #define LCD_IO 2#define LCD_CB PORTC.1#define LCD_DB PORTC.2#define KS0108WriteDelay 32#define KS0108ClockDelay 32#define GLCD_TYPE_KS0108
In the above program the LED (print) portions work at any speed. The GLCD (GLCDPrint) works up to 32 MHz. It seems that when I set the CPUDIV to OSC1_PLL2 (48 MHz) the GLCD stops working.
I also tried a 20 MHz crystal with PLLDIV=5 and CPUDIV=OSC1_PLL2. The results were the same.
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Thanks. I am looking at the problem now. There is an underlying problem in the LAT code - I essentially did not change the KS0108 LAT code during the recent update. This has a issue that may be causing this issue. I try to resolve asap.
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Please test this. Many changes to the LAT and timing handling.
To be honest for the recent split of the glcd.h - I essentially cut out the Ks0108 code out as this goes back some time and I just checked it worked up 32mhz on a 16F - it turns out the code had some existing errors that are apparent at faster (greater than 32mhz clock speed) and LAT handling was just not correct (neither was the original code pre-the glcd.h split.
Test and let me know the results. I have not yet tested with 18f4550 as I have manage to sell the Pic40 proto board I was going to use to test this. :-)
Download the test code here I will delete this when we have resolved the issue.
Anobium
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Would you post your working file, the .h files? Please.
Would you also try moving these modes into the new file I posted to the ftp site today? This resolves other issues but I can try to base the new file on your code base.
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Excellent. I will make some small adaptation to ensure these delays will not cause excessive delays for slower devices.
Check back here in my morning. I am London timezone.
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Before I commit these changes can you please do two more tests?
1) Check you can draw a box from 0,0,127,63. My simulator here is not showing what I expect. Can you please confirm this works.
2) Please try using LAT to see if this resolves the original issue. So, remove the 'wait's from the .h fie and then change you setup to as shown below. Changing the ports to your LAT config.
#include<glcd.h>#define glcd_lat ;Defines(ConstantsfortheGLCD)-'RequiredforKS0108Support#define_GLCD_CS1PORTa.7'CS1,CS2canbereversedonsomedevices#define _GLCD_CS2 PORTa.6#define _GLCD_DB0 PORTD.0 'DB0 to pin 7 on LCD#define _GLCD_DB1 PORTD.1 'DB1 to pin 8 on LCD#define _GLCD_DB2 PORTD.2 'DB2 to pin 9 on LCD#define _GLCD_DB3 PORTD.3 'DB3 to pin 10 on LCD#define _GLCD_DB4 PORTD.4 'DB4 to pin 11 on LCD#define _GLCD_DB5 PORTD.5 'DB5 to pin 12 on LCD#define _GLCD_DB6 PORTD.6 'DB6 to pin 13 on LCD#define _GLCD_DB7 PORTD.7 'DB7 to pin 14 on LCD#define _GLCD_RS PORTa.0#define _GLCD_Enable PORTA.1#define _GLCD_RW PORTA.2#define _GLCD_RESET PORTA.3#define GLCD_CS1 LATa.7 ' CS1, CS2 can be reversed on some devices#define GLCD_CS2 LATa.6#define GLCD_DB0 LATD.0 'DB0 to pin 7 on LCD#define GLCD_DB1 LATD.1 'DB1 to pin 8 on LCD#define GLCD_DB2 LATD.2 'DB2 to pin 9 on LCD#define GLCD_DB3 LATD.3 'DB3 to pin 10 on LCD#define GLCD_DB4 LATD.4 'DB4 to pin 11 on LCD#define GLCD_DB5 LATD.5 'DB5 to pin 12 on LCD#define GLCD_DB6 LATD.6 'DB6 to pin 13 on LCD#define GLCD_DB7 LATD.7 'DB7 to pin 14 on LCD#define GLCD_RS LATa.0#define GLCD_Enable LATA.1#define GLCD_RW LATA.2#define GLCD_RESET LATA.3
Does using LAT resolve the issue?
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I have an 18F4550 operating with a 4 MHz crystal. I'm trying to make the 4 MHz look like 48 MHz. I set the Configuration as follows:
;Chip Settings
#chip 18F4550,4
#config PLLDIV=1, CPUDIV=OSC1_PLL2, USBDIV=1, OSC=HSPLL_HS, FCMEN=OFF, WDT=OFF, MCLRE=ON, LVP=OFF
When I use these setting nothing works - my LCD and GLCD remain blank.
If I change it to 20 MHz and these settings it works but it is VERY slow:
#chip 18F4550,20
#config OSC=HS, MCLRE=ON, LVP=OFF
What am I doing wrong? I'm using the Hot Release version
Back in 2007, according to my notes, this worked to run an 18F4550 at 48 MHz from a 20 MHz crystal.
#chip 18F4550, 48
#config FOSC=HSPLL_HS, PLLDIV=5, CPUDIV=OSC1_PLL
20 MHz is divided by 5 (PLLDIV) to give a 4 MHz input to the 96 MHz PLL module, and the output of that gets divided by 2 to run the CPU at 48 MHz
The 18F4550 oscillator configuration makes my brain hurt! You get it to run at almost any speed from any oscillator, but good luck working out the settings properly on the first try!
When using an external oscillator, the speed in the #chip line has no effect on the actual clock speed. It is used to calculate the timing needed in delay routines and serial routines, among other places. So if the chip is meant to be running at 48 MHz, that's what you need in the #chip line.
I think the config settings you have are ok. I haven't tried it, but PLLDIV of 1 should result in the required 4 MHz being fed into the PLL module, and then CPUDIV of 2 should put 48 MHz into the CPU. The OS = HSPLL_HS also sounds correct.
If the chip is actually running at 48 MHz, but the #chip line is setting all of the timing for 4 MHz, everything is running 12 times faster and normal and that could explain some problems!
Thanks Anobium and Hugh. I've been reviewing the data sheets again and am very confused.
The Microchip document has this:
bit 4-3 CPUDIV1:CPUDIV0: System Clock Postscaler Selection bits
For XT, HS, EC and ECIO Oscillator modes:
11 = Primary oscillator divided by 4 to derive system clock
10 = Primary oscillator divided by 3 to derive system clock
01 = Primary oscillator divided by 2 to derive system clock
00 = Primary oscillator used directly for system clock (no postscaler)
For XTPLL, HSPLL, ECPLL and ECPIO Oscillator modes:
11 = 96 MHz PLL divided by 6 to derive system clock
10 = 96 MHz PLL divided by 4 to derive system clock
01 = 96 MHz PLL divided by 3 to derive system clock
00 = 96 MHz PLL divided by 2 to derive system clock
bit 2-0 PLLDIV2:PLLDIV0: PLL Prescaler Selection bits
111 = Divide by 12 (48 MHz oscillator input)
110 = Divide by 10 (40 MHz oscillator input)
101 = Divide by 6 (24 MHz oscillator input)
100 = Divide by 5 (20 MHz oscillator input)
011 = Divide by 4 (16 MHz oscillator input)
010 = Divide by 3 (12 MHz oscillator input)
001 = Divide by 2 (8 MHz oscillator input)
000 = No prescale (4 MHz oscillator input drives PLL directly)
Since I'm using a 4 MHz crystal with #chip = 48 and PLL, it appears
00 = 96 MHz PLL divided by 2 to derive system clock
is correct which would be CPUDIV= 000 or OSC1_PLL2 in the GCB Hardware Settings drop down menu. Is that correct?
The PLLDIV with HSPLL should be
000 = No prescale (4 MHz oscillator input drives PLL directly)
which means divide by one or option 1 in the drop down menu. Is that correct?
These setting seem to agree with the Microchip timing diagram in Figure 2-1 of their data sheet.
Unfortunately, with these settings the LCD works but the GLCD does not.
Help me understand. The LCD was working very slowly but now is working correctly? if you program a delay of one second do you get a delay of one second?
Regarding the GLCD. What is your date of gbasic.exe? And of your glcd.h? We have improved glcd.h since the May 2014 release. So, I need the dates of these files.
Thank you.
Last edit: Anobium 2014-12-18
Both files are 11-5-2014.
I've done more experimenting and have made some progress. These combinations of PLLDIV and CPUDIV work, i.e. both the LCD and GLCD work:
PLLDIV=1, CPUDIV= OSC3_PLL4 (probably 24 MHz) PLLDIV=1, CPUDIV= OSC2_PLL3 (probably 32 MHz) PLLDIV=2, CPUDIV= OSC1_PLL2 (divides 4 MHz crystal by 2 but 96 MHz PLL needs 4 MHz to work. This probably should not work)The above combinations do not give the fastest speed.
This works for the LCD but not the GLCD:
This last combination should give the highest speed. It seems the GLCD is speed sensitive.
Good progress.
There is a later GLCD.h which is more adaptable. Let us know the release dates of your current code base.
The top of the .asm file says 0.9 11/5/2014. I also downloaded and tried the new glcd.h files.
The glcd_imagesandfonts_addin3.h file gave me syntax errors when compiling so I ran with just the new gld.h and glcd_KS0108.h files.
Same as above, the GLCD still did not work with:
Both the glcd and lcd worked with:
Everything ok now?
When configured for 48 MHz operation, the program runs and the LCD works. The GLCD does not work.
When configured for 32 MHz everything works.
It appears the GLCD doesn't like the higher speeds.
I have timed the GLCD for 32 mhz. I will review the code in my morning and recommend some timing configuration changes that should help.
I just had a quick scan. Please increase the following two values to 16. Make these changes in your main program - do not change the .h files.
#define KS0108WriteDelay 1 ; 1 normal usage, 0 works
#define KS0108ClockDelay 1 ; 1 normal usage, 0 works
If setting to 16 does not work, increase to 24 and 32 etc. If 16 does work you could try setting to 8 and testing.
Let me know the results.
Last edit: Anobium 2014-12-19
Thanks Anobium.
I tried your suggestion with values of 1, 2, 3, 4, 5, 6, 7, 8, 16, 32, 64, 128, 256, 512, and 1024 but unfortunately the GLCD did not work with any of them. The LCD worked with all values.
Thank you for trying.
Would you pleae post all your source code, your config in terms of the hardware including the oscillator.
I will recreate in my lab setup.
I am sure this is a timing issue.
Thanks.
I'm using a 4 MHz crystal with this software:
'
NN = 1
'
DOagain:
cls
glcdcls
locate 0, 11
print "START 39"
'
GLCDPrint 10, 10, "test glcd"
GLCDPrint 10, 30, "DEC. 20, 2014"
'
locate 0, 0
print "TEST GLCD"
locate 1, 5
print "It WORKS"
'
locate 3, 0
print NN
NN = NN + 1
'
locate 3, 5
print "HELLO"
GLCDPrint 10, 40, "Today"
wait 2 s
goto DOagain
In the above program the LED (print) portions work at any speed. The GLCD (GLCDPrint) works up to 32 MHz. It seems that when I set the CPUDIV to OSC1_PLL2 (48 MHz) the GLCD stops working.
I also tried a 20 MHz crystal with PLLDIV=5 and CPUDIV=OSC1_PLL2. The results were the same.
I'm using a Hantronix HDM64GS12L-4-N31S GLCD.
Thanks. I am looking at the problem now. There is an underlying problem in the LAT code - I essentially did not change the KS0108 LAT code during the recent update. This has a issue that may be causing this issue. I try to resolve asap.
Please test this. Many changes to the LAT and timing handling.
To be honest for the recent split of the glcd.h - I essentially cut out the Ks0108 code out as this goes back some time and I just checked it worked up 32mhz on a 16F - it turns out the code had some existing errors that are apparent at faster (greater than 32mhz clock speed) and LAT handling was just not correct (neither was the original code pre-the glcd.h split.
Test and let me know the results. I have not yet tested with 18f4550 as I have manage to sell the Pic40 proto board I was going to use to test this. :-)
Download the test code here I will delete this when we have resolved the issue.
Anobium
I did not work but I found something that does.
In your original glcd_KS0108.h file ( Not the one you put in the above post), if you change this:
'Set output data
To this it works at 48 MHz:
'Set output data
Wait KS0108WriteDelay us
GLCD_DB7 = LCDByte.7
Wait KS0108WriteDelay us
GLCD_DB6 = LCDByte.6
Wait KS0108WriteDelay us
GLCD_DB5 = LCDByte.5
Wait KS0108WriteDelay us
GLCD_DB4 = LCDByte.4
Wait KS0108WriteDelay us
GLCD_DB3 = LCDByte.3
Wait KS0108WriteDelay us
GLCD_DB2 = LCDByte.2
Wait KS0108WriteDelay us
GLCD_DB1 = LCDByte.1
Wait KS0108WriteDelay us
GLCD_DB0 = LCDByte.0
Wait KS0108WriteDelay us
Also, in your program use this:
Great news.
Would you post your working file, the .h files? Please.
Would you also try moving these modes into the new file I posted to the ftp site today? This resolves other issues but I can try to base the new file on your code base.
I just tried your newly posted code with the changes I suggested above.
Attached is your newest .h file with the changes I just made.
Did these merged changes work?
Yes! They worked great. Thanks for your help.
Excellent. I will make some small adaptation to ensure these delays will not cause excessive delays for slower devices.
Check back here in my morning. I am London timezone.
Before I commit these changes can you please do two more tests?
1) Check you can draw a box from 0,0,127,63. My simulator here is not showing what I expect. Can you please confirm this works.
2) Please try using LAT to see if this resolves the original issue. So, remove the 'wait's from the .h fie and then change you setup to as shown below. Changing the ports to your LAT config.
Does using LAT resolve the issue?