WS2812 code not working on 16F18313

[Peter]

I've tried running the WS2812 LED strip (bit banging) code on a PIC16F1313 and it doesn't work. I've attached the full code, but the line that seems to be causing the problem is:

'Ensure minimum delay has happened as the timing is critical
'The delay is maintained by the timer0 Interrupt
wait while timeoutocurred =  0
intoff

If I change this to

wait while timeoutocurred =  1

the LED strip will work which suggests that TIMER0 never times out.

The code worked fine on a 16F1825, and the only difference I can see between the timers in the two devices is that the 16F18313 can use the timer in a 16 bit mode as well as 8 bit. I'm not too good with assembly, but it looks like the prescaler gets set as 0b001 for both devices:

movlw   1
movwf   TMRPRES

but for the 16F18313 should this be set to 0b0010?

TIMER2 on the 16F18313 is an 8 bit timer so I tried swapping TIMER0 to TIMER2 but got the following error from the compiler. The datasheet says that TIMER2 can generate an interrupt.

3-16F18313test.gcb (219): Error: Invalid interrupt event: TIMER2OVERFLOW

My 'hack' seems to work, however this seems to bypass the timer that keeps the output signal correct and is supposed to be a critical part of the code!

Vaguely related - the datasheet for the 16F18313 refers to the ADC on RA.5 as ANA5 - should I use AN5 in my code or ANA5?

[Anobium]

Have a look at the other WS2812 LED CLCorBitBanging demos. There is an 16-bit timer solution. Look at the init and the ISR handler. I think your hack will not give the stability in the timing your require.

    #define period_us   0x1B00  'Period for LED internal processing
    InitTimer0(Osc, TMR0_FOSC4 + PRE0_2 , POST0_1)
    SetTimer(0, period_us)  ' Preload Count
    StartTimer 0
    On Interrupt Timer0Overflow call ISR0

Re ANA5. You can use either - there is a #define ANA5 to AN5. So, we use AN5 internally mapped to ANA5.

[Peter]

Thanks as always. I'll give it a whirl this evening.

Update 7/10 - The code posted above works perfectly.