Hi,
I`v reached a memory bottleneck with PIC chips in 40 pin DIP packages so I`m considering using AVR, in particular the 1284P
from what I understand it`s identical to the 644p which GCB has a chip data file for.
so if I were to open a copy of the 644p chip data file and plug in the 1284 parameters from here: http://www.atmel.com/Images/doc8059.pdf and save it back under the name AT1284p, would it work?
or have I oversimplified it?
I`v already had a look inside the 644p file and the first few in the list are about the Memory mostly, the rest seems to be what you`d expect in the 1284p anyway, so I imagine would be left alone.
do I need to consider anything else in making the 1284p chip work under GCB control?
Thanks ;)
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It might work. The GCBASIC chip data files supply information about the chip's memory, IO pins and special function registers. If the 1284p is completely identical to the 644p other than the amount of memory, it is certainly worth trying!
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
ok, I have a version up and running, and have just programmed my 1`st ever ATmega1284P (only a flashing LED) in GCBasic, this is not a Complete version as the External Osc side of things needs to be addressed, as it defaults to Int Osc.
so in the Freq part of the Hardware Setup, use 1 MHz for the clock.
Paste this code into Notepad, and save it as Mega1284P.DAT, then move this into the ChipData folder of GCBASIC, next time you run GCBasic, it should appear in your H/ware list :)
'GCBASIC/GCGB Chip Data File
'Chip: ATmega1284P
'Generated 6/Nov/2012
'Format last revised: (NEW)
Just a quick update, it seems the Clock issue is only with brand new chips from the factory, if it`s ever worked with an external crystal and you`re just overwriting it with Basic, then it`ll work fine.
if you are using a New chip, you`ll need to set to set the Low Fuse Byte (I set mine to 0xFF) and now I can run at the full 20MHz with an external crystal.
there is a Way to do it Manually in the GCC command line too, perhaps this could be incorporated into the ChipData file or perhaps a Configs bolt-on?
anyway, I`ll continue testing this in the morning, but for now all`s looking good!
Enjoy ;)
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
Hi,
I`v reached a memory bottleneck with PIC chips in 40 pin DIP packages so I`m considering using AVR, in particular the 1284P
from what I understand it`s identical to the 644p which GCB has a chip data file for.
so if I were to open a copy of the 644p chip data file and plug in the 1284 parameters from here: http://www.atmel.com/Images/doc8059.pdf and save it back under the name AT1284p, would it work?
or have I oversimplified it?
I`v already had a look inside the 644p file and the first few in the list are about the Memory mostly, the rest seems to be what you`d expect in the 1284p anyway, so I imagine would be left alone.
do I need to consider anything else in making the 1284p chip work under GCB control?
Thanks ;)
It might work. The GCBASIC chip data files supply information about the chip's memory, IO pins and special function registers. If the 1284p is completely identical to the 644p other than the amount of memory, it is certainly worth trying!
ok, I have a version up and running, and have just programmed my 1`st ever ATmega1284P (only a flashing LED) in GCBasic, this is not a Complete version as the External Osc side of things needs to be addressed, as it defaults to Int Osc.
so in the Freq part of the Hardware Setup, use 1 MHz for the clock.
Paste this code into Notepad, and save it as Mega1284P.DAT, then move this into the ChipData folder of GCBASIC, next time you run GCBasic, it should appear in your H/ware list :)
'GCBASIC/GCGB Chip Data File
'Chip: ATmega1284P
'Generated 6/Nov/2012
'Format last revised: (NEW)
Prog=131072
EEPROM=4096
RAM=16384
I/O=32
ADC=8
MaxMHz=20
Pins=40
Family=120
ConfigWords=0
GPR=32
MaxAddress=8704
HardwareMult=Y
XL:26
XH:27
YL:28
YH:29
ZL:30
ZH:31
ADCReady:ADC,48,ADIE,ADIF
Comp1Change:ANALOG_COMP,46,ACIE,ACI
EEPROMReady:EE_READY,50,EERIE,
ExtInt0:INT0,2,INT0,INTF0
ExtInt1:INT1,4,INT1,INTF1
ExtInt2:INT2,6,INT2,INTF2
PinChange0:PCINT0,8,PCIE0,PCIF0
PinChange1:PCINT1,10,PCIE1,PCIF1
PinChange2:PCINT2,12,PCIE2,PCIF2
PinChange3:PCINT3,14,PCIE3,PCIF3
SPIReady:SPI_STC,38,SPIE,SPIF
SPMReady:SPM_READY,54,SPMIE,
TWIReady:TWI,52,TWIE,TWINT
Timer0Match1:TIMER0_COMPA,32,OCIE0A,OCF0A
Timer0Match2:TIMER0_COMPB,34,OCIE0B,OCF0B
Timer0Overflow:TIMER0_OVF,36,TOIE0,TOV0
Timer1Capture:TIMER1_CAPT,24,ICIE1,ICF1
Timer1Match1:TIMER1_COMPA,26,OCIE1A,OCF1A
Timer1Match2:TIMER1_COMPB,28,OCIE1B,OCF1B
Timer1Overflow:TIMER1_OVF,30,TOIE1,TOV1
Timer2Match1:TIMER2_COMPA,18,OCIE2A,OCF2A
Timer2Match2:TIMER2_COMPB,20,OCIE2B,OCF2B
Timer2Overflow:TIMER2_OVF,22,TOIE2,TOV2
UsartRX1Ready:USART0_RX,40,RXCIE0,RXC0
UsartRX2Ready:USART1_RX,56,RXCIE1,RXC1
UsartTX1Ready:USART0_UDRE,42,UDRIE0,UDRE0
UsartTX1Sent:USART0_TX,44,TXCIE0,TXC0
UsartTX2Ready:USART1_UDRE,58,UDRIE1,UDRE1
UsartTX2Sent:USART1_TX,60,TXCIE1,TXC1
WDT:WDT,16,WDIE,
ADCSRB,123
ACSR,48
DIDR1,127
UDR0,198
UCSR0A,192
UCSR0B,193
UCSR0C,194
UBRR0H,197
UBRR0L,196
PORTA,2
DDRA,1
PINA,0
PORTB,5
DDRB,4
PINB,3
PORTC,8
DDRC,7
PINC,6
PORTD,11
DDRD,10
PIND,9
OCR0B,40
OCR0A,39
TCNT0,38
TCCR0B,37
TCCR0A,36
TIMSK0,110
TIFR0,21
GTCCR,35
TIMSK2,112
TIFR2,23
TCCR2A,176
TCCR2B,177
TCNT2,178
OCR2B,180
OCR2A,179
ASSR,182
WDTCSR,96
OCDR,49
MCUCR,53
MCUSR,52
SPMCSR,55
EICRA,105
EIMSK,29
EIFR,28
PCMSK3,115
PCMSK2,109
PCMSK1,108
PCMSK0,107
PCIFR,27
PCICR,104
ADMUX,124
ADCH,121
ADCL,120
ADCSRA,122
DIDR0,126
TIMSK1,111
TIFR1,22
TCCR1A,128
TCCR1B,129
TCCR1C,130
TCNT1H,133
TCNT1L,132
OCR1AH,137
OCR1AL,136
OCR1BH,139
OCR1BL,138
ICR1H,135
ICR1L,134
EEARH,34
EEARL,33
EEDR,32
EECR,31
TWAMR,189
TWBR,184
TWCR,188
TWSR,185
TWDR,187
TWAR,186
UDR1,206
UCSR1A,200
UCSR1B,201
UCSR1C,202
UBRR1H,205
UBRR1L,204
SREG,63
SPH,62
SPL,61
OSCCAL,102
CLKPR,97
SMCR,51
RAMPZ,59
GPIOR2,43
GPIOR1,42
GPIOR0,30
PRR0,100
SPDR,46
SPSR,45
SPCR,44
ACME,ADCSRB,6
ACD,ACSR,7
ACBG,ACSR,6
ACO,ACSR,5
ACI,ACSR,4
ACIE,ACSR,3
ACIC,ACSR,2
ACIS1,ACSR,1
ACIS0,ACSR,0
AIN1D,DIDR1,1
AIN0D,DIDR1,0
UDR0-7,UDR0,7
UDR0-6,UDR0,6
UDR0-5,UDR0,5
UDR0-4,UDR0,4
UDR0-3,UDR0,3
UDR0-2,UDR0,2
UDR0-1,UDR0,1
UDR0-0,UDR0,0
RXC0,UCSR0A,7
TXC0,UCSR0A,6
UDRE0,UCSR0A,5
FE0,UCSR0A,4
DOR0,UCSR0A,3
UPE0,UCSR0A,2
U2X0,UCSR0A,1
MPCM0,UCSR0A,0
RXCIE0,UCSR0B,7
TXCIE0,UCSR0B,6
UDRIE0,UCSR0B,5
RXEN0,UCSR0B,4
TXEN0,UCSR0B,3
UCSZ02,UCSR0B,2
RXB80,UCSR0B,1
TXB80,UCSR0B,0
UMSEL01,UCSR0C,7
UMSEL00,UCSR0C,6
UPM01,UCSR0C,5
UPM00,UCSR0C,4
USBS0,UCSR0C,3
UCSZ01,UCSR0C,2
UCSZ00,UCSR0C,1
UCPOL0,UCSR0C,0
UBRR11,UBRR0H,3
UBRR10,UBRR0H,2
UBRR9,UBRR0H,1
UBRR8,UBRR0H,0
UBRR7,UBRR0L,7
UBRR6,UBRR0L,6
UBRR5,UBRR0L,5
UBRR4,UBRR0L,4
UBRR3,UBRR0L,3
UBRR2,UBRR0L,2
UBRR1,UBRR0L,1
UBRR0,UBRR0L,0
PORTA7,PORTA,7
PORTA6,PORTA,6
PORTA5,PORTA,5
PORTA4,PORTA,4
PORTA3,PORTA,3
PORTA2,PORTA,2
PORTA1,PORTA,1
PORTA0,PORTA,0
DDA7,DDRA,7
DDA6,DDRA,6
DDA5,DDRA,5
DDA4,DDRA,4
DDA3,DDRA,3
DDA2,DDRA,2
DDA1,DDRA,1
DDA0,DDRA,0
PINA7,PINA,7
PINA6,PINA,6
PINA5,PINA,5
PINA4,PINA,4
PINA3,PINA,3
PINA2,PINA,2
PINA1,PINA,1
PINA0,PINA,0
PORTB7,PORTB,7
PORTB6,PORTB,6
PORTB5,PORTB,5
PORTB4,PORTB,4
PORTB3,PORTB,3
PORTB2,PORTB,2
PORTB1,PORTB,1
PORTB0,PORTB,0
DDB7,DDRB,7
DDB6,DDRB,6
DDB5,DDRB,5
DDB4,DDRB,4
DDB3,DDRB,3
DDB2,DDRB,2
DDB1,DDRB,1
DDB0,DDRB,0
PINB7,PINB,7
PINB6,PINB,6
PINB5,PINB,5
PINB4,PINB,4
PINB3,PINB,3
PINB2,PINB,2
PINB1,PINB,1
PINB0,PINB,0
PORTC7,PORTC,7
PORTC6,PORTC,6
PORTC5,PORTC,5
PORTC4,PORTC,4
PORTC3,PORTC,3
PORTC2,PORTC,2
PORTC1,PORTC,1
PORTC0,PORTC,0
DDC7,DDRC,7
DDC6,DDRC,6
DDC5,DDRC,5
DDC4,DDRC,4
DDC3,DDRC,3
DDC2,DDRC,2
DDC1,DDRC,1
DDC0,DDRC,0
PINC7,PINC,7
PINC6,PINC,6
PINC5,PINC,5
PINC4,PINC,4
PINC3,PINC,3
PINC2,PINC,2
PINC1,PINC,1
PINC0,PINC,0
PORTD7,PORTD,7
PORTD6,PORTD,6
PORTD5,PORTD,5
PORTD4,PORTD,4
PORTD3,PORTD,3
PORTD2,PORTD,2
PORTD1,PORTD,1
PORTD0,PORTD,0
DDD7,DDRD,7
DDD6,DDRD,6
DDD5,DDRD,5
DDD4,DDRD,4
DDD3,DDRD,3
DDD2,DDRD,2
DDD1,DDRD,1
DDD0,DDRD,0
PIND7,PIND,7
PIND6,PIND,6
PIND5,PIND,5
PIND4,PIND,4
PIND3,PIND,3
PIND2,PIND,2
PIND1,PIND,1
PIND0,PIND,0
OCR0B_7,OCR0B,7
OCR0B_6,OCR0B,6
OCR0B_5,OCR0B,5
OCR0B_4,OCR0B,4
OCR0B_3,OCR0B,3
OCR0B_2,OCR0B,2
OCR0B_1,OCR0B,1
OCR0B_0,OCR0B,0
OCROA_7,OCR0A,7
OCROA_6,OCR0A,6
OCROA_5,OCR0A,5
OCROA_4,OCR0A,4
OCROA_3,OCR0A,3
OCROA_2,OCR0A,2
OCROA_1,OCR0A,1
OCROA_0,OCR0A,0
TCNT0_7,TCNT0,7
TCNT0_6,TCNT0,6
TCNT0_5,TCNT0,5
TCNT0_4,TCNT0,4
TCNT0_3,TCNT0,3
TCNT0_2,TCNT0,2
TCNT0_1,TCNT0,1
TCNT0_0,TCNT0,0
FOC0A,TCCR0B,7
FOC0B,TCCR0B,6
WGM02,TCCR0B,3
CS02,TCCR0B,2
CS01,TCCR0B,1
CS00,TCCR0B,0
COM0A1,TCCR0A,7
COM0A0,TCCR0A,6
COM0B1,TCCR0A,5
COM0B0,TCCR0A,4
WGM01,TCCR0A,1
WGM00,TCCR0A,0
OCIE0B,TIMSK0,2
OCIE0A,TIMSK0,1
TOIE0,TIMSK0,0
OCF0B,TIFR0,2
OCF0A,TIFR0,1
TOV0,TIFR0,0
TSM,GTCCR,7
PSRSYNC,GTCCR,0
OCIE2B,TIMSK2,2
OCIE2A,TIMSK2,1
TOIE2,TIMSK2,0
OCF2B,TIFR2,2
OCF2A,TIFR2,1
TOV2,TIFR2,0
COM2A1,TCCR2A,7
COM2A0,TCCR2A,6
COM2B1,TCCR2A,5
COM2B0,TCCR2A,4
WGM21,TCCR2A,1
WGM20,TCCR2A,0
FOC2A,TCCR2B,7
FOC2B,TCCR2B,6
WGM22,TCCR2B,3
CS22,TCCR2B,2
CS21,TCCR2B,1
CS20,TCCR2B,0
TCNT2-7,TCNT2,7
TCNT2-6,TCNT2,6
TCNT2-5,TCNT2,5
TCNT2-4,TCNT2,4
TCNT2-3,TCNT2,3
TCNT2-2,TCNT2,2
TCNT2-1,TCNT2,1
TCNT2-0,TCNT2,0
OCR2-7,OCR2B,7
OCR2-6,OCR2B,6
OCR2-5,OCR2B,5
OCR2-4,OCR2B,4
OCR2-3,OCR2B,3
OCR2-2,OCR2B,2
OCR2-1,OCR2B,1
OCR2-0,OCR2B,0
EXCLK,ASSR,6
AS2,ASSR,5
TCN2UB,ASSR,4
OCR2AUB,ASSR,3
OCR2BUB,ASSR,2
TCR2AUB,ASSR,1
TCR2BUB,ASSR,0
PSRASY,GTCCR,1
WDIF,WDTCSR,7
WDIE,WDTCSR,6
WDP3,WDTCSR,5
WDCE,WDTCSR,4
WDE,WDTCSR,3
WDP2,WDTCSR,2
WDP1,WDTCSR,1
WDP0,WDTCSR,0
OCDR7,OCDR,7
OCDR6,OCDR,6
OCDR5,OCDR,5
OCDR4,OCDR,4
OCDR3,OCDR,3
OCDR2,OCDR,2
OCDR1,OCDR,1
OCDR0,OCDR,0
JTD,MCUCR,7
JTRF,MCUSR,4
SPMIE,SPMCSR,7
RWWSB,SPMCSR,6
SIGRD,SPMCSR,5
RWWSRE,SPMCSR,4
BLBSET,SPMCSR,3
PGWRT,SPMCSR,2
PGERS,SPMCSR,1
SPMEN,SPMCSR,0
ISC21,EICRA,5
ISC20,EICRA,4
ISC11,EICRA,3
ISC10,EICRA,2
ISC01,EICRA,1
ISC00,EICRA,0
INT2,EIMSK,2
INT1,EIMSK,1
INT0,EIMSK,0
INTF2,EIFR,2
INTF1,EIFR,1
INTF0,EIFR,0
PCINT31,PCMSK3,7
PCINT30,PCMSK3,6
PCINT29,PCMSK3,5
PCINT28,PCMSK3,4
PCINT27,PCMSK3,3
PCINT26,PCMSK3,2
PCINT25,PCMSK3,1
PCINT24,PCMSK3,0
PCINT23,PCMSK2,7
PCINT22,PCMSK2,6
PCINT21,PCMSK2,5
PCINT20,PCMSK2,4
PCINT19,PCMSK2,3
PCINT18,PCMSK2,2
PCINT17,PCMSK2,1
PCINT16,PCMSK2,0
PCINT15,PCMSK1,7
PCINT14,PCMSK1,6
PCINT13,PCMSK1,5
PCINT12,PCMSK1,4
PCINT11,PCMSK1,3
PCINT10,PCMSK1,2
PCINT9,PCMSK1,1
PCINT8,PCMSK1,0
PCINT7,PCMSK0,7
PCINT6,PCMSK0,6
PCINT5,PCMSK0,5
PCINT4,PCMSK0,4
PCINT3,PCMSK0,3
PCINT2,PCMSK0,2
PCINT1,PCMSK0,1
PCINT0,PCMSK0,0
PCIF3,PCIFR,3
PCIF2,PCIFR,2
PCIF1,PCIFR,1
PCIF0,PCIFR,0
PCIE3,PCICR,3
PCIE2,PCICR,2
PCIE1,PCICR,1
PCIE0,PCICR,0
REFS1,ADMUX,7
REFS0,ADMUX,6
ADLAR,ADMUX,5
MUX4,ADMUX,4
MUX3,ADMUX,3
MUX2,ADMUX,2
MUX1,ADMUX,1
MUX0,ADMUX,0
ADCH7,ADCH,7
ADCH6,ADCH,6
ADCH5,ADCH,5
ADCH4,ADCH,4
ADCH3,ADCH,3
ADCH2,ADCH,2
ADCH1,ADCH,1
ADCH0,ADCH,0
ADCL7,ADCL,7
ADCL6,ADCL,6
ADCL5,ADCL,5
ADCL4,ADCL,4
ADCL3,ADCL,3
ADCL2,ADCL,2
ADCL1,ADCL,1
ADCL0,ADCL,0
ADEN,ADCSRA,7
ADSC,ADCSRA,6
ADATE,ADCSRA,5
ADIF,ADCSRA,4
ADIE,ADCSRA,3
ADPS2,ADCSRA,2
ADPS1,ADCSRA,1
ADPS0,ADCSRA,0
ADTS2,ADCSRB,2
ADTS1,ADCSRB,1
ADTS0,ADCSRB,0
ADC7D,DIDR0,7
ADC6D,DIDR0,6
ADC5D,DIDR0,5
ADC4D,DIDR0,4
ADC3D,DIDR0,3
ADC2D,DIDR0,2
ADC1D,DIDR0,1
ADC0D,DIDR0,0
ICIE1,TIMSK1,5
OCIE1B,TIMSK1,2
OCIE1A,TIMSK1,1
TOIE1,TIMSK1,0
ICF1,TIFR1,5
OCF1B,TIFR1,2
OCF1A,TIFR1,1
TOV1,TIFR1,0
COM1A1,TCCR1A,7
COM1A0,TCCR1A,6
COM1B1,TCCR1A,5
COM1B0,TCCR1A,4
WGM11,TCCR1A,1
WGM10,TCCR1A,0
ICNC1,TCCR1B,7
ICES1,TCCR1B,6
WGM13,TCCR1B,4
WGM12,TCCR1B,3
CS12,TCCR1B,2
CS11,TCCR1B,1
CS10,TCCR1B,0
FOC1A,TCCR1C,7
FOC1B,TCCR1C,6
TCNT1H7,TCNT1H,7
TCNT1H6,TCNT1H,6
TCNT1H5,TCNT1H,5
TCNT1H4,TCNT1H,4
TCNT1H3,TCNT1H,3
TCNT1H2,TCNT1H,2
TCNT1H1,TCNT1H,1
TCNT1H0,TCNT1H,0
TCNT1L7,TCNT1L,7
TCNT1L6,TCNT1L,6
TCNT1L5,TCNT1L,5
TCNT1L4,TCNT1L,4
TCNT1L3,TCNT1L,3
TCNT1L2,TCNT1L,2
TCNT1L1,TCNT1L,1
TCNT1L0,TCNT1L,0
OCR1AH7,OCR1AH,7
OCR1AH6,OCR1AH,6
OCR1AH5,OCR1AH,5
OCR1AH4,OCR1AH,4
OCR1AH3,OCR1AH,3
OCR1AH2,OCR1AH,2
OCR1AH1,OCR1AH,1
OCR1AH0,OCR1AH,0
OCR1AL7,OCR1AL,7
OCR1AL6,OCR1AL,6
OCR1AL5,OCR1AL,5
OCR1AL4,OCR1AL,4
OCR1AL3,OCR1AL,3
OCR1AL2,OCR1AL,2
OCR1AL1,OCR1AL,1
OCR1AL0,OCR1AL,0
ICR1H7,ICR1H,7
ICR1H6,ICR1H,6
ICR1H5,ICR1H,5
ICR1H4,ICR1H,4
ICR1H3,ICR1H,3
ICR1H2,ICR1H,2
ICR1H1,ICR1H,1
ICR1H0,ICR1H,0
ICR1L7,ICR1L,7
ICR1L6,ICR1L,6
ICR1L5,ICR1L,5
ICR1L4,ICR1L,4
ICR1L3,ICR1L,3
ICR1L2,ICR1L,2
ICR1L1,ICR1L,1
ICR1L0,ICR1L,0
EEAR11,EEARH,3
EEAR10,EEARH,2
EEAR9,EEARH,1
EEAR8,EEARH,0
EEAR7,EEARL,7
EEAR6,EEARL,6
EEAR5,EEARL,5
EEAR4,EEARL,4
EEAR3,EEARL,3
EEAR2,EEARL,2
EEAR1,EEARL,1
EEAR0,EEARL,0
EEDR7,EEDR,7
EEDR6,EEDR,6
EEDR5,EEDR,5
EEDR4,EEDR,4
EEDR3,EEDR,3
EEDR2,EEDR,2
EEDR1,EEDR,1
EEDR0,EEDR,0
EEPM1,EECR,5
EEPM0,EECR,4
EERIE,EECR,3
EEMPE,EECR,2
EEPE,EECR,1
EERE,EECR,0
TWAM6,TWAMR,7
TWAM5,TWAMR,6
TWAM4,TWAMR,5
TWAM3,TWAMR,4
TWAM2,TWAMR,3
TWAM1,TWAMR,2
TWAM0,TWAMR,1
TWBR7,TWBR,7
TWBR6,TWBR,6
TWBR5,TWBR,5
TWBR4,TWBR,4
TWBR3,TWBR,3
TWBR2,TWBR,2
TWBR1,TWBR,1
TWBR0,TWBR,0
TWINT,TWCR,7
TWEA,TWCR,6
TWSTA,TWCR,5
TWSTO,TWCR,4
TWWC,TWCR,3
TWEN,TWCR,2
TWIE,TWCR,0
TWS7,TWSR,7
TWS6,TWSR,6
TWS5,TWSR,5
TWS4,TWSR,4
TWS3,TWSR,3
TWPS1,TWSR,1
TWPS0,TWSR,0
TWD7,TWDR,7
TWD6,TWDR,6
TWD5,TWDR,5
TWD4,TWDR,4
TWD3,TWDR,3
TWD2,TWDR,2
TWD1,TWDR,1
TWD0,TWDR,0
TWA6,TWAR,7
TWA5,TWAR,6
TWA4,TWAR,5
TWA3,TWAR,4
TWA2,TWAR,3
TWA1,TWAR,2
TWA0,TWAR,1
TWGCE,TWAR,0
UDR1-7,UDR1,7
UDR1-6,UDR1,6
UDR1-5,UDR1,5
UDR1-4,UDR1,4
UDR1-3,UDR1,3
UDR1-2,UDR1,2
UDR1-1,UDR1,1
UDR1-0,UDR1,0
RXC1,UCSR1A,7
TXC1,UCSR1A,6
UDRE1,UCSR1A,5
FE1,UCSR1A,4
DOR1,UCSR1A,3
UPE1,UCSR1A,2
U2X1,UCSR1A,1
MPCM1,UCSR1A,0
RXCIE1,UCSR1B,7
TXCIE1,UCSR1B,6
UDRIE1,UCSR1B,5
RXEN1,UCSR1B,4
TXEN1,UCSR1B,3
UCSZ12,UCSR1B,2
RXB81,UCSR1B,1
TXB81,UCSR1B,0
UMSEL11,UCSR1C,7
UMSEL10,UCSR1C,6
UPM11,UCSR1C,5
UPM10,UCSR1C,4
USBS1,UCSR1C,3
UCSZ11,UCSR1C,2
UCSZ10,UCSR1C,1
UCPOL1,UCSR1C,0
I,SREG,7
T,SREG,6
H,SREG,5
S,SREG,4
V,SREG,3
N,SREG,2
Z,SREG,1
C,SREG,0
SP12,SPH,4
SP11,SPH,3
SP10,SPH,2
SP9,SPH,1
SP8,SPH,0
SP7,SPL,7
SP6,SPL,6
SP5,SPL,5
SP4,SPL,4
SP3,SPL,3
SP2,SPL,2
SP1,SPL,1
SP0,SPL,0
BODS,MCUCR,6
BODSE,MCUCR,5
PUD,MCUCR,4
IVSEL,MCUCR,1
IVCE,MCUCR,0
WDRF,MCUSR,3
BORF,MCUSR,2
EXTRF,MCUSR,1
PORF,MCUSR,0
CAL7,OSCCAL,7
CAL6,OSCCAL,6
CAL5,OSCCAL,5
CAL4,OSCCAL,4
CAL3,OSCCAL,3
CAL2,OSCCAL,2
CAL1,OSCCAL,1
CAL0,OSCCAL,0
CLKPCE,CLKPR,7
CLKPS3,CLKPR,3
CLKPS2,CLKPR,2
CLKPS1,CLKPR,1
CLKPS0,CLKPR,0
SM2,SMCR,3
SM1,SMCR,2
SM0,SMCR,1
SE,SMCR,0
RAMPZ0,RAMPZ,0
GPIOR27,GPIOR2,7
GPIOR26,GPIOR2,6
GPIOR25,GPIOR2,5
GPIOR24,GPIOR2,4
GPIOR23,GPIOR2,3
GPIOR22,GPIOR2,2
GPIOR21,GPIOR2,1
GPIOR20,GPIOR2,0
GPIOR17,GPIOR1,7
GPIOR16,GPIOR1,6
GPIOR15,GPIOR1,5
GPIOR14,GPIOR1,4
GPIOR13,GPIOR1,3
GPIOR12,GPIOR1,2
GPIOR11,GPIOR1,1
GPIOR10,GPIOR1,0
GPIOR07,GPIOR0,7
GPIOR06,GPIOR0,6
GPIOR05,GPIOR0,5
GPIOR04,GPIOR0,4
GPIOR03,GPIOR0,3
GPIOR02,GPIOR0,2
GPIOR01,GPIOR0,1
GPIOR00,GPIOR0,0
PRTWI,PRR0,7
PRTIM2,PRR0,6
PRTIM0,PRR0,5
PRUSART1,PRR0,4
PRTIM1,PRR0,3
PRSPI,PRR0,2
PRUSART0,PRR0,1
PRADC,PRR0,0
SPDR7,SPDR,7
SPDR6,SPDR,6
SPDR5,SPDR,5
SPDR4,SPDR,4
SPDR3,SPDR,3
SPDR2,SPDR,2
SPDR1,SPDR,1
SPDR0,SPDR,0
SPIF,SPSR,7
WCOL,SPSR,6
SPI2X,SPSR,0
SPIE,SPCR,7
SPE,SPCR,6
DORD,SPCR,5
MSTR,SPCR,4
CPOL,SPCR,3
CPHA,SPCR,2
SPR1,SPCR,1
SPR0,SPCR,0
100:2200
1,PB5(IO),MOSI(IO),PCINT13(IO)
2,PB6(IO),MISO(IO),PCINT14(IO)
3,PB7(IO),SCK(IO),PCINT15(IO)
4,RESET
5,VCC
6,GND
7,XTAL2
8,XTAL1
9,PD0(IO),RXD(IO),PCINT24(IO)
10,PD1(IO),TXD(IO),PCINT25(IO)
11,PD2(IO),INT0(IO),RDX1(IO),PCINT26(IO)
12,PD3(IO),INT1(IO),TXD1(IO),PCINT27(IO)
13,PD4(IO),OC1B(IO),XCK1(IO),PCINT28(IO)
14,PD5(IO),OC1A(IO),PCINT29(IO)
15,PD6(IO),ICP(IO),OC2B(IO),PCINT30(IO)
16,PD7(IO),OC2A(IO),PCINT31(IO)
17,VCC
18,GND
19,PC0(IO),SCL(IO),PCINT16(IO)
20,PC1(IO),SDA(IO),PCINT17(IO)
21,PC2(IO),TCK(IO),PCINT18(IO)
22,PC3(IO),TMS(IO),PCINT19(IO)
23,PC4(IO),TDO(IO),PCINT20(IO)
24,PC5(IO),TDI(IO),PCINT21(IO)
25,PC6(IO),TOSC1(IO),PCINT22(IO)
26,PC7(IO),TOSC2(IO),PCINT23(IO)
27,AVCC
28,AGND
29,AREF
30,PA7(IO),ADC7(I),PCINT7(IO)
31,PA6(IO),ADC6(I),PCINT6(IO)
32,PA5(IO),ADC5(I),PCINT5(IO)
33,PA4(IO),ADC4(I),PCINT4(IO)
34,PA3(IO),ADC3(I),PCINT3(IO)
35,PA2(IO),ADC2(I),PCINT2(IO)
36,PA1(IO),ADC1(I),PCINT1(IO)
37,PA0(IO),ADC0(I),PCINT0(IO)
38,VCC
39,GND
40,PB0(IO),XCK(IO),T0(IO),PCINT9(IO)
41,PB1(IO),T1(IO),CLKO(IO),PCINT9(IO)
42,PB2(IO),AIN0(I),INT2(IO),PCINT10(IO)
43,PB3(IO),AIN1(I),OC0A(IO),PCINT11(IO)
44,PB4(IO),SS(IO),OC0B(IO),PCINT12(IO)
NoConfig-PRG
NoConfig-PRG
Just a quick update, it seems the Clock issue is only with brand new chips from the factory, if it`s ever worked with an external crystal and you`re just overwriting it with Basic, then it`ll work fine.
if you are using a New chip, you`ll need to set to set the Low Fuse Byte (I set mine to 0xFF) and now I can run at the full 20MHz with an external crystal.
there is a Way to do it Manually in the GCC command line too, perhaps this could be incorporated into the ChipData file or perhaps a Configs bolt-on?
anyway, I`ll continue testing this in the morning, but for now all`s looking good!
Enjoy ;)