Is there a minimum oscillator frequency when doing I2C communication?
I've been setting my clock rate quite low and it still seems to work, but is often a bit unpredicable at startup.
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I was just wondering as I make mainly battery powered devices I like to keep the clock frequency low (when out of sleep). Anyway using a PIC I had the oscillator at 0.25 MHz and the soft I2C was still working which I thought was improbable.
Is there any advantage in using hardware I2C? Both soft and hard seem to give equal performance.
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It works well with a higher clock? The I2C protocol timing is synchronous, so a whole range of clock rates should be possible. I have done 1Mbs clock hardware serial with PIC to PIC and NXP fast I2C devices, haven't tried the slowest clock possible. Hardware serial is best if available on device, as less instructions and wait times involved.
Having looked at the software I2C.h, it specifies default wait delays of 1us and 2us. So not sure how a 250kHz clock is going to handle that.
A low clock could be false economy for Main code execution when using sleep? For example, the current draw may be 8 times more for the higher clock, but the instruction speed is 32 times greater.
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Is there a minimum oscillator frequency when doing I2C communication?
I've been setting my clock rate quite low and it still seems to work, but is often a bit unpredicable at startup.
Hi, not enough information.
Chip type? PIC or AVR
What frequency?
Hardware or software ic2/twi?
I2c or i2c2?
What else is within the solution? This will impact startup.
Anobium
I was just wondering as I make mainly battery powered devices I like to keep the clock frequency low (when out of sleep). Anyway using a PIC I had the oscillator at 0.25 MHz and the soft I2C was still working which I thought was improbable.
Is there any advantage in using hardware I2C? Both soft and hard seem to give equal performance.
It works well with a higher clock? The I2C protocol timing is synchronous, so a whole range of clock rates should be possible. I have done 1Mbs clock hardware serial with PIC to PIC and NXP fast I2C devices, haven't tried the slowest clock possible. Hardware serial is best if available on device, as less instructions and wait times involved.
Having looked at the software I2C.h, it specifies default wait delays of 1us and 2us. So not sure how a 250kHz clock is going to handle that.
A low clock could be false economy for Main code execution when using sleep? For example, the current draw may be 8 times more for the higher clock, but the instruction speed is 32 times greater.