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Next Formal Release of Great Cow BASIC

Anobium
2022-01-09
2022-01-29
  • Anobium

    Anobium - 2022-01-09

    https://sourceforge.net/projects/gcbasic/files/Release%20Candidates/

    Select an installer exe and enjoy.

    Evan


    The time is right to release - Microchip have just release PIC-AS 2.35 and this version has been integrated to support PIC-AS 2.35. I have wanted to release for weeks but the delay in PIC-AS has caused the delay.

    Remember, for the release note see https://1drv.ms/x/s!Ase-PX_n_4cvhJAysbPF3VJAnYaj3A


    Lots of new stuff, fixes and improvements

    • Fix: For missing constant in the 16F17xx chipfiles to support PMW16 capability. Added PWM16TYPE=1 to dat file. CHIPDATA.CSV updated for 9 chips, these chips were re'gened.[1246]
    • "Fix: For FOR-NEXT loop when using a negated step value. A negated step value is no longer permitted as this is cast as byte, and, the transform in preprocessor breaks legacy FOR-NEXT support. Resolution: 1) Inspect step variable type and negate is not present 2) Cast in the compiler as integer when the loop variable is an integer[1247,1248]
    • Considered non critical issue as use of negating was issuing a valid error message."
    • Fix: Updated reserved words list[1249]
    • Fix: Updated to support Microchip website changes. Website changes broke Datasheet, Errata and Home page links. Now version v2.90e.
    • Fix: Updated to XOJO latest release. Now version v2.90G
    • Fix: For missing constant in the 16F183xx chipfiles to support 31k capability. CHIPDATA.CSV updated for chips, changing 31k OSSCON1 to 64, these chips were re'gened[1250]
    • Fix: For missing label for 10ms [1251]
    • Fix: Add Fix for errata bug in DS40001816F in 18fX6K40 chips[1252]
    • Fix: Add Fix for errata bug in DS40001816F in 18fX6K40 chips[1252]
    • Fix: Rewrite of NVMADR_EPWrite/EPread to better support 18fxxQxx chips/NVMADRU register moving to ChipSubFamily resolve RD issue and adding Q40 support[1253,1255]
    • Fix: 18FxxQ40 memory map corrected. Change GETCHIPDATA source to handle Q40s. It was missing from GETCHIPDATA handler.[1256]
    • Fix: Added ADREADPREREADCOMMAND to AVR read to enable setting of any register prior to ADC read operation[1257,1265,1267]
    • New: Improved interrupt latency by adding Family 15 ( 12F and 16F ) interrupt handler to use shadow locations for system variables, therefore use chips automatic context saving[1258]
    • New: Improved interrupt latency for all Family 16 ( 18F ), was just K42 chips, interrupt handler to use shadow locations for system variables, therefore use chips automatic context saving[1259]
    • Fix: Resolves issue with creation of constants that are not required. Library contains development guideline for the creation of library constants.[1260]
    • New: Add MVECEN = ON 'not supported' message.[1261]
    • Update xpt2046.h and the 330_using_glcd_touch_xpt2046_demonstation_for_ili9341_lgtf328p.gcb demo. Revise XPT2046 library to support LGT chips using software SPI[1266]
    • Add SysMultSub64, SysDivSub64, SysCompEqual64 and SysCompLessThan64[1262,3]. WARNING WARNING - these changes will require updating when IF-THEN support Advanced Variables.
    • Change USART=0 to USART=1. Change the master CSV and regen these chip files tiny2313 & tiny2313a [1264]
    • Rename Programmer from Microchip Xpress CNANO Boards USB [16f18466] to Microchip CNANO USB [16F & 18F]
    • Updated: USB Drivers Setup Great-Cow-BASIC-Demonstration-Sources/USB_Solutions/GreatCowBASIC_Solutions/LIBWINUSB_Solutions/WindowsDeviceDriver/
    • For Q43 I2C discovery. Revised SI2CDiscovery adding #IFDEF var(I2C1CNTL) and #IFDEF var(I2C1CNT) to isolate Q43 that only supports I2C1CNT[1268]
    • Fix: Errata and Programming now work after the Microchip website changes... tool now uses an improved Regex to dertermine the PDFs. Now version v2.90i
    • New: Now launches web page if cannot find ERRATA or PROGRAMMING PDF. Now version v2.90k
    • Fix: Resolves Q41 family chip EEPROM write error caused by bit naming[1270]
    • Fix: Resolves silent crash when two functions of same name exists. Now handles and issues correct error message[1269]
    • Fix: For out of bounds memory array in compiler[1271]
    • Fix: Resolves Rs232 script creation of constants.[1272]
    • New: Examines source web page for ERRATA or PROGRAMMING PDF, opening web page if more that one instance found, Also, now exposes search strings in PREFERENCES. Now version v2.90M
    • Fix: Resolve out of bounds memory array in compiler in 32bit version only in VARADDRESS(), and, resolve pointer warning during compilation [1273]
    • Fix: Resolve error where generated ASM was optimised incorrectly for end of sub call. Changes to AsmOptimiser() [1274]
    • Fix: Resolve further error introduced at [1037] where generated ASM was optimised incorrectly for end of sub call. Changes to AsmOptimiser()[1275]
    • "Fix: Resolve CONCAT system variable issue.[1276]
    • Fix: Compiler updated to simplify CONCAT. Now supports SYSDEFAULTCONCATSTRING to set the size of the system variable used for concat operations.[1278]"
    • New: Added USART1_BAUD_RATE support in script so USART1_BAUD_RATE equates to USART_BAUD_RATE.[1277]
    • Fix: Compiler updated to improve handling of wait parameters. Resolves the incorrect specification of time units. wait 4 10[space]us [1278]
    • Fix: Scripting in the compiler now correctly handles the existence of constant with no value.[1279]
    • Fix: Resolve lockup caused by missing #ENDSCRIPT [1280]
    • Fix: Performance improvement to change 1041[1281]
    • Fix: Resolves scripting support for IF, DEF() and NODEF() for testing constants [1282]
    • Fix: Change to Wait() to reduce the cycles by one cycle to resolve wait 1 us error. Implements WAITP1() to expose old timing method.
    • Fix: Change to Wait() to reduce the wait cycle by one cycle to resolve wait 1 us error in PULSEOUT(). Implements WAITL1() to expose new timing method - this replace change 1046.[1283]
    • Fix: stdbasic.h Change PULSEx delays to one cycle less using WAITL1 [1284]
    • New: SynWrite Helpers to add SYSDEFAULTCONCATSTRING.
    • "New: Add new delay routines for WAIT() when the frequency is less then 96 kHz. This essentially means that WAIT() for 31kHz are now correct. [1286]
    • MS Delays at Clock frequency’s below 28kHz are not supported and will silently fail.
    • US Delays at Clock frequency’s below 250kHz are not supported and will silently fail.
    • US Delays at lower Clock frequency’s is accurate ONLY when nn is divisible by 4. This is caused by the minimum ASM delay loop being a specific number of instructions.
    • US Delays at lower Clock frequency’ when not divisible by 4 will silently accept the nn value and incorrect delays will be produced.
    • Delays at Clock frequency’s below 500kHz may be impacted by previous instructions; testing of actual delays is advised. Tested on PIC only. This may work on AVR however this was not tested.
    • This change was implemented by Angel Mier - most grateful"
    • Delays of less than 28kHz are not support and will silently fail.
    • Added support for 31k to 12(L)F1501 [1287]
    • Added new MCUs[1288]
    • 18F26K83, 18F27K83, 18F26K83, 18F46K83, 18F47K83
    • 18F26K84, 18F27K84, 18F26K84, 18F46K84, 18F47K84
    • USART.H updated
    • EEPROM.H updated
    • PICAS: Fix for Q83 and Q84 CRC PIC-AS configs. Essentially increase the array size.[1289]
    • Message update only. SourceForge prompt. Non-functional change[1290]
    • Corrected K83 chipsubfamily[1291]
    • Improved GCGB UI for selection of config[]
    • "Correction to the DAT files for 18FxxQ8x - from information from Microchip. [1293]
    • The correct amount of GPR bytes for the two device families are 8192 bytes for the x6Q83/84 and 12,800 bytes for the x7Q83/84. The devices also have 256 bytes of RAM that is used as a buffer for the NVM module and 2048 bytes of RAM that is dedicated to use by the CAN FD module’s FIFOs.
    • The MICROCHIP division has noted the correction and will be reflected in the coming revisions of datasheets and will also make sure that the website matches the 12800 value rather than the 13000 value"
    • Correct the EE address for table creation on Q40 chipfamily[1294,1297]
    • PIC-AS support added for 2.35 toolchain. Isolation of 2.32 PIC-AS patches.[1295]
    • Resolves AVR table read byte to array element. Created cache to ensure the array element is not overwritten.[1295-1296]
    • Update to SSD1306 library to improve memory requirements message[1298]
    • Update to ST7735 library to improve libraries isolation[1298]
    • Update to message to improve errors in SFRs[1298]
    • Add CANBUS.H and demos[1299]
    • Added and updated 100s of demos
     
  • stan cartwright

    stan cartwright - 2022-01-16

    I installed latest release over last july build. Cheers for the work.
    I tried the LGT8F328P ILI9341 XPT2046 Touch demo and noticed it showed an error when

     #define XPT2046_HARDWARESPI
    

    was used.
    I used

     #define XPT2046_SOFTWARESPI
    

    with

    #define ILI9341_HARDWARESPI
    

    and it works! I thought there was a problem with the LGT8F328P ILI9341 XPT2046 Touch
    in that the ILI9341 needed to be SOFTWARESPI for the XPT2046 Touch to work with LGT8F328P but now the display can use hardwarespi and with the lgt that was the whole point..
    ie the fast display. The touch on this display is more interesting now. Tidy.

    From your download link sourceforge always shows latest gcb top left button when it's in the list below. Confusing.
    Do I need the patches? Cheers.

     

    Last edit: stan cartwright 2022-01-16
    • Anobium

      Anobium - 2022-01-16

      Good to hear! Thanks to all!


      The LGT XPT. I fixed it. It now switches from one SPI mode to another automatically.


      See change log - 28/08/2021 1023 NEW XPT XPT Yes LGT Not required Update xpt2046.h and the 330_using_glcd_touch_xpt2046_demonstation_for_ili9341_lgtf328p.gcb demo. Revise XPT2046 library to support LGT chips using software SPI[1266]


      Re Patches they are for the PIC18FxxQ40 chip family. So, if you have PIC18FxxQ40 then apply the fix.

       
      • stan cartwright

        stan cartwright - 2022-01-16

        "The LGT XPT. I fixed it. It now switches from one SPI mode to another automatically."
        Great work! LGT support is definitely a feather in gcb hat.

         
        • Anobium

          Anobium - 2022-01-16

          Yes. I have purchased a lot of LGT boards. Using them all the time - fast.

           
          • stan cartwright

            stan cartwright - 2022-01-16

            And the lgt328 is 3.3V logic and most ili9341 are 3.3V logic... A match made in Evan.
            You wrote the code to support these devices.
            They're both cheap and wish more people got onboard and used them after you and others work. You can do some cool displays using the trig include.
            I will look up cam bus next... thinking it's like one of those gadgets you plug in your car to clear faults. I know there's an avr chip with the protocol on one pin.
            I'll try to simulate problems on the forum resolved in this build with avr to test.
            I don't do pics.
            I'll have to test lgt analogue, is it 0 to 3.3V? I don't do spec sheets either.

             
            • Anobium

              Anobium - 2022-01-16

              Should all work ok re ADC.


              I did not write the support. It was a team effort Frank, Brendan, yourself and me.

               

              Last edit: Anobium 2022-01-16
  • William Roth

    William Roth - 2022-01-17

    I see a release candidate [1064] but no formal release.

    When can we expect to see the actual formal release?

     
    • Anobium

      Anobium - 2022-01-17

      I was going to leave it for a few weeks - see if anything major is reported.
      I am not expecting any issues. The changes, whilst major, have been tested and the code is getting more and more stable.

      I have added proper Q40 support since the 1064, so, an updated release is needed.

       

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