Re: [Fx2lib-devel] Isochronous Streaming Using LibUSB from FPGA

[Chris M. <fx...@m3...>]

FWIW, even with the FIFO flags clamped to endlessly source (or sink)
data, I have never managed to get bulk reads (or writes) using LibUSB to
give more than 25MiB/s on Linux and 18MiB/s on Windows.

Admittedly that is for bulk transfers which have more overheads than
iso, and I have only tried the 0.1.x releases of LibUSB because they're
API-compatible across Windows, MacOS and Linux.

The only other thing I can suggest is to compare the throughput you get
with my firmware, host code and VHDL[1], but unless your FPGA board is a
Digilent Nexys2, you will have to do some work on the pin constraints
for your board. And remember this only deals with bulk, not iso.

Sorry I can't be more helpful!

Chris

[1] http://www.makestuff.eu/wordpress/?page_id=1400


On Thu, 2011-07-07 at 12:33 -0400, Phil Behnke wrote:
> Hi All,
> 
> I've been have a issue streaming data from an FPGA to a PC using the
> FX2LP and LibUSB.  The FPGA is sending 8 bits to the FX2 at a rate of
> 20MHz (152 Mbps) using isochronous mode.  The problem I'm having is
> that I cannot get data from the FX2's buffer to the PC fast enough and
> the buffer becomes full, causing me to miss some data.  I'm not sure
> where the bottle neck is.  The FX2 is set to iso mode, with 1024 bytes
> per packet, and 3 packets per microframe, so I should have enough
> bandwidth to empty the buffer.  I'm attached my firmware (fpga.c),
> descriptor file, and libusb driver.  The driver was written in Python
> using python-libusb1 wrappers.  I have a LED on the FPGA board which
> will read the FULL flag on the FX2 and light an LED when full.  By
> inspection, it looks like the LED is lit at about 50% duty cycle.
> I've been working on this for quite a while and would really
> appreciate any tips.
> 
> Thanks!
> 
> Best Regards,
> Phil Behnke
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