[Fx2lib-devel] First packets from FIFO repeating

[Eric W. <er...@wi...>]

Hi,

I have EP2IN set up as 512 bulk double buffered.  I am filling the 
EP2FIFOBUF manually and committing the packets with EP2BCH = 0x02; 
EP2BCL = 0x00;  I end up getting the first 0x0400 packets repeated like so:

Bulk IN Transfer
Bulk IN success.
Buffer Contents
0000  66 99 EE 33 66 99 00 00 10 10 00 00 10 10 00 00 // notice my start 
of data mark.  The code that writes this only happens once.
0010  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
0020  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
...
03E0  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
03F0  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
0400  66 99 EE 33 66 99 00 00 10 10 00 00 10 10 00 00 // Yet it is 
repeating.  I'm getting the two FIFOs of EP2IN resent.
0410  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
0420  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
...
07E0  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
07F0  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
0800  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00 // Then all is 
fine there after.  No more resends
0810  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00
0820  10 10 00 00 10 10 00 00 10 10 00 00 10 10 00 00

Note that I should get 0000 - 01FF as EP2FIFO buffer 0, 0200 - 003FF as 
EP2FIFO buffer 1, then back to buffer 0 for 0400 - 05FF and buffer 1 for 
0600 - 07FF, etc.  I should not see packets 0 and 1 repeated in packets 
2, and 3 of the sequence.  Also, notice that I am no longer repeating 
from packet 4 on.  I have tested this about with various bit patterns 
and I am repeating (recommitting) the first two packets.

I'm set up this way:

TD_Init()

    EP2CFG = 0xE2;                // EP2IN, bulk, size 512, 2x buffered 
b'1110 0010
    SYNCDELAY;
    EP2FIFOCFG = 0x04;            // manual mode, enable PKTEND zero 
length send, byte ops (b'0000 0100)
    SYNCDELAY;
    FIFORESET = 0x80;            // set NAKALL bit to NAK all transfers 
from host
    SYNCDELAY;
    FIFORESET = 0x02;            // reset EP2 FIFO
    SYNCDELAY;
    FIFORESET = 0x00;            // clear NAKALL bit to resume normal 
operation
    SYNCDELAY;

TD_Poll()
// My code to load EP2FIFOBUF[].  EP2FIFOBUF[Ai++] = AiCount; of 
AiCount/3 works great as a bit pattern to make the repeating visible.  
Where AiCount is incremented on each call of TD_Poll()

// Then I arm the packet for sending by the SIE like so:

        if(Ai == 512)                                    // When Ai = 
512 we have filled one of the EP 512 byte buffers
        {
            Ai = 0;                                            // Reset 
the counter so we can fill the next buffer
            SYNCDELAY;                                        // see TRM 
section 15.15, pg 315.  We are writing/reading a register within 
0xE600-0xE6FF                   
            EP2BCH = 0x02;                                    // Prepare 
to ARM the EP for an IN transaction (High byte must be first)
            SYNCDELAY;                                        // see TRM 
section 15.15, pg 315.  We are writing/reading a register within 
0xE600-0xE6FF                   
            EP2BCL = 0x00;                                    // Now arm 
the EP for transfer by loading the low byte of the byte count (512 bytes)
        }

What am I missing that is allowing the first use of the buffers to be 
recommitted?

Eric Winsor