Is it possible to emulate MB-02+ disc interface? It is relatively spread in Europe. I can provide documentation if needed.
Yes, it is possible....
But.... not just documentation needed (e.g. schematics, "user guide"), but disk images and disk image description too.
Hmm... and a hardware level description would be nice. (uses what ports, how does ROM/RAM paging etc...)
last comment added by Gergely... sorry
I can prepare such things (mainly need translation to english), then I can send it to dev team.
As I promised, complete documentation for MB-02+ is ready. Since it has 2.5MB you can download it here:
1. what about copyrigth state of this text? May we post this information to www.worldofspectrum.org?
2. It will be nice, if we have some more 'lower level' technical information. For emulation we need 'port level informations'. What you send is rather useful for a programmer (who write software on speccy).
So, what is badly needed: e.g.
- when PC hit 0x#### then ROM paged in etc
- when OUT 0x#### then RAM paged out etc
- port 0x#### is wd279x command reg etc
- how we reach DMA chip etc...
- About the .mbd file. It will be nice to know, how sector data stored in file. I found that, in the image file just the data of sectors stored only (no sector headers...) I guess (from the file size and the tap2mdb.cc prog) that, MB02 uses 2 side, 82 cylinder, 11 sector/track and 1024 byte /sector format, but the sector order is unknown for me. (eg. h0t0s0; h0t0s1 .. h0t0s10, h1t0s0; or h0t0s0; h0t0s1 .. h0t0s10, h0t1s0 ...) And how to sectors numbered (from 0, or from 1)?
If you don't know this information we have to find out from schematic and from dissasembly of ROM, etc... So, than a far slower thing, to implement the emulation...
1. documentation is freely available, you can post it to WOS
2., 3. will try to get such info directly from BUSYSOFT (BSDOS author), port description is at the end of MB-02plus.manual.english.doc
So here are the answers:
> So, what is badly needed: e.g.
> - when PC hit 0x#### then ROM paged in etc
MB02 has no any automapper, any pagging memory
space on #0000-#3FFF is done with explicit OUT by software.
> - when OUT 0x#### then RAM paged out etc
> - port 0x#### is wd279x command reg etc
Peripheral address layout follows later.
> - how we reach DMA chip etc...
DMA is standart Z80-DMA chip accessible on port 0x0B.
> - About the .mbd file. It will be nice to know, how sector data stored
> in file. I found that, in the image file just the data of sectors stored
Yes, MBD file is only set of all sectors on the disk.
Order of sectors in MBD file corresponds with their logical numbers.
> only (no sector headers...) I guess (from the file size and the tap2mdb.cc
> prog) that, MB02 uses 2 side, 82 cylinder, 11 sector/track and 1024 byte
2 sides, 82 tracks and 11 sec/trk is only one specific case.
In general, number of tracks depends on disk drive (usually 40 or 80)
and number of sectors per track depends on capacity of physical track.
Usually it is 5 for DD disks and 11 for HD disks and 15 for ramdisk.
Other logical disks on another media (HDD, CF, SD...) can have
any number sec/trk from 2 to 127. There are usually used MBD
with 8 sec/trk and 127 tracks. It takes disk with capacity 2 MB.
2 side is mandatory, when diskette has only one side,
all sectors on non-existent side has label BAD SECTOR in FAT.
All needed information about sides, tracks and sec/trk
are written in boot sector - or the first sector in MBD file.
> /sector format, but the sector order is unknown for me.
> (eg. h0t0s0; h0t0s1 .. h0t0s10, h1t0s0; or h0t0s0;
> h0t0s1 .. h0t0s10, h0t1s0 ...) And how to
> sectors numbered (from 0, or from 1)?
All rules for it are the same
as on old classic MSDOS diskettes.
Tracks(cylinders) and sides are numbered from zero,
sectors on track are numbered from one.
Let sec/trk = 8. Then the order will be:
Physical number (head/track/sector) = Logical number (order in MBD file)
h0t0s1 = 0
h0t0s2 = 1
h0t0s7 = 6
h0t0s8 = 7
h1t0s1 = 8
h1t0s2 = 9
h1t0s7 = 14
h1t0s8 = 15
h0t1s1 = 16
h0t1s2 = 17
h0t1s7 = 22
h0t1s8 = 23
h1t1s1 = 24
And now, the peripheral address layout of MB02:
xxxxAAAA 0xx00011 = RTC (16 registers, addresable by A8-A11)
xxxxxxxx 0xx00111 = not used
xxxxxxxx 0xx01011 = Z80-DMA (software should use 0x0B)
xxxxxxxx 0AA01111 = WD2797 (4 registers addresble by A5-A6)
xxxxxxxx 00A10011 = drive control (described later)
xxxxxxxx 00010111 = memory control (described later)
xxxxxxxx 0AA11011 = 8255-2 (4 registers addresble by A5-A6)
xxxxxxxx 0AA11111 = 8255-1 (4 registers addresble by A5-A6)
Address=0x13 Dir=OUT ... motors and disk select control for 4 disk drives
Address=0x13 Dir=IN .... read status of disk drives
Address=0x33 Dir=OUT ... bit0 = select density: 0=DD, 1=HD
Detailed meaning of bits is described in attachment.
Address=0x17 Dir=OUT only (not defined for IN)
Bit 0-4 ... RAM memory bank select (32 banks, 16kB each, together 512kB RAM)
Bit 5 ..... Write enable for 512kB ram (0=write protect, 1=write enable)
Bit 6 ..... RAM enable (0=rom/eeprom, 1=512kB ram)
Bit 7 ..... ROM/EEPROM (0=original ZX rom, 1=boot eeprom)
Setting both bit6 and bit7 to 1 causes activated RESET signal
and it resets whole Spectrum, the same as RESET button is pressed.
xxxxxxxx 0xx00111 = not used
is marked as HDD (harddisk access) in attached
documentation but this port is not used for HDD.
HDD it is accessible via standat divIDE ports.
All other informations are in MB-02+ English manual, which you already have.
I open a patch item#2858687 for it...
"MB02 has no any automapper, any pagging memory
space on #0000-#3FFF is done with explicit OUT by software."
This is not really true, because MB-02+ somehow have to bootup, so when Spectrum reset, MB-02 map the 'boot ROM' to address space 0x0000-0x07ff.
You include only a 2k BOOT ROM, but schematics talk about 64k ROM, and the manual talking about BS-ROM, BS-DOS, BS-BIOS, all these in the BOOT-ROM or ...?
At bootup only /ROMCS is used. No automapping point. MB-02+ has up to 512kB SRAM memory, so BSROM&BSDOS sitting in first two banks of it. BS-BIOS is part of BSDOS. Default bootrom chip has 2k, can be upgraded to 64kB or after small hw patch to 32k or 128k FLASH ROM.
BTW... IMHO... to pull /ROMCS when /RESET is a kind of automapping "point" ... :)
> xxxxxxxx 00010111 = memory control (described later)
It's bad port adressation.
This is true port decoding:
See true MB02 schematic with fixed bugs:
> At bootup only /ROMCS is used. No automapping point. MB-02+ has up to 512kB
> SRAM memory, so BSROM&BSDOS sitting in first two banks of it. BS-BIOS is part
> of BSDOS. Default bootrom chip has 2k, can be upgraded to 64kB or after small hw
> patch to 32k or 128k FLASH ROM.
Original 2kB rom is mirrored on each next 2kB in low 16kB adress space !
(from adress 0, 2048, 4096, 6144, 8192, etc... = Next adress lines is not connect to 2kB rom chip)
Rom memory is also upgraded to 512kB (paging port support 32 pages). Actually is used on MB02 only 32,64 or 128kB rom upgrades.
Complette info about memory paging:
- after start / reset your ZX Spectrum will disabled internal ZX rom and connect external MB02 rom page 0 with write protect
- after press NMI button is always disabled internal ZX rom and connect external MB02 sram page 0 with write protect (set memory port to value #40)
- after read memory port 23 will return undefined value (as I test on real hardware - return always stable value 255)
- memory port adressation ignore state of A6 and A5 adress lines
( xxxxxxxx 0xx10111)
D0-D4 - number of 16kB rom/sram page (0-31)
D5 - 1=write enable or 0=write protect low 16kB memory
D6 - 1=connect sram memory (only if D7=0)
D7 - 1=connect rom memory (only if D6=0)
If D6=0 and D7=0 then will MB02 memory disabled and ZX rom is connect in low 16kB
If D6=1 and D7=1 then will reset Z80CPU + disabled ZX rom + connect external MB02 rom page 0 with write protect (set memory port to value #80)
Additional info about memory:
MB02 interface is designed for connection only one 128kB sram memory. But exist internal adapter for connection up to four 128kB sram chips. D3 and D4 on memory port select 128kB sram 0-3. MB02 exist in two versions - 128kB and 512kB. On 128kB version is usable only sram pages 0-7. If is set any higher memory page on port 23, then will in low 16kB undefined data values (real hardware return always values #FF).
Theoretically is possible connect in MB02 interface 128, 256, 384 and 512kB sram memory and 2,...,32,64,128,256,512kB rom/eprom.
Please focus on standard features, described in documentation. MB-02+ is designed to support 512k SRAM and 512k SRAM is standard enhancement of MB-02+ and it was there from the beginning. 8BC sold many 512k versions directly.
There's no need to implement nonstandard bootrom sizes in emulator. Documentation I prepared for you, and you already have it, contains proper MB-02+ schematic without bugs.
If you will be not sure with features, you can always contact Busy Soft, who knows everything about MB-02+.
> Please focus on standard features, described in documentation.
> MB-02+ is designed to support 512k SRAM and 512k SRAM is
> standard enhancement of MB-02+ and it was there from the
> beginning. 8BC sold many 512k versions directly.
Yes, it's true. Standard memory size is 512kB. But also exist
real 128kB MB02 versions without additional memory expander
(its additional hardware).
> There's no need to implement nonstandard bootrom sizes in
Original 2kB BOOT rom in MB02+ interface contain only ( !!! )
booter for real FDD drive. If you need also MB IDE emulation
in Fuse (same IDE ports as DivIDE interface) then must be
also add possibility connect bigger rom than 2kB. This rom
contain BS-ROM + BS-DOS + patch for HDD support. and can
boot from FDD image on HDD. (see MB02+ IDE interface).
Ideal for comfortable booting without FDD is 64kB rom or
bigger. With 2kB rom is also possible boot from real FDD
old BS-DOS + BS-ROM + HDD PATCH and after booting
work with HDD. (but bigger rom don't need real FDD for
> If you will be not sure with features, you can always contact
> Busy Soft, who knows everything about MB-02+.
I know all features of MB02+ interface and Busy Soft is my
khmm... khmm... first i want to see a more or less proper boot... and next we start a debate about 2k/128k ROM or 128k/512k RAM ;)
So, now i stuck somewhere in boot loading. After mb02 load the first sector to #8000 (#400 byte), reset DMA, "abort" FDC, stop FDD motor, and "hang up". The Z80 make endless circles around #002b:
#002c LD (HL), A
#002d XOR (HL)
#002e LD (HL), A
#002f XOR (HL)
#0030 JR NZ, #005c
#0032 INC L
#0033 JR NZ, #002b
#0035 INC H
#0036 JR NZ, #002b
Hmm... may somebody has some idea? velesoft? z00m?
szaszg: this is ram rest only.
You can see it in source code of MB02 boot rom:
(disassembled by POKE)
And this is part of source code:
ld de, 608h
ld bc, PAGE
out (c), a
ram_test_loop: ; CODE XREF: startup+33j startup+37j
ld (hl), a
ld (hl), a
jr nz, ram_fault
jp nz, ram_test_loop
jp nz, ram_test_loop
ld h, 0C0h ; RAM pages start address
ld a, e
jr nz, no_page5 ; Don't test RAM page 5 again
A lot of thing works...
And something not (yet)
I just post an updated patch to [patches:#208] -- hmm... looks i'm a badboy... "Post awaiting moderation." ;-)
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