#95 Clock rate inconsistencies in LPC1768 demo

[Martin Herrmann]

In FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/:

• prvSetupHardware in main.c configures PLL0 and the CPU clock divider for 100 MHz CPU clock.
• FreeRTOSConfig.h, defines configCPU_CLOCK_HZ as 99 MHz (should be 100 MHz; if the discrepancy is intentional, it should be documented).
• The comment in line 357 in main.c states a PLL output clock frequency of 64 MHz.
• Furthermore, that last comment should refer to the CPU clock (CCLK) instead of the PLL output clock, as the peripheral clocks are divided down from the CPU clock, which is in turn divided down from the PLL output clock.

The CORTEX_MPU_LPC1768_GCC_RedSuite demo seems to be affected as well, and I haven't checked the other LPC1768 demos.

[Richard Barry]

Updated (but not yet checked in - will be in the official V8.2.0 release which is currently available as a release candidate).

[as an aside, this is demo code, rather than a FreeRTOS but, but all the same all assistance in ensuring even the code is as accurate as possible is appreciated].