#79 The MSP430X Port need at least on instruction between EINT and DINT

[Heiko]

From the User’s Guide MSP430x5xx and MSP430x6xx Family:

NOTE: Enable and Disable Interrupt
Due to the pipelined CPU architecture, the instruction following the enable interrupt
instruction (EINT) is always executed, even if an interrupt service request is pending when
the interrupts are enabled.
If the enable interrupt instruction (EINT) is immediately followed by a disable interrupt
instruction (DINT), a pending interrupt might not be serviced. Further instructions after DINT
might execute incorrectly and result in unexpected CPU execution. It is recommended to
always insert at least one instruction between EINT and DINT. Note that any alternative
instruction use that sets and immediately clears the CPU status register GIE bit must be
considered in the same fashion.

In FreeRTOS there are some lines where this happens. For example in queue.c line 775 to 777:
taskEXIT_CRITICAL();
taskENTER_CRITICAL();

These macro means:
…
portENABLE_INTERRUPTS();
portDISABLE_INTERRUPTS();
…

If an interrupt occurs between portENABLE_INTERRUPTS() and portDISABLE_INTERRUPTS() the result is an unexpected CPU execution. In my case it was a pointer increment.

I fixed it by changing line 109 in portmacro.h to:
#define portENABLE_INTERRUPTS() _EINT();_NOP()

[Richard Barry]