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YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includes a complete SoC, simulator, GDB stub, scripts, and various examples.
Features
- Classic five stage pipeline
- 4-way associative instruction and data cache with store buffer
- Assorted system components, including memory controllers, video, serial, etc.
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Thanks for updates ;)