FPGAsm fpgasm-code

Create fast bare-metal FPGA designs without Verilog or VHDL

Status: Alpha

Brought to you by: stacksmith

Tree [8d12bd] master / History

File	Date	Author	Commit
.gitignore	2012-09-10	stacksmith	[f1a0e0] ready
COPYING	2012-09-09	stacksmith	[908338] Initial commit
ISSUES.txt	2012-09-30	stacksmith	[eeaa8b] cleanup
README.md	2012-09-30	stacksmith	[f94d03] cleanup
build	2012-10-06	stack	[94109b] eliminated cWire, cWireList
build.bat	2012-09-20	stacksmith	[38a67e] fixed windows build script
cCfgSLICE.cpp	2012-09-18	stacksmith	[4801a4] cleanup, working verilog header
cCfgSLICE.h	2012-09-17	stacksmith	[c4e6ee] moved verilog output logic to cCfgSLICE.cpp
cCollection.cpp	2012-09-19	stacksmith	[94eef2] cQuark is wrong, just using keyword quark to me...
cCollection.h	2012-09-19	stacksmith	[869126] bf: in DynXdl, while traversing wire hierarchie...
cDatum.cpp	2012-09-18	stacksmith	[4801a4] cleanup, working verilog header
cDatum.h	2012-09-18	stacksmith	[f925d6] verilog module-based output. Partial implement...
cDevice.cpp	2012-09-20	stacksmith	[05b755] moved isPrimitive to cDyn
cDevice.h	2012-09-16	stacksmith	[6638e2] compiles under mingw
cDyn.cpp	2012-10-06	stack	[8d12bd] loc check, need cleanup
cDyn.h	2012-10-06	stack	[94109b] eliminated cWire, cWireList
cDynXdl.cpp	2012-10-06	stack	[8d12bd] loc check, need cleanup
cModule.cpp	2012-10-06	stack	[57fc0b] eliminated pwires from proto; seems to work...
cModule.h	2012-09-19	stacksmith	[c04f4b] working verilog generator. No primitives yet
cMultiWire.cpp	2012-10-05	stack	[19c96f] debugged wirebuilding
cMultiWire.h	2012-10-05	stack	[751776] added cMultiWire.. classes
cMultiWireBuilder.cpp	2012-10-05	stack	[3a5c03] debugged wirebuilding
cMultiWireBuilder.h	2012-10-05	stack	[19c96f] debugged wirebuilding
cMultiWireWalker.cpp	2012-10-06	stack	[089b91] working wiring both ways
cMultiWireWalker.h	2012-10-05	stack	[751776] added cMultiWire.. classes
cParse.cpp	2012-10-06	stack	[94109b] eliminated cWire, cWireList
cParse.h	2012-10-06	stack	[089b91] working wiring both ways
cParseStream.cpp	2012-10-05	stack	[7c872a] need to redo cWires for 16-bit inst
cParseStream.h	2012-10-03	stack	[f02e42] cWire dynamically expands, more error tracing
cPrim.cpp	2012-09-18	stacksmith	[f925d6] verilog module-based output. Partial implement...
cPrim.h	2012-09-18	stacksmith	[f925d6] verilog module-based output. Partial implement...
cProto.cpp	2012-10-06	stack	[57fc0b] eliminated pwires from proto; seems to work...
cProto.h	2012-10-06	stack	[57fc0b] eliminated pwires from proto; seems to work...
cQuark.cpp	2012-09-19	stacksmith	[361523] added cQuark
cQuark.h	2012-09-19	stacksmith	[94eef2] cQuark is wrong, just using keyword quark to me...
cSub.cpp	2012-09-20	stacksmith	[05b755] moved isPrimitive to cDyn
cSub.h	2012-09-09	stacksmith	[908338] Initial commit
fpgasm.cpp	2012-10-06	stack	[089b91] working wiring both ways
global.cpp	2012-09-09	stacksmith	[908338] Initial commit
global.h	2012-10-06	stack	[57fc0b] eliminated pwires from proto; seems to work...

File

Date

Author

Commit

.gitignore

2012-09-10

stacksmith