how does this implementation stand with respect to Patents form Voltage, Protegrity and others?
I'm not aware of any patents on the FFX, A2, A10, FF1 or FF3 algorithms, but if there are any, I guess the disposition is up to the patent holders.
see this one for example: http://csrc.nist.gov/groups/ST/toolkit/BCM/documents/proposedmodes/ffx/ffx-voltage-ip.pdf
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I'm not aware of any patents on the FFX, A2, A10, FF1 or FF3 algorithms, but if there are any, I guess the disposition is up to the patent holders.
see this one for example: http://csrc.nist.gov/groups/ST/toolkit/BCM/documents/proposedmodes/ffx/ffx-voltage-ip.pdf