[Firebug-cvs] firebug/project/src/gps gpspacket_0.nc,NONE,1.1 hpli2cm.nc,NONE,1.1 hpluart1m.nc,NONE,
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From: <cs...@us...> - 2003-08-01 18:22:19
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Update of /cvsroot/firebug/firebug/project/src/gps In directory sc8-pr-cvs1:/tmp/cvs-serv1367 Added Files: gpspacket_0.nc hpli2cm.nc hpluart1m.nc Log Message: files for new Leadtek --- NEW FILE: gpspacket_0.nc --- /* tab:4 * * * "Copyright (c) 2000-2002 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ /* tab:4 * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: * Date last modified: 6/25/02 * */ configuration GpsC { provides { interface StdControl as Control; interface BareSendMsg as Send; interface ReceiveMsg as Receive; interface SendVarLenPacket; } } implementation { components GpsPacketM ; TestMTS350M.GpsControl -> UARTGpsPacket; TestMTS350M.GpsSend -> UARTGpsPacket; TestMTS350M.GpsReceive -> UARTGpsPacket; StdControl = GpsPacketM; Humidity = SensirionHumidityM.Humidity; Temperature = SensirionHumidityM.Temperature; SensirionHumidityM.Timer -> TimerC.Timer[unique("Timer")]; SensirionHumidityM.SensorControl -> TempHum.StdControl; SensirionHumidityM.HumSensor -> TempHum.HumSensor; SensirionHumidityM.TempSensor -> TempHum.TempSensor; SensirionHumidityM.SwitchControl -> MicaWbSwitch.StdControl; SensirionHumidityM.Switch1 -> MicaWbSwitch.Switch[0]; SensirionHumidityM.SwitchI2W -> MicaWbSwitch.Switch[1]; } --- NEW FILE: hpli2cm.nc --- //Mohammad Rahimi,Phil Buonadonna module HPLI2CM { provides { interface StdControl; interface I2C; } uses interface Interrupt; uses interface Leds; } implementation { // global variables char state; // maintain the state of the current processx char global_data; #define SET_START_TX() sbi(TWCR,TWSTA) #define CLEAR_START_TX() cbi(TWCR,TWSTA) #define SET_STOP_TX() sbi(TWCR,TWSTO) #define CLEAR_STOP_TX() cbi(TWCR,TWSTO) #define I2C_ENABLE() sbi(TWCR,TWEN) #define I2C_DISABLE() cbi(TWCR,TWEN) #define INT_ENABLE() sbi(TWCR,TWIE) #define INT_DISABLE() cbi(TWCR,TWIE) #define INT_FLAG_ENABLE() sbi(TWCR,TWINT) #define INT_FLAG_DISABLE() cbi(TWCR,TWINT) #define ACK_ENABLE() sbi(TWCR,TWEA) #define NACK_ENABLE() cbi(TWCR,TWEA) #define RESET() outp(0x0,TWCR); #define MAKE_CLOCK_OUTPUT() sbi(DDRD, 0); #define CLOCK_HIGH() sbi(PORTD,0); #define CLCOK_LOW() sbi(PORTD,0); #define MAKE_DATA_INPUT() cbi(DDRD, 1); #define DATA_PULL_UP() sbi(PORTD, 1); #define DATA_NO_PULL_UP() cbi(PORTD, 1); // define constants for state enum { IDLE = 1, // idle MA_START, // Initiation of the Master Bus MA_ADDRESS, // Master Transmitter,writing address MA_DATA, // Master Transmitter,writing data MR_DATA, // Master Receiver ST, // Slave Transmitter SR // Slave Receiver }; // define TWI device status codes. enum { TWS_BUSERROR = 0x00, TWS_START = 0x08, TWS_RSTART = 0x10, TWS_MT_SLA_ACK = 0x18, TWS_MT_SLA_NACK = 0x20, TWS_MT_DATA_ACK = 0x28, TWS_MT_DATA_NACK = 0x30, TWS_M_ARB_LOST = 0x38, TWS_MR_SLA_ACK = 0x40, TWS_MR_SLA_NACK = 0x48, TWS_MR_DATA_ACK = 0x50, TWS_MR_DATA_NACK = 0x58 }; static inline void setBitRate() // See Note, Page 205 of ATmega128 docs { cbi(TWSR, TWPS0); cbi(TWSR, TWPS1); outp(100,TWBR); } static inline void init() { //sbi(PORTD, 0); // i2c SCL,this activate pullup resistor //sbi(PORTD, 1); // i2c SDA,this activate pullup resistor MAKE_CLOCK_OUTPUT(); MAKE_DATA_INPUT(); CLOCK_HIGH(); DATA_PULL_UP(); RESET(); I2C_ENABLE(); INT_ENABLE(); ACK_ENABLE(); call Interrupt.enable(); state = IDLE; } static inline void reset() { RESET(); setBitRate(); init(); } // Silly task to signal when a stop condition is completed. task void I2C_task() { loop_until_bit_is_clear(TWCR,TWSTO); INT_FLAG_ENABLE(); signal I2C.sendEndDone(); } command result_t StdControl.init() { setBitRate(); init(); return SUCCESS; } command result_t StdControl.start() { return SUCCESS; } command result_t StdControl.stop() { return SUCCESS; } command result_t I2C.sendStart() { state=MA_START; signal I2C.sendStartDone(); return SUCCESS; } void sendstart() { SET_START_TX(); INT_FLAG_ENABLE(); } void sendAddress() { outb(TWDR,global_data); CLEAR_START_TX(); INT_FLAG_ENABLE(); } command result_t I2C.sendEnd() { SET_STOP_TX(); post I2C_task(); return SUCCESS; } // For reads and writes, if the TWINT bit is clear, the TWI is // busy or the TWI improperly initialized command result_t I2C.read(bool ack) { if (ack) ACK_ENABLE(); else NACK_ENABLE(); INT_FLAG_ENABLE(); return SUCCESS; } command result_t I2C.write(char data) { global_data=data; if(state==MA_START) { state=MA_ADDRESS; sendstart(); } if(state==MA_DATA) { outb(TWDR,data); INT_FLAG_ENABLE(); } return SUCCESS; } default event result_t I2C.sendStartDone() { return SUCCESS; } default event result_t I2C.sendEndDone() { return SUCCESS; } default event result_t I2C.readDone(char data) { return SUCCESS; } default event result_t I2C.writeDone(bool success) { return SUCCESS; } TOSH_SIGNAL(SIG_2WIRE_SERIAL) { uint8_t i2cState; i2cState=inp(TWSR) & 0xF8; INT_FLAG_DISABLE(); switch (i2cState) { case TWS_BUSERROR: reset(); //outb(TWCR,((1 << TWSTO) | (1 << TWINT))); // Reset TWI break; case TWS_START: //08 case TWS_RSTART: //10 sendAddress(); //signal I2C.sendStartDone(); break; case TWS_MT_SLA_ACK: //18 state=MA_DATA; signal I2C.writeDone(TRUE); break; case TWS_MT_DATA_ACK: //28 state=MA_DATA; signal I2C.writeDone(TRUE); break; case TWS_MT_SLA_NACK: //20 signal I2C.writeDone(FALSE); break; case TWS_MT_DATA_NACK: //30 signal I2C.writeDone(FALSE); break; case TWS_MR_SLA_ACK: state=MA_DATA; signal I2C.writeDone(TRUE); break; case TWS_MR_SLA_NACK: signal I2C.writeDone(FALSE); break; case TWS_MR_DATA_ACK: case TWS_MR_DATA_NACK: state=MA_DATA; signal I2C.readDone(inb(TWDR)); break; default: //something wrong reset(); break; } } } --- NEW FILE: hpluart1m.nc --- /* tab:4 * * * "Copyright (c) 2000-2002 The Regents of the University of California. * All rights reserved. * * Permission to use, copy, modify, and distribute this software and its * documentation for any purpose, without fee, and without written agreement is * hereby granted, provided that the above copyright notice, the following * two paragraphs and the author appear in all copies of this software. * * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." * */ /* tab:4 * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By * downloading, copying, installing or using the software you agree to * this license. If you do not agree to this license, do not download, * install, copy or use the software. * * Intel Open Source License * * Copyright (c) 2002 Intel Corporation * All rights reserved. * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * Neither the name of the Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived from * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * */ /* * * Authors: Jason Hill, David Gay, Philip Levis, Phil Buonadonna * Date last modified: $Revision: 1.1 $ * */ // The hardware presentation layer. See hpl.h for the C side. // Note: there's a separate C side (hpl.h) to get access to the avr macros // The model is that HPL is stateless. If the desired interface is as stateless // it can be implemented here (Clock, FlashBitSPI). Otherwise you should // create a separate component module HPLUART1M { provides interface HPLUART as UART; uses interface Interrupt; } implementation { command result_t UART.init() { // UART will run at: (N-8-1) // Baud UBRR1L Value: // 115kbps, 15 // 19.2kbps 47 // 9600 bps 95 // 4800 bps 191 // Set Baud Rate outp(0,UBRR1H); outp(191, UBRR1L); // Set UART double speed outp((1<<U2X),UCSR1A); // Set frame format: 8 data-bits, 1 stop-bit outp(((1 << UCSZ1) | (1 << UCSZ0)) , UCSR1C); // Enable reciever and transmitter and their interrupts outp(((1 << RXCIE) | (1 << TXCIE) | (1 << RXEN) | (1 << TXEN)) ,UCSR1B); call Interrupt.enable(); return SUCCESS; } command result_t UART.stop() { outp(0x00, UCSR1A); outp(0x00, UCSR1B); outp(0x00, UCSR1C); return SUCCESS; } default event result_t UART.get(uint8_t data) { return SUCCESS; } TOSH_SIGNAL(SIG_UART1_RECV) { if (inp(UCSR1A) & (1 << RXC)) signal UART.get(inp(UDR1)); } default event result_t UART.putDone() { return SUCCESS; } TOSH_INTERRUPT(SIG_UART1_TRANS) { signal UART.putDone(); } command result_t UART.put(uint8_t data) { outp(data, UDR1); sbi(UCSR1A, TXC); return SUCCESS; } } |