[fbt-commit] SF.net SVN: fbt:[88] trunk/bin
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[fbt-commit] SF.net SVN: fbt:[88] trunk/bin
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From: <dav...@us...> - 2010-03-02 17:39:31
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Revision: 88
http://fbt.svn.sourceforge.net/fbt/?rev=88&view=rev
Author: dave_infj
Date: 2010-03-02 17:39:24 +0000 (Tue, 02 Mar 2010)
Log Message:
-----------
* Add new feature: entity aliases.
Since coregen objects are not parameterisable (from HDL source), this feature
provides a mechanism whereby HDL source can instantiate an entity name that
is in fact an /alias/ for some other coregen actually defined with a .XCO file
somewhere in the library path.
When alias pairs ($instantiated_entity=$actual_entity) are provided on the
command-line, the dependency resolver will use $actual_entity to satisfiy
a dependency for $instantiated_entity - but only if $instantiated_entity is
not provided explicitly elsewhere.
The aliased entity name as derived from the actual entity name will appear
in coregen.mf and modelsim.mf. During the XCO copy phase, the alias entity
name is substituted for the actual entity name so that coregen will produce
appropriately named objects.
The variable ALIASES should be defined in the project Makefile as ie=ae pairs.
NB: No spaces allowed.
NB: This feature only works with coregen objects. Other HDL entities cannot
be aliased in this way.
* Clarity enhancement: Error messages and --dumpdeps will now output the
XCO path, instead of the resulting HDL source path, for coregen objects.
Modified Paths:
--------------
trunk/bin/Makefile.inc
trunk/bin/mkvdeps.py
trunk/bin/mkvproj.py
trunk/bin/tool_common.py
trunk/bin/tool_sim_modelsim.py
trunk/bin/tool_synth_synplify.py
Modified: trunk/bin/Makefile.inc
===================================================================
--- trunk/bin/Makefile.inc 2010-03-02 17:20:17 UTC (rev 87)
+++ trunk/bin/Makefile.inc 2010-03-02 17:39:24 UTC (rev 88)
@@ -46,6 +46,8 @@
# SIM_DAR Simulation disambiguation rules
# SYN_DAR Synthesis disambiguation rules
#
+# ALIASES Coregen aliases
+#
# VCOM_OPTS Options for ModelSim VHDL compiler
# VLOG_OPTS Options for ModelSim Verilog compiler
#
@@ -99,12 +101,14 @@
#
# Add mandatory arguments
-SIMP_OPTS += -r $(SIMTOP) -p $(PART) $(foreach F,$(SIMLIBPATH) ,-l $(F)) \
- $(foreach F,$(SIM_DAR) ,-D $(F))
-SYNTH_OPTS += -r $(TOP) -p $(PART) $(foreach F,$(SYNTHLIBPATH),-l $(F)) \
- $(foreach F,$(SYN_CONSTR) ,-k $(F)) \
- $(foreach F,$(SYN_DAR) ,-D $(F))
-NGDBUILD_OPTS += -p $(PART) -a $(foreach F,$(NGOLIBPATH) ,-sd $(F))
+SIMP_OPTS += -r $(SIMTOP) -p $(PART) $(foreach P,$(SIMLIBPATH) ,-l $(P)) \
+ $(foreach R,$(SIM_DAR) ,-D $(R)) \
+ $(foreach A,$(ALIASES) ,-a $(A))
+SYNTH_OPTS += -r $(TOP) -p $(PART) $(foreach P,$(SYNTHLIBPATH),-l $(P)) \
+ $(foreach F,$(SYN_CONSTR) ,-k $(F)) \
+ $(foreach R,$(SYN_DAR) ,-D $(R)) \
+ $(foreach A,$(ALIASES) ,-a $(A))
+NGDBUILD_OPTS += -p $(PART) -a $(foreach P,$(NGOLIBPATH) ,-sd $(P))
MAP_OPTS += -w -p $(PART) -pr b
PAR_OPTS += -w
BITGEN_OPTS += -w
Modified: trunk/bin/mkvdeps.py
===================================================================
--- trunk/bin/mkvdeps.py 2010-03-02 17:20:17 UTC (rev 87)
+++ trunk/bin/mkvdeps.py 2010-03-02 17:39:24 UTC (rev 88)
@@ -108,10 +108,12 @@
return dep_list
-def resolve_deps(top_ent, dep_list, disambig):
+def resolve_deps(cfg):
"""
Resolve the dependencies arising from the top module as specified in the
- configuration. Returns an ordered list of sources.
+ configuration, including any aliased entities. Returns an ordered list of
+ sources.
+ NB: At present, aliases are supported on XCO objects only.
"""
def what_srcs(what_ent):
@@ -119,22 +121,37 @@
Return a list of files that depend on the specified entity
"""
ws = []
- for ent, allcand in dep_list.iteritems():
+ for ent, allcand in cfg.dep_list.iteritems():
for hdl_src, deps, core_src in allcand:
if what_ent in deps:
ws.append(hdl_src)
return ws
- def disambiguate(ent):
+ def disambiguate(ent, alias = ''):
"""
Error check, select and return the dependencies for the given entity
- according to the disambiguation rules.
+ according to the disambiguation and aliasing rules.
"""
+ #
# Check to make sure we know about unresolved entity ent
- if ent not in dep_list:
- raise Panic( """\
+ #
+ if ent not in cfg.dep_list:
+ if ent in cfg.aliases: # ent might be an alias
+ return disambiguate( cfg.aliases[ent], ent )
+ else: # If not, raise an error
+ if alias:
+ raise Panic( """\
+real entity %s of alias %s unknown.
+The following sources depend on %s:
+\t%s""" %
+ (ent,
+ alias,
+ alias,
+ '\n\t'.join( [relpath(hdl_src) for hdl_src in what_srcs(alias)] ) ) )
+ else:
+ raise Panic( """\
entity %s unknown.
The following sources depend on %s:
\t%s""" %
@@ -142,17 +159,19 @@
ent,
'\n\t'.join( [relpath(hdl_src) for hdl_src in what_srcs(ent)] ) ) )
+ #
# Figure out which entity to return
- if len( dep_list[ent] ) == 1:
+ #
+ if len( cfg.dep_list[ent] ) == 1:
# When there is only one candidate, there likely will be no
# disambiguation rules that would match it, so just use it.
- return dep_list[ent][0]
+ resolved_ent = cfg.dep_list[ent][0]
else:
# Otherwise, use the disambiguation rules to select a candidate.
try:
filtered_list = []
- for hdl_src, deps, core_src in dep_list[ent]:
- if disambig[ent].search( os.path.abspath( hdl_src ) ):
+ for hdl_src, deps, core_src in cfg.dep_list[ent]:
+ if cfg.disambig[ent].search( os.path.abspath( hdl_src ) ):
filtered_list.append( (hdl_src, deps, core_src) )
except KeyError:
# There is no rule for this entity, which is an error.
@@ -160,8 +179,8 @@
no rule for disambiguating entity %s with multiple candidates:
\t%s
""" % (ent,
- '\n\t'.join( [relpath(hdl_src)
- for hdl_src, deps, core_src in dep_list[ent]] )) )
+ '\n\t'.join( [relpath(core_src) if core_src else relpath(hdl_src)
+ for hdl_src, deps, core_src in cfg.dep_list[ent]] )) )
# Sanity: check that there is exactly one match
if len(filtered_list) == 0:
@@ -170,25 +189,36 @@
raise Panic( """\
no candidates match specified rule for entity %s:
\t%s
-""" % (ent, '\n\t'.join( [relpath(hdl_src)
- for hdl_src, deps, core_src in dep_list[ent]] )) )
+""" % (ent, '\n\t'.join( [relpath(core_src) if core_src else relpath(hdl_src)
+ for hdl_src, deps, core_src in cfg.dep_list[ent]] )) )
elif len(filtered_list) != 1:
raise Panic( """\
Still %d candidates left after applying disambiguation rule for entity %s:
\t%s
-""" % (len(filtered_list), ent, '\n\t'.join( [relpath(hdl_src)
+""" % (len(filtered_list), ent, '\n\t'.join( [relpath(core_src) if core_src else relpath(hdl_src)
for hdl_src, deps, core_src in filtered_list] )) )
# We have exactly one candidate left
- return filtered_list[0]
-
-
+ resolved_ent = filtered_list[0]
+
+ #
+ # If the resolved entity was an alias, then do sanity checking and
+ # translate the hdl_src name appropriately.
+ # NB: the coregen handling code must still translate the entity name
+ # within the XCO project file.
+ if alias:
+ hdl_src, deps, core_src = resolved_ent
+ if not core_src:
+ raise Panic( 'aliased entity %s resolved to non-CoreGen object %s' % (alias, ent) )
+ return subst_basename(hdl_src, alias), deps, core_src, alias
+ else:
+ return resolved_ent + ('',)
###########################################################################
# unresolved: list of entities yet to be resolved
- unresolved = [top_ent]
+ unresolved = [cfg.top_ent]
# resolved: list of ordered resolved dependencies in (ent, hdl_src) tuples
resolved = []
@@ -196,10 +226,10 @@
unres_ent = unresolved.pop(0)
# Disambiguate as required
- hdl_src, deps, core_src = disambiguate(unres_ent)
+ hdl_src, deps, core_src, alias = disambiguate(unres_ent)
# Prepend the source file which satisfies unresolved entity ent
- resolved.insert(0, (unres_ent, hdl_src, deps, core_src))
+ resolved.insert(0, (unres_ent, hdl_src, deps, core_src, alias))
# Append entity ent's own dependencies for later consideration
unresolved += deps
Modified: trunk/bin/mkvproj.py
===================================================================
--- trunk/bin/mkvproj.py 2010-03-02 17:20:17 UTC (rev 87)
+++ trunk/bin/mkvproj.py 2010-03-02 17:39:24 UTC (rev 88)
@@ -63,7 +63,9 @@
-v, --verbose print filenames as they are processed
-V, --version print version
-h, --help print this message
-x
+
+ -a, --alias <ie=ae> XCO entity alias
+ instantiated entity=actual entity
-d, --dir output directory
-l, --libpath dependency search paths (required)
-r, --root name of top module (required)
@@ -129,9 +131,12 @@
for ent in entities:
print "Entity %s:" % (ent)
for hdl_src, deps, core_src in cfg.dep_list[ent]:
- if cfg.relative_paths:
- hdl_src = relpath(hdl_src)
- print "\tin %s:" % (hdl_src)
+ if core_src:
+ src = relpath(core_src) if cfg.relative_paths else core_src
+ else:
+ src = relpath(hdl_src) if cfg.relative_paths else hdl_src
+
+ print "\tin %s:" % (src)
if deps:
print "\t\t%s" % '\n\t\t'.join( deps )
else:
@@ -144,8 +149,9 @@
# Parse options
#
try:
- opts, args = getopt.gnu_getopt( argv[1:], 'd:D:l:p:r:t:k:cChvV',
- ['dir=',
+ opts, args = getopt.gnu_getopt( argv[1:], 'a:d:D:l:p:r:t:k:cChvV',
+ ['alias=',
+ 'dir=',
'disambiguate=',
'libpath=',
'part=',
@@ -168,6 +174,7 @@
cfg = tool_common.Config()
for arg, val in opts:
if arg in ['-v', '--verbose']: cfg.verbose = True
+ if arg in ['-a', '--alias']: cfg.add_alias(val)
if arg in ['-d', '--dir']: cfg.output_dir = val
if arg in ['-D', '--disambiguate']: cfg.add_dar(val)
if arg in ['-l', '--libpath']: cfg.libpath += val.split(':')
@@ -223,12 +230,11 @@
raise Panic("top level entity %s unknown" % cfg.top_ent)
# Try to resolve dependencies
- cfg.resolved_list = mkvdeps.resolve_deps( cfg.top_ent, cfg.dep_list,
- cfg.disambig )
+ cfg.resolved_list = mkvdeps.resolve_deps( cfg )
if cfg.verbose:
print '\n'.join( [hdl_src
- for ent, hdl_src, deps, core_src in cfg.resolved_list] )
+ for ent, hdl_src, deps, core_src, alias in cfg.resolved_list] )
print '\n'.join( [constr
for constr in cfg.constraints] )
Modified: trunk/bin/tool_common.py
===================================================================
--- trunk/bin/tool_common.py 2010-03-02 17:20:17 UTC (rev 87)
+++ trunk/bin/tool_common.py 2010-03-02 17:39:24 UTC (rev 88)
@@ -61,6 +61,7 @@
self.output_dir = '.'
self.libpath = []
self.disambig = {}
+ self.aliases = {}
self.part = '<unspecified>'
self.top_ent = ''
self.tool = 'default'
@@ -68,6 +69,23 @@
self.relative_paths = True
self.constraints = []
+ def add_alias( self, alias ):
+ """
+ Add entity alias of the form "<ie>=<ae>" where
+ ie = instantiated entity
+ ae = actual entity to substitute
+
+ NB: This only works for entities implemented by an XCO core
+ """
+
+ alias_split = alias.split('=')
+ if len(alias_split) != 2:
+ raise Panic( "Bad alias %s" % alias )
+
+ ie, ae = alias_split
+ self.aliases[ie.strip()] = ae.strip()
+
+
def add_dar( self, rule ):
"""
Add a disambiguation rule
@@ -133,9 +151,10 @@
return part, family, pkg, speed
-def copy_xco( src, dst, partspec ):
+def copy_xco( src, dst, partspec, ent_name='' ):
"""
- Copy an XCO project file, replacing the part spec info as appropriate
+ Copy an XCO project file, replacing the part spec info as
+ appropriate, and the entity name (if set)
"""
attrs = []
part, family, pkg, speed = parse_partspec( partspec )
@@ -165,6 +184,10 @@
if attr[1].upper() == 'DEVICEFAMILY': attr[3] = family
if attr[1].upper() == 'PACKAGE' : attr[3] = pkg
if attr[1].upper() == 'SPEEDGRADE' : attr[3] = speed
+
+ if attr[0].upper() == 'CSET':
+ if attr[1].upper() == 'COMPONENT_NAME' \
+ and ent_name : attr[3] = ent_name
d.write( ' '.join( attr ) + '\n' )
@@ -175,7 +198,7 @@
def write_coregen_mf(cfg, cores):
"""
- Write out a coregen makefile from the list of (hdl_src, core_src).
+ Write out a coregen makefile from the list of (hdl_src, core_src, alias).
"""
makefile = os.path.join(cfg.output_dir, COREGEN_MK)
@@ -216,13 +239,15 @@
clean:
\trm -rf %s
-""" % (' '.join( [hdl_src for hdl_src, core_src in cores] ),
+""" % (' '.join( [hdl_src for hdl_src, core_src, alias in cores] ),
xco_tmp_dir) )
- for hdl_src, core_src in cores:
+ for hdl_src, core_src, alias in cores:
# Copy coregen project file
out_xco = os.path.join( xco_tmp_dir, os.path.split( core_src )[1] )
- copy_xco( core_src, out_xco, cfg.part )
+ if alias:
+ out_xco = subst_basename( out_xco, alias )
+ copy_xco( core_src, out_xco, cfg.part, alias )
# Write out coregen invocation rules
mf.write( """\
Modified: trunk/bin/tool_sim_modelsim.py
===================================================================
--- trunk/bin/tool_sim_modelsim.py 2010-03-02 17:20:17 UTC (rev 87)
+++ trunk/bin/tool_sim_modelsim.py 2010-03-02 17:39:24 UTC (rev 88)
@@ -88,7 +88,7 @@
# Write out default target
mf.write( "all: %s\n\n" % (msim_lib(cfg.top_ent)) )
- for ent, hdl_src, deps, core_src in cfg.resolved_list:
+ for ent, hdl_src, deps, core_src, alias in cfg.resolved_list:
rel_hdl_src = tool_common.rel_src( cfg, hdl_src )
# Write rules to express this source's dependencies, if any
@@ -109,7 +109,7 @@
# If it's a core, add it to the cores list
if core_src:
- cores.append( (hdl_src, core_src) )
+ cores.append( (hdl_src, core_src, alias) )
# Include core rules, if any
if cores:
Modified: trunk/bin/tool_synth_synplify.py
===================================================================
--- trunk/bin/tool_synth_synplify.py 2010-03-02 17:20:17 UTC (rev 87)
+++ trunk/bin/tool_synth_synplify.py 2010-03-02 17:39:24 UTC (rev 88)
@@ -64,14 +64,14 @@
# Generate sources and cores list
srcs = []
cores = []
- for ent, hdl_src, deps, core_src in cfg.resolved_list:
+ for ent, hdl_src, deps, core_src, alias in cfg.resolved_list:
srcs.append( 'add_file %s "%s"' % (
lang_flag(os.path.splitext(hdl_src)[1]),
tool_common.rel_src(cfg, hdl_src) ) )
# If it's a core, add it to the cores list
if core_src:
- cores.append( (hdl_src, core_src) )
+ cores.append( (hdl_src, core_src, alias) )
# Unpack partspec
part, family, pkg, speed = tool_common.parse_partspec( cfg.part )
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