[Fault-injection-developer] RE: FITH utility usage model draft

[Gao, K. <kev...@in...>]

FITH Utility Usage Model draft:

1. I think useing old fsml (xml file format) file for user to build
     a trigger (IRQ trigger used different model, ".xml", it is xml
     file format yet.) is still    a good choise. User only needs one=20
   template (using our test cases), and then changing some parameters
    is enough.
   =20
The draft fsml:

<?xml encoding=3D"UTF-8" ?>
<fsml:fsml xmlns:fsml=3D"http://fault-injection.sourceforge.net/FSML">
	<fsml:trigger

	<!-- Required, but not used in current release -->
		 id=3D"string"

	<!-- trigger name, it should be exclusive -->
		 name=3D"string"

	<!-- Required, intercptor name, e.g. pf, dbp... -->
		  interceptor=3D"string"

	<!-- Required, 'm' means capture MMIO while
	default is IO. 'seq_io' means capture specific
	IO sequence. 'pci_config' means capture PCI=20
	configuration access. You could select one or
	none from the previous three types. 'r' and
	'w'  stand for capturing read or write access.
	You must select at least one of them.		-->
		 type=3D"[m|seq_io|pci_config]|{r|w}"	=20

	<!-- Required, corrupted address length 		-->
		  len=3D"1|2|4"

		 addr=3D"0xXXXXXXXX"

	<!--  The following two attributes are only used
	for type =A1=B0seq_io=A1=B1					-->
                 index_addr=3D"0xXXXXXXXX"
                data_addr=3D"0xXXXXXXXX"

       <!--  The following four attributes are only=20
	used for type =A1=B0pci_config=A1=B1			-->
                bus=3D"unsigned integer"
	        slot=3D"unsigned integer"
          	 func=3D"unsigned integer"
 	        reg_no=3D"unsigned integer"

	<!--  bitmask/min/max are optional.=20
	bitmask/min/max allow you to specify a condition
	logic. The trigger starts to work only if it
	meets "min <=3D captured data & ~bitmask < max"
	condition. By default, the condition is always
	met. 							-->
		  bitmask=3D"0xXXXXXXXX"
		 min=3D"unsigned integer"
		 max=3D"unsigned integer"

	<!-- Optional. Default to 0. trigger starts to
	work after the specified access type happens=20
	'skip' times. 					-->
		 skip=3D"unsigned integer"

	<!-- Optional. Default to 0, never stops.
	Trigger will stop to work after the specified
	access type happens 'stop' times 			-->
		 stop=3D"unsigned integer"

	<!-- Optional. Default to 0, no protection!
	bit set to 1 in this mask will never be=20
	corrupted or modified. This only applies to
	write fault injectionFI. 				-->
		 protection_mask=3D"0xXXXXXXXX"

	<!-- Optional. Default to be 1 and not allow
	being negative. Trigger is activated once
	every 'hz' times with considerations of
	 'skip' and 'stop'. 					-->
		 HZ=3D"unsigned integer"
	>
	=09
	<!-- Execute the specified Code-Segment=A1=AFs
	name. You must NOT use Code-Segment and
	the other actions simultaneously. 			-->
		<fsml:action codesegment=3D"string" />

	<!-- Captured data is replaced with this 'val'  -->
		<fsml:set val=3D"0xXXXXXXXX" />

	<!-- Captured data & 'val'  			-->
		<fsml:and val=3D"0xXXXXXXXX" />

	<!-- Captured data | val'  				-->
		<fsml:or val=3D"0xXXXXXXXX" />

	<!-- !Captured data  				-->
		<fsml:not />

	<!-- Captured data ^ 'val'  			-->
		<fsml:xor val=3D"0xXXXXXXXX" />

	<!-- !(Captured data & 'val')  			-->
		<fsml:nand val=3D"0xXXXXXXXX" />

	<!-- !(Captured data | 'val')  			-->
		<fsml:nor val=3D"0xXXXXXXXX" />

	<!-- Captured data + 'val'  			-->
		<fsml:add val=3D"0xXXXXXXXXX" />

	<!-- Captured data - 'val'  			-->
		<fsml:sub val=3D"0xXXXXXXXX" />
	</fsml:trigger>
</fsml:fsml>

IRQ trigger will not be changed:

<?xml version=3D"1.0" encoding=3D"UTF-8" ?>
<fake_irq=20
	<!-- the intercepted IRQ number. 			-->
          	irq=3D"unsigned integer"
          =20
	<!-- The IRQ device name. You can get it=20
	by =A1=AEcat /proc/interrupt=A1=AF. FITH use the
	name to distinguish IRQ handlers in the=20
	same IRQ name. 					-->
          	devname=3D"dummy"

	<!-- Optional. The IRQ will isbe spurious
	every X timer ticker. X is the value of=20
	the attribute. Vaild range [0, 0x7FFFFFFF]	-->
          	spurious_hertz=3D"unsigned integer"

	<!-- Optional. The IRQ will isbe delayed
	every Y times. Y is the value of the
	attribute. Vaild range [0, 0x7FFFFFFF] 		-->
          	delay_hertz=3D"unsigned integer"

	<!-- Optional. The default value =A1=AE0=A1=AF
	means =A1=AEdelay unlimited time=A1=AF. FITH will
	delays the delayed IRQ Z timer ticker.
	Z is the value of the  attribute. Vaild
	range [0, 0x7FFFFFFF] 				-->
          	delay_time=3D"unsigned integer"
/>

2.  The execution file of FITH utility is still "ficl", and most of
       the functionality will be not changed. So old user will change
      little about their test cases.=20
    =20
	The usage model of "ficl" command:

	--insert, -i <file.fsml>
	insert a faultset written in file.fsml into FITH,=20
	enable the faultset and return the SN of the faultset.

	--remove, -r <SN>|all
	remove the faultset specified by SN. Also you can use
	'-r all' to remove all faultset.=20

	--disable, -d <SN>|all
	--enable, -e <SN>|all
	disable/enable the faultset specified by SN. Also you
	can use '-d all'/'-e all' to disable/enable all faultset.=20

	--setirq, -s <file.xml>
	--clrirq, -c=20
	set/clear irq IRQ faultset. Notice, irq IRQ faultset
	is different and does not use fsml format. Please also
	read examples in fith/test/src/fault_set/fun_test/irq*.xml.

 	--verbose, -v
	verbose mode=20

	--version, -V
	print version information=20

	--help, -h
	print help information

There is a still issue, do we need to use ficl command to insert
and register the codesegment instead of user register it.If so,=20
we will add new command parameter to do that thing.

Any comment/idea?
   =20
-Kevin