[Fault-injection-developer] RE: FITH test proposal

[Zhuang, L. <lou...@in...>]

Could you give us some light about test environment/methods/processes?
 
Louis Zhuang, SW Engineer, Intel Corporation.
My opinions are my own and NEVER the opinions of Intel Corporation.
 
-----Original Message-----
From: Gao, Kevin 
Sent: Wednesday, November 13, 2002 4:14 PM
To: Zhuang, Louis; Wang, Frank; Wang, Stanley
Cc: 'fau...@li...'
Subject: FITH test proposal
 
FITH test plan:
 
        Inject fault into IO read operation
        Inject fault into IO write operation
        Inject fault into MMIO read operation
        Inject fault into MMIO write operation
        Inject fault to lost a IRQ operation 
        Inject fault to delay a IRQ operation
        Inject fault to overload IRQ operation
        Other attribute testing
        Inject fault into Sequence IO read operation
        Inject fault into Sequence IO write operation
        Inject fault into PCI configuration
        Inject fault into DMA send operation
        Inject fault into DMA receive operation
 
Besides using our dummy driver, we will also use seriel driver to test the
functionality of FITH.
Our target is to test the compatiblity , and the new functionality of FITH.
 
 
Kevin Gao, SW Engineer, Intel Corporation.
Opinions expressed are those of the author and do not represent Intel
Corporation
 
Intel China Software Lab. 
Tel: 021-52574545 ext. 1271
iNet: 8-752-1271