Re: [Etherboot-developers] Re: [Etherboot-users] pci.c patch

[<ebi...@ln...>]

Ken Yap <ke...@bi...> writes:

> >For the last case reported on this list, this code won't solve it.
> >The problem there was serverworks has 2 parrallel pci buses.  I'm
> >not certain if they are even bridged.
> >
> >Unless there is a performace problem setting busses = 256, and
> >scanning all potential PCI busses should be much more reliable.
> 
> Do you know how Linux does it?

I know some of it I haven't been over the entire code.  What I don't
know is how linux finds multiple host bridges.  It might just
recognize a wider class of devices as bridges then  etherboot. What it
does is that it starts with the first bus, and recurses into buses
when it finds a different bus number.  linux also knows about a lot of
different hardware, so it can reconfigure it correctly.  

But linux is trying for a lot more than etherboot.  Etherboot already
makes the assumption that BIOS has setup the PCI bus (at least enough
for it's uses).  So it doesn't need to be half as thorough.

Seriously if we make scan bus have busses = 256.  And then never
increment the bus count we will be fine, and the code will be simple.

255 is the maximum possible bus number, and etherboot already tests
for the presence of a pci device in the slot, so it should ignore an
unused bus pretty quickly.  It already correctly ignores an unused
bus or the previous patch wouldn't have worked.  Plus etherboot has an
early out mechanism, so we shouldn't even get past the first pci bus
on most machines. 

Eric