FW: Pro100 & OPSD Network boot issue (fwd)

[Stefan L. <st...@uc...>]

Hi,

Being GPL and all, ive decided to mail you with a recent problem we had
using EEPRO 100's and Intel boards with a phoenix bios.  This problem
existed on the 810 & 815.  Intel wont change it, so we got them 2 fix the
bootcode.  There is also a solution to why it works. I dont understand it
much. hehe.

Hope you and lots of others around the world can make some use of it.

Thanks

Stefan




> It looks like we have a simple solution here for the custom Pro100+ option
> ROM.
> 
> Here is a simplistic overview of the steps that our BBS compliant CORE
> BIOS performs when scanning for the option ROM.
> 
> 1. During ROM scan, we find the option ROM at CC00:0000, checksum it etc,
> the jump to it's entry point at CC00:0003, this code then jumps to
> CC00:0054 to execute the option ROM init code.
> 2. Option ROM init code installs an INT19 vector of CC00:0082
> 3. Our system BIOS now looks for the PCI & PNP tables in the option ROM by
> looking at WORD offsets at 18h and 1Ah.
> 4. A valid PNP Expansion Header is found at address CC00:0034
> 5. We read the Boot Strap Entry Vector (BEV) entry at table offset 1Ah
> (CC00:004E). BEV vector is read as 0054.
> 6. Because we found a valid BEV we then assume this is the boot vector.
> BEV has priority over INT19.
> 7. We now store the INT19 vector along with the BEV and set the boot
> method for this option ROM to BEV.
> 8. During INT19 boot, we attempt to boot from the BEV address, so we jump
> to CC00:0054 where the option ROM init code is run again (obviously a
> mistake), as the BEV should really point to offset 0082 (actual INT19
> vector).
> 9. Option ROM fails to boot (obviously), so we attempt to boot from the
> next device in the list.
> 
> Now, the important addresses here are:-
> 
> CC00:004E - BEV vector. Should point to a vaild BEV.
> CC00:0054 - Option ROM init code, all it does is install the INT19 vector
> of CC00:0082
> CC00:0082 - Actual INT19 boot vector. The BEV should point to this address
> rather than 0054.
> 
> I've modified the option ROM image the customer sent in by hacking the BEV
> entry to 0082, and recalculating the checksum to 00 by changing byte
> CC00:3FFF from FF to D1.
> 
> ROM attached.
> 
> For reference, take a look at the BBS spec (1.01), page 33 for details of
> the PnP & PCI tables in the option ROM.
> http://www.phoenix.com/products/specs-bbs101.pdf
> 
>  <<FIXUP.ZIP>> 
> Thanks to OPSD's BBS expert Jordan Justen.
> 
> Stephen Baldwin.
> Server/Workstation Technical Marketing Engineer.
> Intel Corp UK, Pipers Way, 
> Swindon, Wilts, SN3 1RJ, UK.
> Tel: +44 1793 403251
> Fax: +44 1793 511527
> email: Ste...@in...
>