MSKWH, MSKLH question for zero shift amount

[scruty]

I'm chasing the cause for memory corruption which occur only when running under es40 in one of my test programs and while waiting for the DBG watch points to trigger (and praying that DBG staying up), I looked at the emulation of instructions suspicious for causing register intialisation errors.

In cpu_bwx.h there is

#define DO_MSKWH  state.r[REG_3] = (V_2 & 7) ? \     (state.r[REG_1] &~(X64_WORD >> ((64 - ((V_2 & 7) * 8)) & 63))) : state.r[REG_1];
#define DO_MSKLH  state.r[REG_3] = (V_2 & 7) ? \     (state.r[REG_1] &~(X64_LONG >> ((64 - ((V_2 & 7) * 8)) & 63))) : state.r[REG_1];

shouldn't REG_1 it be masked as follows, because who knows what's in upper REG_1 [and how REG_3 will be used]?

#define DO_MSKWH  state.r[REG_3] = (V_2 & 7) ? \     (state.r[REG_1] &~(X64_WORD >> ((64 - ((V_2 & 7) * 8)) & 63))) : state.r[REG_1] & X64_WORD;
#define DO_MSKLH  state.r[REG_3] = (V_2 & 7) ? \     (state.r[REG_1] &~(X64_LONG >> ((64 - ((V_2 & 7) * 8)) & 63))) : state.r[REG_1] & X64_LONG;

BYTE_ZAP's byte_mask also to be applied for zero shifts according to the instr descr.

[scruty]

sorry, please ignore my previous post.

the current version is correct in this respect.
(i.a., byte_mask is correctly applied where necessary, in INSBL, INSWL,INSLL)