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#1 Skeleton of Wang 700A Core Memory

accepted
None
2016-10-16
2016-10-16
No

Define interface to the Core Memory class.

This class simulates the Wang 700A Core Memory unit. It provides independent access to data registers and program steps.

Data is accessed as registers numbered from 0 to 122. One data register contains one floating point value having 12 decimal digits of mantissa and 2 decimal digits of exponent.

Program is accessed by steps numbered from 0 to 959. One program step contains one machine instruction code represented as 2-byte unsigned integer value.


Implement skeleton of the Core Memory class.

For simplicity at this point data and program storages are implemented as two independent arrays. Note that in the real machine these storages physically overlap.


Comments:

The Core Memory class will be finally implemented as a combination of storage and provider classes. It will not be responsible for representation of floating point data and program step codes in their native formatting.

Discussion

  • Alexander A. Strelets

    • status: open --> accepted
     
  • Alexander A. Strelets

    • Milestone: 0.1 --> 1.1 Wang 700A basic units
     
  • Alexander A. Strelets

    • summary: Skeleton of Wang 700 Core Memory --> Skeleton of Wang 700A Core Memory
    • Description has changed:

    Diff:

    --- old
    +++ new
    @@ -1,6 +1,6 @@
     **Define interface to the Core Memory class.**
    
    -This class simulates the Wang 700A/B Core Memory unit. It provides independent access to data registers and program steps.
    +This class simulates the Wang 700A Core Memory unit. It provides independent access to data registers and program steps.
    
     Data is accessed as registers numbered from 0 to 122. One data register contains one floating point value having 12 decimal digits of mantissa and 2 decimal digits of exponent.
    
     

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