embedlets-developer

[Embedlets-dev] [HW] HDL, FPGA and other assorted acronyms....

[Andrzej J. T. <an...@ch...>]

Took me a while to figure out what FPGA meant.  

Anyway.....this seems to be very low level hardware oriented stuff. I think that 
logica arrays (HDL, JHDL) is a great technology (reminds me of my youth with 
digital logic decades ago) but way too low a level for our needs (though it 
might make sense for device designers, who would then expose their 
hardware with a JAPL interface). Might be some good insights on Graphical 
Widing techniques there.  But I don't see much regarding our Embedlet 
Container implementation.

> I think that putting Embedlets into an FPGA using this kind of technology could
> prove to be very interesting.

Wouldn't you use FPGA to design/create/configure a processor that then could 
run something like Java/Embedlets?  In which case it just looks like another 
processor (aJile, Intel, PIC, whatever) to us.  Again, it seems that FPGA is 
much lower level (hardware design) than we are targeting.

Unless I missed something. ;-)

Andrzej Jan Taramina
Chaeron Corporation: Enterprise System Solutions
http://www.chaeron.com

Re: [Embedlets-dev] [HW] HDL, FPGA and other assorted acronyms....

[Holger B. <ho...@bi...>]

> Unless I missed something. ;-)
>
Yes, you are missing that this Description Language is a abstraction 
Layer regardless the level of implementation. There are much more 
complex things done in descriptive languages, than any embbedded 
devices should be care of. For example, the aJile Processor is 
available as a VHDL (AFAIRC, otherwise it is Verilog) description. But 
there is no problem to have a single NOR as an 'embedlet'.
The aJile ASIC himself is developed with this language, for most 
embedded Controller/Devices exist already HDL descriptions.

One is able to describe _any_ digital hardwaredevice, including 
temparature sensors and mainframe computers. You are able to use these 
bricks in any other construction and combination. HDL has inputs, 
outputs, events, vectors of bits, vectors of vectors etc. pp.

It is _not_ a modeling language, like UML, it is a reality language. 
Wiring-, Testing-, Simulation- Compilertools are parts of the language.

IMHO, if i read the docs of emblets - you are definig a second approach 
to HDL. The own OutPost HDL. I do not know ... looks like this second 
invention of the wheel for me.

bax

Re: [Embedlets-dev] [HW] HDL, FPGA and other assorted acronyms....

[Brill P. <bri...@ro...>]

I think they are traditionally used mainly for "glue" chip tasks, and can
replace a large number of discrete components quickly, and allow updating
via. software... similar to uC's but really for a different purpose
(although the lines seem to be blurring significantly).

- Brill Pappin
  Rogue Robotics
  www.roguerobotics.com


----- Original Message -----
From: "Andrzej Jan Taramina" <an...@ch...>
To: <emb...@li...>
Sent: Tuesday, February 18, 2003 4:36 PM
Subject: [Embedlets-dev] [HW] HDL, FPGA and other assorted acronyms....


> Topic tags:[ARCH][JAPL][WIRING][DOCS][MGMT][STRATEGY][NEWBIE]
> _______________________________________________
>
> Took me a while to figure out what FPGA meant.
>
> Anyway.....this seems to be very low level hardware oriented stuff. I
think that
> logica arrays (HDL, JHDL) is a great technology (reminds me of my youth
with
> digital logic decades ago) but way too low a level for our needs (though
it
> might make sense for device designers, who would then expose their
> hardware with a JAPL interface). Might be some good insights on Graphical
> Widing techniques there.  But I don't see much regarding our Embedlet
> Container implementation.
>
> > I think that putting Embedlets into an FPGA using this kind of
technology could
> > prove to be very interesting.
>
> Wouldn't you use FPGA to design/create/configure a processor that then
could
> run something like Java/Embedlets?  In which case it just looks like
another
> processor (aJile, Intel, PIC, whatever) to us.  Again, it seems that FPGA
is
> much lower level (hardware design) than we are targeting.
>
> Unless I missed something. ;-)
>
> Andrzej Jan Taramina
> Chaeron Corporation: Enterprise System Solutions
> http://www.chaeron.com
>
>
>
> -------------------------------------------------------
> This sf.net email is sponsored by:ThinkGeek
> Welcome to geek heaven.
> http://thinkgeek.com/sf
> _______________________________________________
> Embedlets-developer mailing list
> Emb...@li...
> https://lists.sourceforge.net/lists/listinfo/embedlets-developer

RE: [Embedlets-dev] [HW] HDL, FPGA and other assorted acronyms....

[Christopher S. <cs...@oo...>]

Field Programmable Gate Arrays

They are actually quite powerful devices that can replace whole boards full
of components. They now have micro-processor cores (up to 4x400 Mhz
PowerPc'c per chip!) that you can drop in and integrate with your logic.
There is a real parallel with what we are doing in that whole functional
systems are defined in a 'C' based descriptive language with the possible
aid of a graphical wiring tool. The advantage of this approach is that
simulation is performed on the workstation by running the 'C' code. Then the
verified part is generated (burned) from a blank or mass produced as a
fabricated chip.

http://www.xilinx.com/xlnx/xil_prodcat_landingpage.jsp?title=Virtex-II+Pro+F
PGAs

The cross over occurs when an embedlet configuration might get
cross-compiled into a FPGA similar to what muvium is doing with the PIC
core. I suspect that it won't be long before a Java VM is available as well
that could leverage embedlets directly.

James would probably have the most insight into this.

James?

>
> Topic tags:[ARCH][JAPL][WIRING][DOCS][MGMT][STRATEGY][NEWBIE]
> _______________________________________________
>
> I think they are traditionally used mainly for "glue" chip tasks, and can
> replace a large number of discrete components quickly, and allow updating
> via. software... similar to uC's but really for a different purpose
> (although the lines seem to be blurring significantly).
>
> - Brill Pappin
>   Rogue Robotics
>   www.roguerobotics.com
>
>
> ----- Original Message -----
> From: "Andrzej Jan Taramina" <an...@ch...>
> To: <emb...@li...>
> Sent: Tuesday, February 18, 2003 4:36 PM
> Subject: [Embedlets-dev] [HW] HDL, FPGA and other assorted acronyms....
>
>
> > Topic tags:[ARCH][JAPL][WIRING][DOCS][MGMT][STRATEGY][NEWBIE]
> > _______________________________________________
> >
> > Took me a while to figure out what FPGA meant.
> >
> > Anyway.....this seems to be very low level hardware oriented stuff. I
> think that
> > logica arrays (HDL, JHDL) is a great technology (reminds me of my youth
> with
> > digital logic decades ago) but way too low a level for our needs (though
> it
> > might make sense for device designers, who would then expose their
> > hardware with a JAPL interface). Might be some good insights on
> Graphical
> > Widing techniques there.  But I don't see much regarding our Embedlet
> > Container implementation.
> >
> > > I think that putting Embedlets into an FPGA using this kind of
> technology could
> > > prove to be very interesting.
> >
> > Wouldn't you use FPGA to design/create/configure a processor that then
> could
> > run something like Java/Embedlets?  In which case it just looks like
> another
> > processor (aJile, Intel, PIC, whatever) to us.  Again, it seems
> that FPGA
> is
> > much lower level (hardware design) than we are targeting.
> >
> > Unless I missed something. ;-)
> >
> > Andrzej Jan Taramina
> > Chaeron Corporation: Enterprise System Solutions
> > http://www.chaeron.com
> >
> >
> >
> > -------------------------------------------------------
> > This sf.net email is sponsored by:ThinkGeek
> > Welcome to geek heaven.
> > http://thinkgeek.com/sf
> > _______________________________________________
> > Embedlets-developer mailing list
> > Emb...@li...
> > https://lists.sourceforge.net/lists/listinfo/embedlets-developer
>
>
>
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