From: Joseph K. <jk...@us...> - 2013-01-16 15:09:11
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On Wed, Jan 16, 2013 at 10:47 AM, <jk...@us...> wrote: > Revision: 2899 > http://elftoolchain.svn.sourceforge.net/elftoolchain/?rev=2899&view=rev > Author: jkoshy > Date: 2013-01-16 05:17:02 +0000 (Wed, 16 Jan 2013) > Log Message: > ----------- > Add a preliminary description of the instruction set supported by Atmel > AVR 8-bit CPUs. This 8-bit CPU seemed like a good candidate for use in the initial phases of development of the isa(1) utility: * Its 16-bit instruction word is small enough that extensive testing of the code generated by isa(1) seems feasible. * The instruction encoding itself offers scope to experiment with notational features that would be used for more complex architectures. At the same time, the instruction encoding is more tractable than that of a CISC CPU like the x86. The currently planned syntax for instruction set descriptions has been (partially) described in a manual page: "trunk/isa/isa.5". Comments welcome. Regards, Joseph Koshy |