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dri-patches
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From: <ma...@ke...> - 2007-08-30 23:37:43
|
shared-core/drm_pciids.txt | 7
shared-core/nouveau_drm.h | 2
shared-core/nouveau_fifo.c | 3
shared-core/nouveau_mem.c | 12
shared-core/nouveau_state.c | 3
shared-core/nv04_graph.c | 638 ++++++++++++++++++++++++--------------------
shared-core/nv04_instmem.c | 1
7 files changed, 348 insertions(+), 318 deletions(-)
New commits:
diff-tree bac3f49daa54bf34ea21854be23061d10a0d0d1b (from 69b11f44f0a0cfe0806e18dae2f360bc1ed8e005)
Author: Stephane Marchesin <mar...@ic...>
Date: Fri Aug 31 01:39:40 2007 +0200
nouveau: nv04 context switching support. Works for starting X up at least.
diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c
index 050f6e8..213696c 100644
--- a/shared-core/nv04_graph.c
+++ b/shared-core/nv04_graph.c
@@ -27,262 +27,321 @@
#include "nouveau_drm.h"
#include "nouveau_drv.h"
-struct reg_interval
-{
- uint32_t reg;
- int number;
-} nv04_graph_ctx_regs [] = {
- {NV04_PGRAPH_CTX_SWITCH1,1},
- {NV04_PGRAPH_CTX_SWITCH2,1},
- {NV04_PGRAPH_CTX_SWITCH3,1},
- {NV04_PGRAPH_CTX_SWITCH4,1},
- {NV04_PGRAPH_CTX_CACHE1,1},
- {NV04_PGRAPH_CTX_CACHE2,1},
- {NV04_PGRAPH_CTX_CACHE3,1},
- {NV04_PGRAPH_CTX_CACHE4,1},
- {0x00400184,1},
- {0x004001a4,1},
- {0x004001c4,1},
- {0x004001e4,1},
- {0x00400188,1},
- {0x004001a8,1},
- {0x004001c8,1},
- {0x004001e8,1},
- {0x0040018c,1},
- {0x004001ac,1},
- {0x004001cc,1},
- {0x004001ec,1},
- {0x00400190,1},
- {0x004001b0,1},
- {0x004001d0,1},
- {0x004001f0,1},
- {0x00400194,1},
- {0x004001b4,1},
- {0x004001d4,1},
- {0x004001f4,1},
- {0x00400198,1},
- {0x004001b8,1},
- {0x004001d8,1},
- {0x004001f8,1},
- {0x0040019c,1},
- {0x004001bc,1},
- {0x004001dc,1},
- {0x004001fc,1},
- {0x00400174,1},
- {NV04_PGRAPH_DMA_START_0,1},
- {NV04_PGRAPH_DMA_START_1,1},
- {NV04_PGRAPH_DMA_LENGTH,1},
- {NV04_PGRAPH_DMA_MISC,1},
- {NV04_PGRAPH_DMA_PITCH,1},
- {NV04_PGRAPH_BOFFSET0,1},
- {NV04_PGRAPH_BBASE0,1},
- {NV04_PGRAPH_BLIMIT0,1},
- {NV04_PGRAPH_BOFFSET1,1},
- {NV04_PGRAPH_BBASE1,1},
- {NV04_PGRAPH_BLIMIT1,1},
- {NV04_PGRAPH_BOFFSET2,1},
- {NV04_PGRAPH_BBASE2,1},
- {NV04_PGRAPH_BLIMIT2,1},
- {NV04_PGRAPH_BOFFSET3,1},
- {NV04_PGRAPH_BBASE3,1},
- {NV04_PGRAPH_BLIMIT3,1},
- {NV04_PGRAPH_BOFFSET4,1},
- {NV04_PGRAPH_BBASE4,1},
- {NV04_PGRAPH_BLIMIT4,1},
- {NV04_PGRAPH_BOFFSET5,1},
- {NV04_PGRAPH_BBASE5,1},
- {NV04_PGRAPH_BLIMIT5,1},
- {NV04_PGRAPH_BPITCH0,1},
- {NV04_PGRAPH_BPITCH1,1},
- {NV04_PGRAPH_BPITCH2,1},
- {NV04_PGRAPH_BPITCH3,1},
- {NV04_PGRAPH_BPITCH4,1},
- {NV04_PGRAPH_SURFACE,1},
- {NV04_PGRAPH_STATE,1},
- {NV04_PGRAPH_BSWIZZLE2,1},
- {NV04_PGRAPH_BSWIZZLE5,1},
- {NV04_PGRAPH_BPIXEL,1},
- {NV04_PGRAPH_NOTIFY,1},
- {NV04_PGRAPH_PATT_COLOR0,1},
- {NV04_PGRAPH_PATT_COLOR1,1},
- {NV04_PGRAPH_PATT_COLORRAM,64},
- {NV04_PGRAPH_PATTERN,1},
- {0x0040080c,1},
- {NV04_PGRAPH_PATTERN_SHAPE,1},
- {0x00400600,1},
- {NV04_PGRAPH_ROP3,1},
- {NV04_PGRAPH_CHROMA,1},
- {NV04_PGRAPH_BETA_AND,1},
- {NV04_PGRAPH_BETA_PREMULT,1},
- {NV04_PGRAPH_CONTROL0,1},
- {NV04_PGRAPH_CONTROL1,1},
- {NV04_PGRAPH_CONTROL2,1},
- {NV04_PGRAPH_BLEND,1},
- {NV04_PGRAPH_STORED_FMT,1},
- {NV04_PGRAPH_SOURCE_COLOR,1},
- {0x00400560,1},
- {0x00400568,1},
- {0x00400564,1},
- {0x0040056c,1},
- {0x00400400,1},
- {0x00400480,1},
- {0x00400404,1},
- {0x00400484,1},
- {0x00400408,1},
- {0x00400488,1},
- {0x0040040c,1},
- {0x0040048c,1},
- {0x00400410,1},
- {0x00400490,1},
- {0x00400414,1},
- {0x00400494,1},
- {0x00400418,1},
- {0x00400498,1},
- {0x0040041c,1},
- {0x0040049c,1},
- {0x00400420,1},
- {0x004004a0,1},
- {0x00400424,1},
- {0x004004a4,1},
- {0x00400428,1},
- {0x004004a8,1},
- {0x0040042c,1},
- {0x004004ac,1},
- {0x00400430,1},
- {0x004004b0,1},
- {0x00400434,1},
- {0x004004b4,1},
- {0x00400438,1},
- {0x004004b8,1},
- {0x0040043c,1},
- {0x004004bc,1},
- {0x00400440,1},
- {0x004004c0,1},
- {0x00400444,1},
- {0x004004c4,1},
- {0x00400448,1},
- {0x004004c8,1},
- {0x0040044c,1},
- {0x004004cc,1},
- {0x00400450,1},
- {0x004004d0,1},
- {0x00400454,1},
- {0x004004d4,1},
- {0x00400458,1},
- {0x004004d8,1},
- {0x0040045c,1},
- {0x004004dc,1},
- {0x00400460,1},
- {0x004004e0,1},
- {0x00400464,1},
- {0x004004e4,1},
- {0x00400468,1},
- {0x004004e8,1},
- {0x0040046c,1},
- {0x004004ec,1},
- {0x00400470,1},
- {0x004004f0,1},
- {0x00400474,1},
- {0x004004f4,1},
- {0x00400478,1},
- {0x004004f8,1},
- {0x0040047c,1},
- {0x004004fc,1},
- {0x0040053c,1},
- {0x00400544,1},
- {0x00400540,1},
- {0x00400548,1},
- {0x00400560,1},
- {0x00400568,1},
- {0x00400564,1},
- {0x0040056c,1},
- {0x00400534,1},
- {0x00400538,1},
- {0x00400514,1},
- {0x00400518,1},
- {0x0040051c,1},
- {0x00400520,1},
- {0x00400524,1},
- {0x00400528,1},
- {0x0040052c,1},
- {0x00400530,1},
- {0x00400d00,1},
- {0x00400d40,1},
- {0x00400d80,1},
- {0x00400d04,1},
- {0x00400d44,1},
- {0x00400d84,1},
- {0x00400d08,1},
- {0x00400d48,1},
- {0x00400d88,1},
- {0x00400d0c,1},
- {0x00400d4c,1},
- {0x00400d8c,1},
- {0x00400d10,1},
- {0x00400d50,1},
- {0x00400d90,1},
- {0x00400d14,1},
- {0x00400d54,1},
- {0x00400d94,1},
- {0x00400d18,1},
- {0x00400d58,1},
- {0x00400d98,1},
- {0x00400d1c,1},
- {0x00400d5c,1},
- {0x00400d9c,1},
- {0x00400d20,1},
- {0x00400d60,1},
- {0x00400da0,1},
- {0x00400d24,1},
- {0x00400d64,1},
- {0x00400da4,1},
- {0x00400d28,1},
- {0x00400d68,1},
- {0x00400da8,1},
- {0x00400d2c,1},
- {0x00400d6c,1},
- {0x00400dac,1},
- {0x00400d30,1},
- {0x00400d70,1},
- {0x00400db0,1},
- {0x00400d34,1},
- {0x00400d74,1},
- {0x00400db4,1},
- {0x00400d38,1},
- {0x00400d78,1},
- {0x00400db8,1},
- {0x00400d3c,1},
- {0x00400d7c,1},
- {0x00400dbc,1},
- {0x00400590,1},
- {0x00400594,1},
- {0x00400598,1},
- {0x0040059c,1},
- {0x004005a8,1},
- {0x004005ac,1},
- {0x004005b0,1},
- {0x004005b4,1},
- {0x004005c0,1},
- {0x004005c4,1},
- {0x004005c8,1},
- {0x004005cc,1},
- {0x004005d0,1},
- {0x004005d4,1},
- {0x004005d8,1},
- {0x004005dc,1},
- {0x004005e0,1},
- {NV04_PGRAPH_PASSTHRU_0,1},
- {NV04_PGRAPH_PASSTHRU_1,1},
- {NV04_PGRAPH_PASSTHRU_2,1},
- {NV04_PGRAPH_DVD_COLORFMT,1},
- {NV04_PGRAPH_SCALED_FORMAT,1},
- {NV04_PGRAPH_MISC24_0,1},
- {NV04_PGRAPH_MISC24_1,1},
- {NV04_PGRAPH_MISC24_2,1},
- {0x00400500,1},
- {0x00400504,1},
- {NV04_PGRAPH_VALID1,1},
- {NV04_PGRAPH_VALID2,1}
+static uint32_t nv04_graph_ctx_regs [] = {
+ NV04_PGRAPH_CTX_SWITCH1,
+ NV04_PGRAPH_CTX_SWITCH2,
+ NV04_PGRAPH_CTX_SWITCH3,
+ NV04_PGRAPH_CTX_SWITCH4,
+ NV04_PGRAPH_CTX_CACHE1,
+ NV04_PGRAPH_CTX_CACHE2,
+ NV04_PGRAPH_CTX_CACHE3,
+ NV04_PGRAPH_CTX_CACHE4,
+ 0x00400184,
+ 0x004001a4,
+ 0x004001c4,
+ 0x004001e4,
+ 0x00400188,
+ 0x004001a8,
+ 0x004001c8,
+ 0x004001e8,
+ 0x0040018c,
+ 0x004001ac,
+ 0x004001cc,
+ 0x004001ec,
+ 0x00400190,
+ 0x004001b0,
+ 0x004001d0,
+ 0x004001f0,
+ 0x00400194,
+ 0x004001b4,
+ 0x004001d4,
+ 0x004001f4,
+ 0x00400198,
+ 0x004001b8,
+ 0x004001d8,
+ 0x004001f8,
+ 0x0040019c,
+ 0x004001bc,
+ 0x004001dc,
+ 0x004001fc,
+ 0x00400174,
+ NV04_PGRAPH_DMA_START_0,
+ NV04_PGRAPH_DMA_START_1,
+ NV04_PGRAPH_DMA_LENGTH,
+ NV04_PGRAPH_DMA_MISC,
+ NV04_PGRAPH_DMA_PITCH,
+ NV04_PGRAPH_BOFFSET0,
+ NV04_PGRAPH_BBASE0,
+ NV04_PGRAPH_BLIMIT0,
+ NV04_PGRAPH_BOFFSET1,
+ NV04_PGRAPH_BBASE1,
+ NV04_PGRAPH_BLIMIT1,
+ NV04_PGRAPH_BOFFSET2,
+ NV04_PGRAPH_BBASE2,
+ NV04_PGRAPH_BLIMIT2,
+ NV04_PGRAPH_BOFFSET3,
+ NV04_PGRAPH_BBASE3,
+ NV04_PGRAPH_BLIMIT3,
+ NV04_PGRAPH_BOFFSET4,
+ NV04_PGRAPH_BBASE4,
+ NV04_PGRAPH_BLIMIT4,
+ NV04_PGRAPH_BOFFSET5,
+ NV04_PGRAPH_BBASE5,
+ NV04_PGRAPH_BLIMIT5,
+ NV04_PGRAPH_BPITCH0,
+ NV04_PGRAPH_BPITCH1,
+ NV04_PGRAPH_BPITCH2,
+ NV04_PGRAPH_BPITCH3,
+ NV04_PGRAPH_BPITCH4,
+ NV04_PGRAPH_SURFACE,
+ NV04_PGRAPH_STATE,
+ NV04_PGRAPH_BSWIZZLE2,
+ NV04_PGRAPH_BSWIZZLE5,
+ NV04_PGRAPH_BPIXEL,
+ NV04_PGRAPH_NOTIFY,
+ NV04_PGRAPH_PATT_COLOR0,
+ NV04_PGRAPH_PATT_COLOR1,
+ NV04_PGRAPH_PATT_COLORRAM+0x00,
+ NV04_PGRAPH_PATT_COLORRAM+0x01,
+ NV04_PGRAPH_PATT_COLORRAM+0x02,
+ NV04_PGRAPH_PATT_COLORRAM+0x03,
+ NV04_PGRAPH_PATT_COLORRAM+0x04,
+ NV04_PGRAPH_PATT_COLORRAM+0x05,
+ NV04_PGRAPH_PATT_COLORRAM+0x06,
+ NV04_PGRAPH_PATT_COLORRAM+0x07,
+ NV04_PGRAPH_PATT_COLORRAM+0x08,
+ NV04_PGRAPH_PATT_COLORRAM+0x09,
+ NV04_PGRAPH_PATT_COLORRAM+0x0A,
+ NV04_PGRAPH_PATT_COLORRAM+0x0B,
+ NV04_PGRAPH_PATT_COLORRAM+0x0C,
+ NV04_PGRAPH_PATT_COLORRAM+0x0D,
+ NV04_PGRAPH_PATT_COLORRAM+0x0E,
+ NV04_PGRAPH_PATT_COLORRAM+0x0F,
+ NV04_PGRAPH_PATT_COLORRAM+0x10,
+ NV04_PGRAPH_PATT_COLORRAM+0x11,
+ NV04_PGRAPH_PATT_COLORRAM+0x12,
+ NV04_PGRAPH_PATT_COLORRAM+0x13,
+ NV04_PGRAPH_PATT_COLORRAM+0x14,
+ NV04_PGRAPH_PATT_COLORRAM+0x15,
+ NV04_PGRAPH_PATT_COLORRAM+0x16,
+ NV04_PGRAPH_PATT_COLORRAM+0x17,
+ NV04_PGRAPH_PATT_COLORRAM+0x18,
+ NV04_PGRAPH_PATT_COLORRAM+0x19,
+ NV04_PGRAPH_PATT_COLORRAM+0x1A,
+ NV04_PGRAPH_PATT_COLORRAM+0x1B,
+ NV04_PGRAPH_PATT_COLORRAM+0x1C,
+ NV04_PGRAPH_PATT_COLORRAM+0x1D,
+ NV04_PGRAPH_PATT_COLORRAM+0x1E,
+ NV04_PGRAPH_PATT_COLORRAM+0x1F,
+ NV04_PGRAPH_PATT_COLORRAM+0x20,
+ NV04_PGRAPH_PATT_COLORRAM+0x21,
+ NV04_PGRAPH_PATT_COLORRAM+0x22,
+ NV04_PGRAPH_PATT_COLORRAM+0x23,
+ NV04_PGRAPH_PATT_COLORRAM+0x24,
+ NV04_PGRAPH_PATT_COLORRAM+0x25,
+ NV04_PGRAPH_PATT_COLORRAM+0x26,
+ NV04_PGRAPH_PATT_COLORRAM+0x27,
+ NV04_PGRAPH_PATT_COLORRAM+0x28,
+ NV04_PGRAPH_PATT_COLORRAM+0x29,
+ NV04_PGRAPH_PATT_COLORRAM+0x2A,
+ NV04_PGRAPH_PATT_COLORRAM+0x2B,
+ NV04_PGRAPH_PATT_COLORRAM+0x2C,
+ NV04_PGRAPH_PATT_COLORRAM+0x2D,
+ NV04_PGRAPH_PATT_COLORRAM+0x2E,
+ NV04_PGRAPH_PATT_COLORRAM+0x2F,
+ NV04_PGRAPH_PATT_COLORRAM+0x30,
+ NV04_PGRAPH_PATT_COLORRAM+0x31,
+ NV04_PGRAPH_PATT_COLORRAM+0x32,
+ NV04_PGRAPH_PATT_COLORRAM+0x33,
+ NV04_PGRAPH_PATT_COLORRAM+0x34,
+ NV04_PGRAPH_PATT_COLORRAM+0x35,
+ NV04_PGRAPH_PATT_COLORRAM+0x36,
+ NV04_PGRAPH_PATT_COLORRAM+0x37,
+ NV04_PGRAPH_PATT_COLORRAM+0x38,
+ NV04_PGRAPH_PATT_COLORRAM+0x39,
+ NV04_PGRAPH_PATT_COLORRAM+0x3A,
+ NV04_PGRAPH_PATT_COLORRAM+0x3B,
+ NV04_PGRAPH_PATT_COLORRAM+0x3C,
+ NV04_PGRAPH_PATT_COLORRAM+0x3D,
+ NV04_PGRAPH_PATT_COLORRAM+0x3E,
+ NV04_PGRAPH_PATT_COLORRAM+0x3F,
+ NV04_PGRAPH_PATTERN,
+ 0x0040080c,
+ NV04_PGRAPH_PATTERN_SHAPE,
+ 0x00400600,
+ NV04_PGRAPH_ROP3,
+ NV04_PGRAPH_CHROMA,
+ NV04_PGRAPH_BETA_AND,
+ NV04_PGRAPH_BETA_PREMULT,
+ NV04_PGRAPH_CONTROL0,
+ NV04_PGRAPH_CONTROL1,
+ NV04_PGRAPH_CONTROL2,
+ NV04_PGRAPH_BLEND,
+ NV04_PGRAPH_STORED_FMT,
+ NV04_PGRAPH_SOURCE_COLOR,
+ 0x00400560,
+ 0x00400568,
+ 0x00400564,
+ 0x0040056c,
+ 0x00400400,
+ 0x00400480,
+ 0x00400404,
+ 0x00400484,
+ 0x00400408,
+ 0x00400488,
+ 0x0040040c,
+ 0x0040048c,
+ 0x00400410,
+ 0x00400490,
+ 0x00400414,
+ 0x00400494,
+ 0x00400418,
+ 0x00400498,
+ 0x0040041c,
+ 0x0040049c,
+ 0x00400420,
+ 0x004004a0,
+ 0x00400424,
+ 0x004004a4,
+ 0x00400428,
+ 0x004004a8,
+ 0x0040042c,
+ 0x004004ac,
+ 0x00400430,
+ 0x004004b0,
+ 0x00400434,
+ 0x004004b4,
+ 0x00400438,
+ 0x004004b8,
+ 0x0040043c,
+ 0x004004bc,
+ 0x00400440,
+ 0x004004c0,
+ 0x00400444,
+ 0x004004c4,
+ 0x00400448,
+ 0x004004c8,
+ 0x0040044c,
+ 0x004004cc,
+ 0x00400450,
+ 0x004004d0,
+ 0x00400454,
+ 0x004004d4,
+ 0x00400458,
+ 0x004004d8,
+ 0x0040045c,
+ 0x004004dc,
+ 0x00400460,
+ 0x004004e0,
+ 0x00400464,
+ 0x004004e4,
+ 0x00400468,
+ 0x004004e8,
+ 0x0040046c,
+ 0x004004ec,
+ 0x00400470,
+ 0x004004f0,
+ 0x00400474,
+ 0x004004f4,
+ 0x00400478,
+ 0x004004f8,
+ 0x0040047c,
+ 0x004004fc,
+ 0x0040053c,
+ 0x00400544,
+ 0x00400540,
+ 0x00400548,
+ 0x00400560,
+ 0x00400568,
+ 0x00400564,
+ 0x0040056c,
+ 0x00400534,
+ 0x00400538,
+ 0x00400514,
+ 0x00400518,
+ 0x0040051c,
+ 0x00400520,
+ 0x00400524,
+ 0x00400528,
+ 0x0040052c,
+ 0x00400530,
+ 0x00400d00,
+ 0x00400d40,
+ 0x00400d80,
+ 0x00400d04,
+ 0x00400d44,
+ 0x00400d84,
+ 0x00400d08,
+ 0x00400d48,
+ 0x00400d88,
+ 0x00400d0c,
+ 0x00400d4c,
+ 0x00400d8c,
+ 0x00400d10,
+ 0x00400d50,
+ 0x00400d90,
+ 0x00400d14,
+ 0x00400d54,
+ 0x00400d94,
+ 0x00400d18,
+ 0x00400d58,
+ 0x00400d98,
+ 0x00400d1c,
+ 0x00400d5c,
+ 0x00400d9c,
+ 0x00400d20,
+ 0x00400d60,
+ 0x00400da0,
+ 0x00400d24,
+ 0x00400d64,
+ 0x00400da4,
+ 0x00400d28,
+ 0x00400d68,
+ 0x00400da8,
+ 0x00400d2c,
+ 0x00400d6c,
+ 0x00400dac,
+ 0x00400d30,
+ 0x00400d70,
+ 0x00400db0,
+ 0x00400d34,
+ 0x00400d74,
+ 0x00400db4,
+ 0x00400d38,
+ 0x00400d78,
+ 0x00400db8,
+ 0x00400d3c,
+ 0x00400d7c,
+ 0x00400dbc,
+ 0x00400590,
+ 0x00400594,
+ 0x00400598,
+ 0x0040059c,
+ 0x004005a8,
+ 0x004005ac,
+ 0x004005b0,
+ 0x004005b4,
+ 0x004005c0,
+ 0x004005c4,
+ 0x004005c8,
+ 0x004005cc,
+ 0x004005d0,
+ 0x004005d4,
+ 0x004005d8,
+ 0x004005dc,
+ 0x004005e0,
+ NV04_PGRAPH_PASSTHRU_0,
+ NV04_PGRAPH_PASSTHRU_1,
+ NV04_PGRAPH_PASSTHRU_2,
+ NV04_PGRAPH_DVD_COLORFMT,
+ NV04_PGRAPH_SCALED_FORMAT,
+ NV04_PGRAPH_MISC24_0,
+ NV04_PGRAPH_MISC24_1,
+ NV04_PGRAPH_MISC24_2,
+ 0x00400500,
+ 0x00400504,
+ NV04_PGRAPH_VALID1,
+ NV04_PGRAPH_VALID2
};
@@ -290,43 +349,35 @@ struct reg_interval
void nouveau_nv04_context_switch(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- int channel, channel_old, i, j, index;
+ struct nouveau_channel *next, *last;
+ int chid;
+
+ chid = NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1);
+ next = dev_priv->fifos[chid];
- channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1);
- channel_old = (NV_READ(NV04_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
+ chid = (NV_READ(NV04_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
+ last = dev_priv->fifos[chid];
- DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n",channel_old, channel);
+ DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n",last->id, next->id);
NV_WRITE(NV03_PFIFO_CACHES, 0x0);
NV_WRITE(NV04_PFIFO_CACHE0_PULL0, 0x0);
NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x0);
NV_WRITE(NV04_PGRAPH_FIFO,0x0);
- nouveau_wait_for_idle(dev);
+ nv04_graph_save_context(last);
- // save PGRAPH context
- index=0;
- for (i = 0; i<sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
- for (j = 0; j<nv04_graph_ctx_regs[i].number; j++)
- {
- dev_priv->fifos[channel_old]->pgraph_ctx[index] = NV_READ(nv04_graph_ctx_regs[i].reg+j*4);
- index++;
- }
+ nouveau_wait_for_idle(dev);
NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10000000);
NV_WRITE(NV04_PGRAPH_CTX_USER, (NV_READ(NV04_PGRAPH_CTX_USER) & 0xffffff) | (0x0f << 24));
- // restore PGRAPH context
- index=0;
- for (i = 0; i<sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
- for (j = 0; j<nv04_graph_ctx_regs[i].number; j++)
- {
- NV_WRITE(nv04_graph_ctx_regs[i].reg+j*4, dev_priv->fifos[channel]->pgraph_ctx[index]);
- index++;
- }
+ nouveau_wait_for_idle(dev);
+
+ nv04_graph_load_context(last);
NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10010100);
- NV_WRITE(NV04_PGRAPH_CTX_USER, channel << 24);
+ NV_WRITE(NV04_PGRAPH_CTX_USER, next->id << 24);
NV_WRITE(NV04_PGRAPH_FFINTFC_ST2, NV_READ(NV04_PGRAPH_FFINTFC_ST2)&0x000FFFFF);
NV_WRITE(NV04_PGRAPH_FIFO,0x0);
@@ -356,19 +407,30 @@ void nv04_graph_destroy_context(struct n
int nv04_graph_load_context(struct nouveau_channel *chan)
{
- DRM_ERROR("stub!\n");
+ struct drm_device *dev = chan->dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ int i;
+
+ for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
+ NV_WRITE(nv04_graph_ctx_regs[i], chan->pgraph_ctx[i]);
+
return 0;
}
int nv04_graph_save_context(struct nouveau_channel *chan)
{
- DRM_ERROR("stub!\n");
+ struct drm_device *dev = chan->dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ int i;
+
+ for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
+ chan->pgraph_ctx[i] = NV_READ(nv04_graph_ctx_regs[i]);
+
return 0;
}
int nv04_graph_init(struct drm_device *dev) {
struct drm_nouveau_private *dev_priv = dev->dev_private;
- int i,sum=0;
NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) &
~NV_PMC_ENABLE_PGRAPH);
@@ -380,23 +442,19 @@ int nv04_graph_init(struct drm_device *d
NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
// check the context is big enough
- for ( i = 0 ; i<sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
- sum+=nv04_graph_ctx_regs[i].number;
- if ( sum*4>sizeof(dev_priv->fifos[0]->pgraph_ctx) )
+ if ( sizeof(nv04_graph_ctx_regs)>sizeof(dev_priv->fifos[0]->pgraph_ctx) )
DRM_ERROR("pgraph_ctx too small\n");
- NV_WRITE(NV03_PGRAPH_INTR_EN, 0x00000000);
- NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF);
-
NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x000001FF);
- NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x1230C000);
- NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x72111101);
- NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x11D5F071);
+ NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x1231c000);
+ NV_WRITE(NV04_PGRAPH_DEBUG_1, 0xf2d91100);
+ NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x11d5f870);
NV_WRITE(NV04_PGRAPH_DEBUG_3, 0x0004FF31);
NV_WRITE(NV04_PGRAPH_DEBUG_3, 0x4004FF31 |
(0x00D00000) |
(1<<29) |
(1<<31));
+ NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xfad4ff31);
NV_WRITE(NV04_PGRAPH_STATE , 0xFFFFFFFF);
NV_WRITE(NV04_PGRAPH_CTX_CONTROL , 0x10010100);
diff-tree 69b11f44f0a0cfe0806e18dae2f360bc1ed8e005 (from c78e610fa42c8122ed6bc504222ef650f5693d22)
Author: Stephane Marchesin <mar...@ic...>
Date: Thu Aug 30 21:51:53 2007 +0200
nouveau: give nv03 the last cut.
diff --git a/shared-core/drm_pciids.txt b/shared-core/drm_pciids.txt
index 4bd690b..8d90f3a 100644
--- a/shared-core/drm_pciids.txt
+++ b/shared-core/drm_pciids.txt
@@ -482,9 +482,6 @@
0x10DE 0x009E NV40 "NVidia 0x009E"
[nouveau]
-0x10de 0x0008 NV_03 "EDGE 3D"
-0x10de 0x0009 NV_03 "EDGE 3D"
-0x10de 0x0010 NV_03 "Mutara V08"
0x10de 0x0020 NV_04 "RIVA TNT"
0x10de 0x0028 NV_04 "RIVA TNT2/TNT2 Pro"
0x10de 0x0029 NV_04 "RIVA TNT2 Ultra"
@@ -732,10 +729,6 @@
0x10de 0x0421 NV_50 "GeForce 8500 GT"
0x10de 0x0422 NV_50 "GeForce 8400 GS"
0x10de 0x0423 NV_50 "GeForce 8300 GS"
-0x12d2 0x0008 NV_03 "NV1"
-0x12d2 0x0009 NV_03 "DAC64"
-0x12d2 0x0018 NV_03 "Riva128"
-0x12d2 0x0019 NV_03 "Riva128ZX"
0x12d2 0x0020 NV_04 "TNT"
0x12d2 0x0028 NV_04 "TNT2"
0x12d2 0x0029 NV_04 "UTNT2"
diff --git a/shared-core/nouveau_drm.h b/shared-core/nouveau_drm.h
index bfc9bd4..c4f1e9a 100644
--- a/shared-core/nouveau_drm.h
+++ b/shared-core/nouveau_drm.h
@@ -119,8 +119,6 @@ struct drm_nouveau_setparam {
enum nouveau_card_type {
NV_UNKNOWN =0,
- NV_01 =1,
- NV_03 =3,
NV_04 =4,
NV_05 =5,
NV_10 =10,
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c
index 1aa724f..437c84f 100644
--- a/shared-core/nouveau_fifo.c
+++ b/shared-core/nouveau_fifo.c
@@ -34,8 +34,6 @@ int nouveau_fifo_number(struct drm_devic
struct drm_nouveau_private *dev_priv=dev->dev_private;
switch(dev_priv->card_type)
{
- case NV_03:
- return 8;
case NV_04:
case NV_05:
return 16;
@@ -109,7 +107,6 @@ static int nouveau_fifo_instmem_configur
case NV_11:
case NV_10:
case NV_04:
- case NV_03:
NV_WRITE(NV03_PFIFO_RAMFC, dev_priv->ramfc_offset>>8);
break;
}
diff --git a/shared-core/nouveau_mem.c b/shared-core/nouveau_mem.c
index 2cc0ed7..dbfba35 100644
--- a/shared-core/nouveau_mem.c
+++ b/shared-core/nouveau_mem.c
@@ -257,18 +257,6 @@ uint64_t nouveau_mem_fb_amount(struct dr
struct drm_nouveau_private *dev_priv=dev->dev_private;
switch(dev_priv->card_type)
{
- case NV_03:
- switch(NV_READ(NV03_BOOT_0)&NV03_BOOT_0_RAM_AMOUNT)
- {
- case NV03_BOOT_0_RAM_AMOUNT_8MB:
- case NV03_BOOT_0_RAM_AMOUNT_8MB_SDRAM:
- return 8*1024*1024;
- case NV03_BOOT_0_RAM_AMOUNT_4MB:
- return 4*1024*1024;
- case NV03_BOOT_0_RAM_AMOUNT_2MB:
- return 2*1024*1024;
- }
- break;
case NV_04:
case NV_05:
if (NV_READ(NV03_BOOT_0) & 0x00000100) {
diff --git a/shared-core/nouveau_state.c b/shared-core/nouveau_state.c
index d885f7c..e73b487 100644
--- a/shared-core/nouveau_state.c
+++ b/shared-core/nouveau_state.c
@@ -538,9 +538,6 @@ void nouveau_wait_for_idle(struct drm_de
{
struct drm_nouveau_private *dev_priv=dev->dev_private;
switch(dev_priv->card_type) {
- case NV_03:
- while (NV_READ(NV03_PGRAPH_STATUS));
- break;
case NV_50:
break;
default: {
diff --git a/shared-core/nv04_instmem.c b/shared-core/nv04_instmem.c
index fed6ff7..5a44645 100644
--- a/shared-core/nv04_instmem.c
+++ b/shared-core/nv04_instmem.c
@@ -70,7 +70,6 @@ nv04_instmem_configure_fixed_tables(stru
case NV_11:
case NV_10:
case NV_04:
- case NV_03:
default:
dev_priv->ramfc_offset = 0x11400;
dev_priv->ramfc_size = nouveau_fifo_number(dev) *
|
|
From: <ma...@ke...> - 2007-09-06 00:45:28
|
shared-core/nv04_graph.c | 15 ++++++++-------
shared-core/nv30_graph.c | 29 +++++++++++++++--------------
2 files changed, 23 insertions(+), 21 deletions(-)
New commits:
diff-tree edf5a86a269690b0e42a5cee7d4ac3828b42ca3e (from ff9a019cf06b7ebaf2fa8dee8e37c866ca4623af)
Author: Stephane Marchesin <mar...@ic...>
Date: Thu Sep 6 02:46:45 2007 +0200
nouveau: fix some nv04 graph switching.
diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c
index 213696c..f1117cd 100644
--- a/shared-core/nv04_graph.c
+++ b/shared-core/nv04_graph.c
@@ -358,14 +358,15 @@ void nouveau_nv04_context_switch(struct
chid = (NV_READ(NV04_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
last = dev_priv->fifos[chid];
- DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n",last->id, next->id);
+ DRM_INFO("NV: PGRAPH context switch interrupt channel %x -> %x\n",last->id, next->id);
- NV_WRITE(NV03_PFIFO_CACHES, 0x0);
+/* NV_WRITE(NV03_PFIFO_CACHES, 0x0);
NV_WRITE(NV04_PFIFO_CACHE0_PULL0, 0x0);
- NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x0);
+ NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x0);*/
NV_WRITE(NV04_PGRAPH_FIFO,0x0);
- nv04_graph_save_context(last);
+ if (last)
+ nv04_graph_save_context(last);
nouveau_wait_for_idle(dev);
@@ -374,16 +375,16 @@ void nouveau_nv04_context_switch(struct
nouveau_wait_for_idle(dev);
- nv04_graph_load_context(last);
+ nv04_graph_load_context(next);
NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10010100);
NV_WRITE(NV04_PGRAPH_CTX_USER, next->id << 24);
NV_WRITE(NV04_PGRAPH_FFINTFC_ST2, NV_READ(NV04_PGRAPH_FFINTFC_ST2)&0x000FFFFF);
- NV_WRITE(NV04_PGRAPH_FIFO,0x0);
+/* NV_WRITE(NV04_PGRAPH_FIFO,0x0);
NV_WRITE(NV04_PFIFO_CACHE0_PULL0, 0x0);
NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x1);
- NV_WRITE(NV03_PFIFO_CACHES, 0x1);
+ NV_WRITE(NV03_PFIFO_CACHES, 0x1);*/
NV_WRITE(NV04_PGRAPH_FIFO,0x1);
}
diff-tree ff9a019cf06b7ebaf2fa8dee8e37c866ca4623af (from ef4944de85b974e6b91087fdcb8f241f2619d28d)
Author: Stephane Marchesin <mar...@ic...>
Date: Thu Sep 6 02:12:05 2007 +0200
nouveau: add pure nv30 support.
diff --git a/shared-core/nv30_graph.c b/shared-core/nv30_graph.c
index ca43bb9..590a5c3 100644
--- a/shared-core/nv30_graph.c
+++ b/shared-core/nv30_graph.c
@@ -8,9 +8,8 @@
#include "nouveau_drm.h"
/*
- * There are 4 families :
- * NV30 is 0x10de:0x030* (not working, no dump for that one)
- *
+ * There are 3 families :
+ * NV30 is 0x10de:0x030*
* NV31 is 0x10de:0x031*
*
* NV34 is 0x10de:0x032*
@@ -25,11 +24,11 @@
*/
-#define NV31_GRCTX_SIZE (22392)
-#define NV34_GRCTX_SIZE (18140)
-#define NV35_GRCTX_SIZE (22396)
+#define NV30_31_GRCTX_SIZE (22392)
+#define NV34_GRCTX_SIZE (18140)
+#define NV35_36_GRCTX_SIZE (22396)
-static void nv31_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+static void nv30_31_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
int i;
@@ -919,7 +918,8 @@ static void nv31_graph_context_init(stru
INSTANCE_WR(ctx, 0x3858/4, 0x40000000);
INSTANCE_WR(ctx, 0x385c/4, 0x3f800000);
INSTANCE_WR(ctx, 0x3864/4, 0xbf800000);
- INSTANCE_WR(ctx, 0x386c/4, 0xbf800000);}
+ INSTANCE_WR(ctx, 0x386c/4, 0xbf800000);
+}
static void nv34_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
{
@@ -1814,7 +1814,7 @@ static void nv34_graph_context_init(stru
INSTANCE_WR(ctx, 0x2f00/4, 0xbf800000);
}
-static void nv35_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+static void nv35_36_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
int i;
@@ -2715,9 +2715,10 @@ int nv30_graph_create_context(struct nou
int ret;
switch (dev_priv->chipset) {
+ case 0x30:
case 0x31:
- ctx_size = NV31_GRCTX_SIZE;
- ctx_init = nv31_graph_context_init;
+ ctx_size = NV30_31_GRCTX_SIZE;
+ ctx_init = nv30_31_graph_context_init;
break;
case 0x34:
ctx_size = NV34_GRCTX_SIZE;
@@ -2725,12 +2726,12 @@ int nv30_graph_create_context(struct nou
break;
case 0x35:
case 0x36:
- ctx_size = NV35_GRCTX_SIZE;
- ctx_init = nv35_graph_context_init;
+ ctx_size = NV35_36_GRCTX_SIZE;
+ ctx_init = nv35_36_graph_context_init;
break;
default:
ctx_size = 0;
- ctx_init = nv35_graph_context_init;
+ ctx_init = nv35_36_graph_context_init;
DRM_ERROR("Please contact the devs if you want your NV%x card to work\n",dev_priv->chipset);
break;
}
|
|
From: <jb...@ke...> - 2007-09-11 10:53:19
|
shared-core/i915_dma.c | 46 +++++++++++++++++-----------------
shared-core/i915_drm.h | 21 ++++++++-------
shared-core/i915_drv.h | 5 ++-
shared-core/i915_irq.c | 66 +++++++++++++++++++++++++------------------------
4 files changed, 73 insertions(+), 65 deletions(-)
New commits:
diff-tree 7fdf98051a51a0117f415f7f7374f2b4d0b2e531 (from parents)
Merge: 3cb8acd5abcb410ab2982f55aec94b5a793a47d6 0bd8752a0cb8afb7f29a5f659c3459aab42d9955
Author: Jesse Barnes <jes...@in...>
Date: Tue Sep 11 03:50:17 2007 -0700
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm
diff-tree 3cb8acd5abcb410ab2982f55aec94b5a793a47d6 (from 00bb534a546a4ca4bb6e167f5b387fa8156f4ca7)
Author: Jesse Barnes <jes...@in...>
Date: Tue Sep 11 03:48:46 2007 -0700
Disambiguate planes & pipes for swap operations
This mod makes the SAREA track plane to pipe mappings and corrects the name of
the plane info variables (they were mislabeled as pipe info since until now all
code assumed a direct mapping between planes and pipes).
It also updates the flip ioctl argument to take a set of planes rather than
pipes, since planes are flipped while pipes generate vblank events.
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index 9f18fee..daa03df 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -572,11 +572,11 @@ static int i915_dispatch_batchbuffer(str
return 0;
}
-static void i915_do_dispatch_flip(struct drm_device * dev, int pipe, int sync)
+static void i915_do_dispatch_flip(struct drm_device * dev, int plane, int sync)
{
drm_i915_private_t *dev_priv = dev->dev_private;
u32 num_pages, current_page, next_page, dspbase;
- int shift = 2 * pipe, x, y;
+ int shift = 2 * plane, x, y;
RING_LOCALS;
/* Calculate display base offset */
@@ -597,25 +597,25 @@ static void i915_do_dispatch_flip(struct
break;
}
- if (pipe == 0) {
- x = dev_priv->sarea_priv->pipeA_x;
- y = dev_priv->sarea_priv->pipeA_y;
+ if (plane == 0) {
+ x = dev_priv->sarea_priv->planeA_x;
+ y = dev_priv->sarea_priv->planeA_y;
} else {
- x = dev_priv->sarea_priv->pipeB_x;
- y = dev_priv->sarea_priv->pipeB_y;
+ x = dev_priv->sarea_priv->planeB_x;
+ y = dev_priv->sarea_priv->planeB_y;
}
dspbase += (y * dev_priv->sarea_priv->pitch + x) * dev_priv->cpp;
- DRM_DEBUG("pipe=%d current_page=%d dspbase=0x%x\n", pipe, current_page,
+ DRM_DEBUG("plane=%d current_page=%d dspbase=0x%x\n", plane, current_page,
dspbase);
BEGIN_LP_RING(4);
OUT_RING(sync ? 0 :
- (MI_WAIT_FOR_EVENT | (pipe ? MI_WAIT_FOR_PLANE_B_FLIP :
+ (MI_WAIT_FOR_EVENT | (plane ? MI_WAIT_FOR_PLANE_B_FLIP :
MI_WAIT_FOR_PLANE_A_FLIP)));
OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | (sync ? 0 : ASYNC_FLIP) |
- (pipe ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
+ (plane ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
OUT_RING(dev_priv->sarea_priv->pitch * dev_priv->cpp);
OUT_RING(dspbase);
ADVANCE_LP_RING();
@@ -624,19 +624,19 @@ static void i915_do_dispatch_flip(struct
dev_priv->sarea_priv->pf_current_page |= next_page << shift;
}
-void i915_dispatch_flip(struct drm_device * dev, int pipes, int sync)
+void i915_dispatch_flip(struct drm_device * dev, int planes, int sync)
{
drm_i915_private_t *dev_priv = dev->dev_private;
int i;
- DRM_DEBUG("%s: pipes=0x%x pfCurrentPage=%d\n",
+ DRM_DEBUG("%s: planes=0x%x pfCurrentPage=%d\n",
__FUNCTION__,
- pipes, dev_priv->sarea_priv->pf_current_page);
+ planes, dev_priv->sarea_priv->pf_current_page);
i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH);
for (i = 0; i < 2; i++)
- if (pipes & (1 << i))
+ if (planes & (1 << i))
i915_do_dispatch_flip(dev, i, sync);
i915_emit_breadcrumb(dev);
@@ -728,21 +728,21 @@ static int i915_cmdbuffer(struct drm_dev
static int i915_do_cleanup_pageflip(struct drm_device * dev)
{
drm_i915_private_t *dev_priv = dev->dev_private;
- int i, pipes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
+ int i, planes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
DRM_DEBUG("%s\n", __FUNCTION__);
- for (i = 0, pipes = 0; i < 2; i++)
+ for (i = 0, planes = 0; i < 2; i++)
if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) {
dev_priv->sarea_priv->pf_current_page =
(dev_priv->sarea_priv->pf_current_page &
~(0x3 << (2 * i))) | (num_pages - 1) << (2 * i);
- pipes |= 1 << i;
+ planes |= 1 << i;
}
- if (pipes)
- i915_dispatch_flip(dev, pipes, 0);
+ if (planes)
+ i915_dispatch_flip(dev, planes, 0);
return 0;
}
@@ -755,13 +755,13 @@ static int i915_flip_bufs(struct drm_dev
LOCK_TEST_WITH_RETURN(dev, file_priv);
- if (param->pipes & ~0x3) {
- DRM_ERROR("Invalid pipes 0x%x, only <= 0x3 is valid\n",
- param->pipes);
+ if (param->planes & ~0x3) {
+ DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n",
+ param->planes);
return -EINVAL;
}
- i915_dispatch_flip(dev, param->pipes, 0);
+ i915_dispatch_flip(dev, param->planes, 0);
return 0;
}
diff --git a/shared-core/i915_drm.h b/shared-core/i915_drm.h
index 3a90df6..575b182 100644
--- a/shared-core/i915_drm.h
+++ b/shared-core/i915_drm.h
@@ -105,14 +105,17 @@ typedef struct _drm_i915_sarea {
unsigned int rotated_tiled;
unsigned int rotated2_tiled;
- int pipeA_x;
- int pipeA_y;
- int pipeA_w;
- int pipeA_h;
- int pipeB_x;
- int pipeB_y;
- int pipeB_w;
- int pipeB_h;
+ int planeA_x;
+ int planeA_y;
+ int planeA_w;
+ int planeA_h;
+ int planeB_x;
+ int planeB_y;
+ int planeB_w;
+ int planeB_h;
+
+ int planeA_pipe;
+ int planeB_pipe;
/* Triple buffering */
drm_handle_t third_handle;
@@ -182,7 +185,7 @@ typedef struct _drm_i915_sarea {
/* Asynchronous page flipping:
*/
typedef struct drm_i915_flip {
- int pipes;
+ int planes;
} drm_i915_flip_t;
/* Allow drivers to submit batchbuffers directly to hardware, relying
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index aff03be..c5f5189 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -55,10 +55,11 @@
* - Support vertical blank on secondary display pipe
* 1.8: New ioctl for ARB_Occlusion_Query
* 1.9: Usable page flipping and triple buffering
+ * 1.10: Plane/pipe disentangling
*/
#define DRIVER_MAJOR 1
#if defined(I915_HAVE_FENCE) && defined(I915_HAVE_BUFFER)
-#define DRIVER_MINOR 9
+#define DRIVER_MINOR 10
#else
#define DRIVER_MINOR 6
#endif
@@ -87,7 +88,7 @@ struct mem_block {
typedef struct _drm_i915_vbl_swap {
struct list_head head;
drm_drawable_t drw_id;
- unsigned int pipe;
+ unsigned int plane;
unsigned int sequence;
int flip;
} drm_i915_vbl_swap_t;
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 1056b3e..72c6187 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -44,28 +44,28 @@
*/
static void
i915_dispatch_vsync_flip(struct drm_device *dev, struct drm_drawable_info *drw,
- int pipe)
+ int plane)
{
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
u16 x1, y1, x2, y2;
- int pf_pipes = 1 << pipe;
+ int pf_planes = 1 << plane;
DRM_SPINLOCK_ASSERT(&dev->drw_lock);
- /* If the window is visible on the other pipe, we have to flip on that
- * pipe as well.
+ /* If the window is visible on the other plane, we have to flip on that
+ * plane as well.
*/
- if (pipe == 1) {
- x1 = sarea_priv->pipeA_x;
- y1 = sarea_priv->pipeA_y;
- x2 = x1 + sarea_priv->pipeA_w;
- y2 = y1 + sarea_priv->pipeA_h;
+ if (plane == 1) {
+ x1 = sarea_priv->planeA_x;
+ y1 = sarea_priv->planeA_y;
+ x2 = x1 + sarea_priv->planeA_w;
+ y2 = y1 + sarea_priv->planeA_h;
} else {
- x1 = sarea_priv->pipeB_x;
- y1 = sarea_priv->pipeB_y;
- x2 = x1 + sarea_priv->pipeB_w;
- y2 = y1 + sarea_priv->pipeB_h;
+ x1 = sarea_priv->planeB_x;
+ y1 = sarea_priv->planeB_y;
+ x2 = x1 + sarea_priv->planeB_w;
+ y2 = y1 + sarea_priv->planeB_h;
}
if (x2 > 0 && y2 > 0) {
@@ -75,13 +75,13 @@ i915_dispatch_vsync_flip(struct drm_devi
for (i = 0; i < num_rects; i++)
if (!(rect[i].x1 >= x2 || rect[i].y1 >= y2 ||
rect[i].x2 <= x1 || rect[i].y2 <= y1)) {
- pf_pipes = 0x3;
+ pf_planes = 0x3;
break;
}
}
- i915_dispatch_flip(dev, pf_pipes, 1);
+ i915_dispatch_flip(dev, pf_planes, 1);
}
/**
@@ -124,8 +124,10 @@ static void i915_vblank_tasklet(struct d
list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
drm_i915_vbl_swap_t *vbl_swap =
list_entry(list, drm_i915_vbl_swap_t, head);
+ int pipe = vbl_swap->plane ? sarea_priv->planeB_pipe :
+ sarea_priv->planeA_pipe;
- if ((counter[vbl_swap->pipe] - vbl_swap->sequence) > (1<<23))
+ if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
continue;
list_del(list);
@@ -176,10 +178,10 @@ static void i915_vblank_tasklet(struct d
i915_kernel_lost_context(dev);
upper[0] = upper[1] = 0;
- slice[0] = max(sarea_priv->pipeA_h / nhits, 1);
- slice[1] = max(sarea_priv->pipeB_h / nhits, 1);
- lower[0] = sarea_priv->pipeA_y + slice[0];
- lower[1] = sarea_priv->pipeB_y + slice[0];
+ slice[0] = max(sarea_priv->planeA_h / nhits, 1);
+ slice[1] = max(sarea_priv->planeB_h / nhits, 1);
+ lower[0] = sarea_priv->planeA_y + slice[0];
+ lower[1] = sarea_priv->planeB_y + slice[0];
offsets[0] = sarea_priv->front_offset;
offsets[1] = sarea_priv->back_offset;
@@ -205,7 +207,7 @@ static void i915_vblank_tasklet(struct d
drm_i915_vbl_swap_t *swap_hit =
list_entry(hit, drm_i915_vbl_swap_t, head);
struct drm_clip_rect *rect;
- int num_rects, pipe, front, back;
+ int num_rects, plane, front, back;
unsigned short top, bottom;
drw = drm_get_drawable_info(dev, swap_hit->drw_id);
@@ -213,10 +215,10 @@ static void i915_vblank_tasklet(struct d
if (!drw)
continue;
- pipe = swap_hit->pipe;
+ plane = swap_hit->plane;
if (swap_hit->flip) {
- i915_dispatch_vsync_flip(dev, drw, pipe);
+ i915_dispatch_vsync_flip(dev, drw, plane);
continue;
}
@@ -238,11 +240,11 @@ static void i915_vblank_tasklet(struct d
}
rect = drw->rects;
- top = upper[pipe];
- bottom = lower[pipe];
+ top = upper[plane];
+ bottom = lower[plane];
front = (dev_priv->sarea_priv->pf_current_page >>
- (2 * pipe)) & 0x3;
+ (2 * plane)) & 0x3;
back = (front + 1) % num_pages;
for (num_rects = drw->num_rects; num_rects--; rect++) {
@@ -560,9 +562,10 @@ int i915_vblank_swap(struct drm_device *
drm_i915_private_t *dev_priv = dev->dev_private;
drm_i915_vblank_swap_t *swap = data;
drm_i915_vbl_swap_t *vbl_swap;
- unsigned int pipe, seqtype, curseq;
+ unsigned int pipe, seqtype, curseq, plane;
unsigned long irqflags;
struct list_head *list;
+ drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
if (!dev_priv) {
DRM_ERROR("%s called with no initialization\n", __func__);
@@ -581,7 +584,8 @@ int i915_vblank_swap(struct drm_device *
return -EINVAL;
}
- pipe = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
+ plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
+ pipe = plane ? sarea_priv->planeB_pipe : sarea_priv->planeA_pipe;
seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
@@ -624,7 +628,7 @@ int i915_vblank_swap(struct drm_device *
return -EINVAL;
}
- i915_dispatch_vsync_flip(dev, drw, pipe);
+ i915_dispatch_vsync_flip(dev, drw, plane);
DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
@@ -638,7 +642,7 @@ int i915_vblank_swap(struct drm_device *
vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head);
if (vbl_swap->drw_id == swap->drawable &&
- vbl_swap->pipe == pipe &&
+ vbl_swap->plane == plane &&
vbl_swap->sequence == swap->sequence) {
vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags);
@@ -664,7 +668,7 @@ int i915_vblank_swap(struct drm_device *
DRM_DEBUG("\n");
vbl_swap->drw_id = swap->drawable;
- vbl_swap->pipe = pipe;
+ vbl_swap->plane = plane;
vbl_swap->sequence = swap->sequence;
vbl_swap->flip = (swap->seqtype & _DRM_VBLANK_FLIP);
|
|
From: <da...@ke...> - 2007-09-18 19:07:13
|
shared-core/i915_irq.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
New commits:
diff-tree e349b58b4a6ebfe299720cb921039a600c145e65 (from 78d111fa967d18e7f9f9b2acd26aff20b884eb6c)
Author: Michel Dänzer <mi...@tu...>
Date: Tue Sep 18 21:03:22 2007 +0100
i915: Reinstate check that drawable has valid information in i915_vblank_swap.
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index ea84c70..7baa23c 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -612,6 +612,21 @@ int i915_vblank_swap(struct drm_device *
return -EINVAL;
}
+ DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags);
+
+ /* It makes no sense to schedule a swap for a drawable that doesn't have
+ * valid information at this point. E.g. this could mean that the X
+ * server is too old to push drawable information to the DRM, in which
+ * case all such swaps would become ineffective.
+ */
+ if (!drm_get_drawable_info(dev, swap->drawable)) {
+ DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
+ DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
+ return -EINVAL;
+ }
+
+ DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags);
+
curseq = atomic_read(pipe ? &dev->vbl_received2 : &dev->vbl_received);
if (seqtype == _DRM_VBLANK_RELATIVE)
diff-tree 78d111fa967d18e7f9f9b2acd26aff20b884eb6c (from a3881ad2fef99aaf0a863609a847020ea822798c)
Author: Michel Dänzer <mi...@tu...>
Date: Tue Sep 18 20:55:43 2007 +0100
i915: Fix scheduled buffer swaps.
One instance of unlocking a spinlock was converted incorrectly when this code
was fixed to build on BSD.
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 804e3fb..ea84c70 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -188,7 +188,7 @@ static void i915_vblank_tasklet(struct d
DRM_SPINLOCK(&dev_priv->swaps_lock);
}
- DRM_SPINUNLOCK(&dev->drw_lock);
+ DRM_SPINUNLOCK(&dev_priv->swaps_lock);
if (nhits == 0) {
return;
|
|
From: <ma...@ke...> - 2007-09-21 20:27:01
|
shared-core/nouveau_notifier.c | 5 ++++-
shared-core/nv04_graph.c | 27 ++++++++++++++++++++++++++-
2 files changed, 30 insertions(+), 2 deletions(-)
New commits:
diff-tree dc60c452e6ac72ebc4e5c73153d4d9d8c9edfae5 (from 74c6f2f47a9977fef8fcc7c698862d5bd2f54336)
Author: Stephane Marchesin <mar...@ic...>
Date: Fri Sep 21 22:27:53 2007 +0200
nouveau: fix notifiers on PPC.
diff --git a/shared-core/nouveau_notifier.c b/shared-core/nouveau_notifier.c
index 71b8cbe..fbd4b56 100644
--- a/shared-core/nouveau_notifier.c
+++ b/shared-core/nouveau_notifier.c
@@ -37,9 +37,12 @@ nouveau_notifier_init_channel(struct nou
int flags, ret;
/*TODO: PCI notifier blocks */
+#if defined(__powerpc__)
if (dev_priv->agp_heap)
flags = NOUVEAU_MEM_AGP;
- else if (dev_priv->pci_heap)
+ else
+#endif
+ if (dev_priv->pci_heap)
flags = NOUVEAU_MEM_PCI;
else
flags = NOUVEAU_MEM_FB;
diff-tree 74c6f2f47a9977fef8fcc7c698862d5bd2f54336 (from bc5423f16838257a040a55b88df9588d268fda06)
Author: Stephane Marchesin <mar...@ic...>
Date: Fri Sep 21 22:04:45 2007 +0200
nouveau: add some checks to the nv04 graph switching code.
diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c
index f1117cd..2cf052c 100644
--- a/shared-core/nv04_graph.c
+++ b/shared-core/nv04_graph.c
@@ -352,13 +352,38 @@ void nouveau_nv04_context_switch(struct
struct nouveau_channel *next, *last;
int chid;
+ if (!dev) {
+ DRM_DEBUG("Invalid drm_device\n");
+ return;
+ }
+ dev_priv = dev->dev_private;
+ if (!dev_priv) {
+ DRM_DEBUG("Invalid drm_nouveau_private\n");
+ return;
+ }
+ if (!dev_priv->fifos) {
+ DRM_DEBUG("Invalid drm_nouveau_private->fifos\n");
+ return;
+ }
+
chid = NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1);
next = dev_priv->fifos[chid];
+ if (!next) {
+ DRM_DEBUG("Invalid next channel\n");
+ return;
+ }
+
chid = (NV_READ(NV04_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
last = dev_priv->fifos[chid];
- DRM_INFO("NV: PGRAPH context switch interrupt channel %x -> %x\n",last->id, next->id);
+ if (!last) {
+ DRM_DEBUG("WARNING: Invalid last channel, switch to %x\n",
+ next->id);
+ } else {
+ DRM_INFO("NV: PGRAPH context switch interrupt channel %x -> %x\n",
+ last->id, next->id);
+ }
/* NV_WRITE(NV03_PFIFO_CACHES, 0x0);
NV_WRITE(NV04_PFIFO_CACHE0_PULL0, 0x0);
|
|
From: <ai...@ke...> - 2007-09-25 06:22:19
|
libdrm/xf86drm.c | 29 ++++++++++++++-----------
libdrm/xf86mm.h | 9 ++++---
linux-core/drm_bo.c | 19 +++++++---------
linux-core/drm_fence.c | 53 +++++++++++++++++++++++------------------------
linux-core/drm_objects.h | 18 +++++++--------
linux-core/i915_fence.c | 2 -
linux-core/via_fence.c | 4 +--
linux-core/xgi_fence.c | 2 -
shared-core/drm.h | 4 +--
9 files changed, 71 insertions(+), 69 deletions(-)
New commits:
diff-tree 03c47f1420bf17a1e0f2b86be500656ae5a4c95b (from bb5516f4f47d16d5d59797fa170abd50d35377a7)
Author: Dave Airlie <ai...@li...>
Date: Tue Sep 25 16:16:14 2007 +1000
drm: use fence_class as name instead of class
diff --git a/libdrm/xf86drm.c b/libdrm/xf86drm.c
index 0849f89..dc18d6f 100644
--- a/libdrm/xf86drm.c
+++ b/libdrm/xf86drm.c
@@ -2345,7 +2345,7 @@ int drmCommandWriteRead(int fd, unsigned
* DRM_FENCE_MASK_DRIVER
*/
-int drmFenceCreate(int fd, unsigned flags, int class, unsigned type,
+int drmFenceCreate(int fd, unsigned flags, int fence_class, unsigned type,
drmFence *fence)
{
drm_fence_arg_t arg;
@@ -2353,11 +2353,12 @@ int drmFenceCreate(int fd, unsigned flag
memset(&arg, 0, sizeof(arg));
arg.flags = flags;
arg.type = type;
- arg.class = class;
+ arg.fence_class = fence_class;
+
if (ioctl(fd, DRM_IOCTL_FENCE_CREATE, &arg))
return -errno;
fence->handle = arg.handle;
- fence->class = arg.class;
+ fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->flags = arg.flags;
fence->signaled = 0;
@@ -2370,19 +2371,21 @@ int drmFenceCreate(int fd, unsigned flag
* DRM_FENCE_MASK_DRIVER
*/
-int drmFenceBuffers(int fd, unsigned flags, drmFence *fence)
+int drmFenceBuffers(int fd, unsigned flags, uint32_t fence_class, drmFence *fence)
{
drm_fence_arg_t arg;
memset(&arg, 0, sizeof(arg));
arg.flags = flags;
+ arg.fence_class = fence_class;
if (ioctl(fd, DRM_IOCTL_FENCE_BUFFERS, &arg))
return -errno;
fence->handle = arg.handle;
- fence->class = arg.class;
+ fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->flags = arg.flags;
+ fence->sequence = arg.sequence;
fence->signaled = 0;
return 0;
}
@@ -2409,7 +2412,7 @@ int drmFenceReference(int fd, unsigned h
if (ioctl(fd, DRM_IOCTL_FENCE_REFERENCE, &arg))
return -errno;
fence->handle = arg.handle;
- fence->class = arg.class;
+ fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->flags = arg.flags;
fence->signaled = arg.signaled;
@@ -2438,7 +2441,7 @@ int drmFenceFlush(int fd, drmFence *fenc
if (ioctl(fd, DRM_IOCTL_FENCE_FLUSH, &arg))
return -errno;
- fence->class = arg.class;
+ fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->signaled = arg.signaled;
return 0;
@@ -2453,7 +2456,7 @@ int drmFenceUpdate(int fd, drmFence *fen
if (ioctl(fd, DRM_IOCTL_FENCE_SIGNALED, &arg))
return -errno;
- fence->class = arg.class;
+ fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->signaled = arg.signaled;
return 0;
@@ -2486,14 +2489,14 @@ int drmFenceEmit(int fd, unsigned flags,
drm_fence_arg_t arg;
memset(&arg, 0, sizeof(arg));
- arg.class = fence->class;
+ arg.fence_class = fence->fence_class;
arg.flags = flags;
arg.handle = fence->handle;
arg.type = emit_type;
if (ioctl(fd, DRM_IOCTL_FENCE_EMIT, &arg))
return -errno;
- fence->class = arg.class;
+ fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->signaled = arg.signaled;
return 0;
@@ -2532,7 +2535,7 @@ int drmFenceWait(int fd, unsigned flags,
if (ret)
return -errno;
- fence->class = arg.class;
+ fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->signaled = arg.signaled;
return 0;
@@ -2878,7 +2881,7 @@ int drmBOUnmap(int fd, drmBO *buf)
return 0;
}
-int drmBOValidate(int fd, drmBO *buf,
+int drmBOValidate(int fd, drmBO *buf, uint32_t fence_class,
uint64_t flags, uint64_t mask,
unsigned hint)
{
@@ -2892,7 +2895,7 @@ int drmBOValidate(int fd, drmBO *buf,
req->bo_req.flags = flags;
req->bo_req.mask = mask;
req->bo_req.hint = hint;
- req->bo_req.fence_class = 0; /* Backwards compatibility. */
+ req->bo_req.fence_class = fence_class;
req->op = drm_bo_validate;
do{
diff --git a/libdrm/xf86mm.h b/libdrm/xf86mm.h
index d86644c..cacd13a 100644
--- a/libdrm/xf86mm.h
+++ b/libdrm/xf86mm.h
@@ -96,10 +96,11 @@ typedef struct _drmMMListHead
typedef struct _drmFence
{
unsigned handle;
- int class;
+ int fence_class;
unsigned type;
unsigned flags;
unsigned signaled;
+ uint32_t sequence;
unsigned pad[4]; /* for future expansion */
} drmFence;
@@ -148,7 +149,7 @@ typedef struct _drmBOList {
* Fence functions.
*/
-extern int drmFenceCreate(int fd, unsigned flags, int class,
+extern int drmFenceCreate(int fd, unsigned flags, int fence_class,
unsigned type, drmFence *fence);
extern int drmFenceDestroy(int fd, const drmFence *fence);
extern int drmFenceReference(int fd, unsigned handle, drmFence *fence);
@@ -160,7 +161,7 @@ extern int drmFenceWait(int fd, unsigned
unsigned flush_type);
extern int drmFenceEmit(int fd, unsigned flags, drmFence *fence,
unsigned emit_type);
-extern int drmFenceBuffers(int fd, unsigned flags, drmFence *fence);
+extern int drmFenceBuffers(int fd, unsigned flags, uint32_t fence_class, drmFence *fence);
/*
@@ -188,7 +189,7 @@ extern int drmBOUnReference(int fd, drmB
extern int drmBOMap(int fd, drmBO *buf, unsigned mapFlags, unsigned mapHint,
void **address);
extern int drmBOUnmap(int fd, drmBO *buf);
-extern int drmBOValidate(int fd, drmBO *buf, uint64_t flags,
+extern int drmBOValidate(int fd, drmBO *buf, uint32_t fence_class, uint64_t flags,
uint64_t mask, unsigned hint);
extern int drmBOFence(int fd, drmBO *buf, unsigned flags, unsigned fenceHandle);
diff --git a/shared-core/drm.h b/shared-core/drm.h
index 30c7a1a..b4754ea 100644
--- a/shared-core/drm.h
+++ b/shared-core/drm.h
@@ -647,11 +647,11 @@ struct drm_set_version {
struct drm_fence_arg {
unsigned int handle;
- unsigned int class;
+ unsigned int fence_class;
unsigned int type;
unsigned int flags;
unsigned int signaled;
- unsigned int pad64;
+ unsigned int sequence;
uint64_t expand_pad[3]; /*Future expansion */
};
diff-tree bb5516f4f47d16d5d59797fa170abd50d35377a7 (from 54df1b9ff3b79097fedd8ed7bf54aca30a660cbd)
Author: Dave Airlie <ai...@li...>
Date: Wed Sep 12 23:50:38 2007 +1000
drm/ttm: fixup fence class naming and interfaces
This is some code for nouveau that Ben Skeggs worked on, and also
fixes the naming (having class in a system header file == C++ keyword == bad plan)
diff --git a/linux-core/drm_bo.c b/linux-core/drm_bo.c
index 717e5da..a2f66dc 100644
--- a/linux-core/drm_bo.c
+++ b/linux-core/drm_bo.c
@@ -538,7 +538,7 @@ EXPORT_SYMBOL(drm_bo_usage_deref_unlocke
int drm_fence_buffer_objects(struct drm_file * file_priv,
struct list_head *list,
- uint32_t fence_flags,
+ uint32_t fence_class, uint32_t fence_flags,
struct drm_fence_object * fence,
struct drm_fence_object ** used_fence)
{
@@ -560,13 +560,8 @@ int drm_fence_buffer_objects(struct drm_
list_for_each_entry(entry, list, lru) {
BUG_ON(!(entry->priv_flags & _DRM_BO_FLAG_UNFENCED));
fence_type |= entry->fence_type;
- if (entry->fence_class != 0) {
- DRM_ERROR("Fence class %d is not implemented yet.\n",
- entry->fence_class);
- ret = -EINVAL;
- goto out;
- }
- count++;
+ if (entry->fence_class == fence_class)
+ count++;
}
if (!count) {
@@ -583,7 +578,8 @@ int drm_fence_buffer_objects(struct drm_
list_splice_init(list, &f_list);
if (fence) {
- if ((fence_type & fence->type) != fence_type) {
+ if ((fence_type & fence->type) != fence_type ||
+ (fence->fence_class != fence_class)) {
DRM_ERROR("Given fence doesn't match buffers "
"on unfenced list.\n");
ret = -EINVAL;
@@ -591,7 +587,7 @@ int drm_fence_buffer_objects(struct drm_
}
} else {
mutex_unlock(&dev->struct_mutex);
- ret = drm_fence_object_create(dev, 0, fence_type,
+ ret = drm_fence_object_create(dev, fence_class, fence_type,
fence_flags | DRM_FENCE_FLAG_EMIT,
&fence);
mutex_lock(&dev->struct_mutex);
@@ -609,7 +605,8 @@ int drm_fence_buffer_objects(struct drm_
mutex_lock(&entry->mutex);
mutex_lock(&dev->struct_mutex);
list_del_init(l);
- if (entry->priv_flags & _DRM_BO_FLAG_UNFENCED) {
+ if (entry->priv_flags & _DRM_BO_FLAG_UNFENCED &&
+ entry->fence_class == fence_class) {
count++;
if (entry->fence)
drm_fence_usage_deref_locked(&entry->fence);
diff --git a/linux-core/drm_fence.c b/linux-core/drm_fence.c
index 2f16f7e..a6787b0 100644
--- a/linux-core/drm_fence.c
+++ b/linux-core/drm_fence.c
@@ -34,14 +34,14 @@
* Typically called by the IRQ handler.
*/
-void drm_fence_handler(struct drm_device * dev, uint32_t class,
+void drm_fence_handler(struct drm_device * dev, uint32_t fence_class,
uint32_t sequence, uint32_t type)
{
int wake = 0;
uint32_t diff;
uint32_t relevant;
struct drm_fence_manager *fm = &dev->fm;
- struct drm_fence_class_manager *fc = &fm->class[class];
+ struct drm_fence_class_manager *fc = &fm->fence_class[fence_class];
struct drm_fence_driver *driver = dev->driver->fence_driver;
struct list_head *head;
struct drm_fence_object *fence, *next;
@@ -198,7 +198,7 @@ int drm_fence_object_signaled(struct drm
struct drm_fence_driver *driver = dev->driver->fence_driver;
if (poke_flush)
- driver->poke_flush(dev, fence->class);
+ driver->poke_flush(dev, fence->fence_class);
read_lock_irqsave(&fm->lock, flags);
signaled =
(fence->type & mask & fence->signaled) == (fence->type & mask);
@@ -229,7 +229,7 @@ int drm_fence_object_flush(struct drm_fe
{
struct drm_device *dev = fence->dev;
struct drm_fence_manager *fm = &dev->fm;
- struct drm_fence_class_manager *fc = &fm->class[fence->class];
+ struct drm_fence_class_manager *fc = &fm->fence_class[fence->fence_class];
struct drm_fence_driver *driver = dev->driver->fence_driver;
unsigned long flags;
@@ -253,7 +253,7 @@ int drm_fence_object_flush(struct drm_fe
}
}
write_unlock_irqrestore(&fm->lock, flags);
- driver->poke_flush(dev, fence->class);
+ driver->poke_flush(dev, fence->fence_class);
return 0;
}
@@ -262,10 +262,10 @@ int drm_fence_object_flush(struct drm_fe
* wrapped around and reused.
*/
-void drm_fence_flush_old(struct drm_device * dev, uint32_t class, uint32_t sequence)
+void drm_fence_flush_old(struct drm_device * dev, uint32_t fence_class, uint32_t sequence)
{
struct drm_fence_manager *fm = &dev->fm;
- struct drm_fence_class_manager *fc = &fm->class[class];
+ struct drm_fence_class_manager *fc = &fm->fence_class[fence_class];
struct drm_fence_driver *driver = dev->driver->fence_driver;
uint32_t old_sequence;
unsigned long flags;
@@ -308,7 +308,7 @@ static int drm_fence_lazy_wait(struct dr
{
struct drm_device *dev = fence->dev;
struct drm_fence_manager *fm = &dev->fm;
- struct drm_fence_class_manager *fc = &fm->class[fence->class];
+ struct drm_fence_class_manager *fc = &fm->fence_class[fence->fence_class];
int signaled;
unsigned long _end = jiffies + 3*DRM_HZ;
int ret = 0;
@@ -366,7 +366,7 @@ int drm_fence_object_wait(struct drm_fen
} else {
- if (driver->has_irq(dev, fence->class,
+ if (driver->has_irq(dev, fence->fence_class,
DRM_FENCE_TYPE_EXE)) {
ret = drm_fence_lazy_wait(fence, ignore_signals,
DRM_FENCE_TYPE_EXE);
@@ -374,7 +374,7 @@ int drm_fence_object_wait(struct drm_fen
return ret;
}
- if (driver->has_irq(dev, fence->class,
+ if (driver->has_irq(dev, fence->fence_class,
mask & ~DRM_FENCE_TYPE_EXE)) {
ret = drm_fence_lazy_wait(fence, ignore_signals,
mask);
@@ -409,7 +409,7 @@ int drm_fence_object_emit(struct drm_fen
struct drm_device *dev = fence->dev;
struct drm_fence_manager *fm = &dev->fm;
struct drm_fence_driver *driver = dev->driver->fence_driver;
- struct drm_fence_class_manager *fc = &fm->class[fence->class];
+ struct drm_fence_class_manager *fc = &fm->fence_class[fence->fence_class];
unsigned long flags;
uint32_t sequence;
uint32_t native_type;
@@ -421,7 +421,7 @@ int drm_fence_object_emit(struct drm_fen
return ret;
write_lock_irqsave(&fm->lock, flags);
- fence->class = class;
+ fence->fence_class = class;
fence->type = type;
fence->flush_mask = 0x00;
fence->submitted_flush = 0x00;
@@ -456,7 +456,7 @@ static int drm_fence_object_init(struct
*/
INIT_LIST_HEAD(&fence->base.list);
- fence->class = class;
+ fence->fence_class = class;
fence->type = type;
fence->flush_mask = 0;
fence->submitted_flush = 0;
@@ -466,7 +466,7 @@ static int drm_fence_object_init(struct
write_unlock_irqrestore(&fm->lock, flags);
if (fence_flags & DRM_FENCE_FLAG_EMIT) {
ret = drm_fence_object_emit(fence, fence_flags,
- fence->class, type);
+ fence->fence_class, type);
}
return ret;
}
@@ -533,7 +533,7 @@ void drm_fence_manager_init(struct drm_d
BUG_ON(fm->num_classes > _DRM_FENCE_CLASSES);
for (i=0; i<fm->num_classes; ++i) {
- class = &fm->class[i];
+ class = &fm->fence_class[i];
INIT_LIST_HEAD(&class->ring);
class->pending_flush = 0;
@@ -582,7 +582,7 @@ int drm_fence_create_ioctl(struct drm_de
if (arg->flags & DRM_FENCE_FLAG_EMIT)
LOCK_TEST_WITH_RETURN(dev, file_priv);
- ret = drm_fence_object_create(dev, arg->class,
+ ret = drm_fence_object_create(dev, arg->fence_class,
arg->type, arg->flags, &fence);
if (ret)
return ret;
@@ -601,7 +601,7 @@ int drm_fence_create_ioctl(struct drm_de
arg->handle = fence->base.hash.key;
read_lock_irqsave(&fm->lock, flags);
- arg->class = fence->class;
+ arg->fence_class = fence->fence_class;
arg->type = fence->type;
arg->signaled = fence->signaled;
read_unlock_irqrestore(&fm->lock, flags);
@@ -656,7 +656,7 @@ int drm_fence_reference_ioctl(struct drm
fence = drm_lookup_fence_object(file_priv, arg->handle);
read_lock_irqsave(&fm->lock, flags);
- arg->class = fence->class;
+ arg->fence_class = fence->fence_class;
arg->type = fence->type;
arg->signaled = fence->signaled;
read_unlock_irqrestore(&fm->lock, flags);
@@ -700,7 +700,7 @@ int drm_fence_signaled_ioctl(struct drm_
return -EINVAL;
read_lock_irqsave(&fm->lock, flags);
- arg->class = fence->class;
+ arg->fence_class = fence->fence_class;
arg->type = fence->type;
arg->signaled = fence->signaled;
read_unlock_irqrestore(&fm->lock, flags);
@@ -729,7 +729,7 @@ int drm_fence_flush_ioctl(struct drm_dev
ret = drm_fence_object_flush(fence, arg->type);
read_lock_irqsave(&fm->lock, flags);
- arg->class = fence->class;
+ arg->fence_class = fence->fence_class;
arg->type = fence->type;
arg->signaled = fence->signaled;
read_unlock_irqrestore(&fm->lock, flags);
@@ -761,7 +761,7 @@ int drm_fence_wait_ioctl(struct drm_devi
0, arg->type);
read_lock_irqsave(&fm->lock, flags);
- arg->class = fence->class;
+ arg->fence_class = fence->fence_class;
arg->type = fence->type;
arg->signaled = fence->signaled;
read_unlock_irqrestore(&fm->lock, flags);
@@ -789,11 +789,11 @@ int drm_fence_emit_ioctl(struct drm_devi
fence = drm_lookup_fence_object(file_priv, arg->handle);
if (!fence)
return -EINVAL;
- ret = drm_fence_object_emit(fence, arg->flags, arg->class,
+ ret = drm_fence_object_emit(fence, arg->flags, arg->fence_class,
arg->type);
read_lock_irqsave(&fm->lock, flags);
- arg->class = fence->class;
+ arg->fence_class = fence->fence_class;
arg->type = fence->type;
arg->signaled = fence->signaled;
read_unlock_irqrestore(&fm->lock, flags);
@@ -821,8 +821,8 @@ int drm_fence_buffers_ioctl(struct drm_d
return -EINVAL;
}
LOCK_TEST_WITH_RETURN(dev, file_priv);
- ret = drm_fence_buffer_objects(file_priv, NULL, arg->flags,
- NULL, &fence);
+ ret = drm_fence_buffer_objects(file_priv, NULL, arg->fence_class,
+ arg->flags, NULL, &fence);
if (ret)
return ret;
ret = drm_fence_add_user_object(file_priv, fence,
@@ -834,9 +834,10 @@ int drm_fence_buffers_ioctl(struct drm_d
arg->handle = fence->base.hash.key;
read_lock_irqsave(&fm->lock, flags);
- arg->class = fence->class;
+ arg->fence_class = fence->fence_class;
arg->type = fence->type;
arg->signaled = fence->signaled;
+ arg->sequence = fence->sequence;
read_unlock_irqrestore(&fm->lock, flags);
drm_fence_usage_deref_unlocked(&fence);
diff --git a/linux-core/drm_objects.h b/linux-core/drm_objects.h
index 096041d..b2f1ae1 100644
--- a/linux-core/drm_objects.h
+++ b/linux-core/drm_objects.h
@@ -149,7 +149,7 @@ struct drm_fence_object {
*/
struct list_head ring;
- int class;
+ int fence_class;
uint32_t native_type;
uint32_t type;
uint32_t signaled;
@@ -173,7 +173,7 @@ struct drm_fence_class_manager {
struct drm_fence_manager {
int initialized;
rwlock_t lock;
- struct drm_fence_class_manager class[_DRM_FENCE_CLASSES];
+ struct drm_fence_class_manager fence_class[_DRM_FENCE_CLASSES];
uint32_t num_classes;
atomic_t count;
};
@@ -184,18 +184,18 @@ struct drm_fence_driver {
uint32_t flush_diff;
uint32_t sequence_mask;
int lazy_capable;
- int (*has_irq) (struct drm_device * dev, uint32_t class,
+ int (*has_irq) (struct drm_device * dev, uint32_t fence_class,
uint32_t flags);
- int (*emit) (struct drm_device * dev, uint32_t class, uint32_t flags,
+ int (*emit) (struct drm_device * dev, uint32_t fence_class, uint32_t flags,
uint32_t * breadcrumb, uint32_t * native_type);
- void (*poke_flush) (struct drm_device * dev, uint32_t class);
+ void (*poke_flush) (struct drm_device * dev, uint32_t fence_class);
};
-extern void drm_fence_handler(struct drm_device *dev, uint32_t class,
+extern void drm_fence_handler(struct drm_device *dev, uint32_t fence_class,
uint32_t sequence, uint32_t type);
extern void drm_fence_manager_init(struct drm_device *dev);
extern void drm_fence_manager_takedown(struct drm_device *dev);
-extern void drm_fence_flush_old(struct drm_device *dev, uint32_t class,
+extern void drm_fence_flush_old(struct drm_device *dev, uint32_t fence_class,
uint32_t sequence);
extern int drm_fence_object_flush(struct drm_fence_object * fence, uint32_t type);
extern int drm_fence_object_signaled(struct drm_fence_object * fence,
@@ -208,7 +208,7 @@ extern void drm_fence_reference_unlocked
extern int drm_fence_object_wait(struct drm_fence_object * fence,
int lazy, int ignore_signals, uint32_t mask);
extern int drm_fence_object_create(struct drm_device *dev, uint32_t type,
- uint32_t fence_flags, uint32_t class,
+ uint32_t fence_flags, uint32_t fence_class,
struct drm_fence_object ** c_fence);
extern int drm_fence_add_user_object(struct drm_file * priv,
struct drm_fence_object * fence, int shareable);
@@ -474,7 +474,7 @@ extern int drm_mem_reg_is_pci(struct drm
extern void drm_bo_usage_deref_locked(struct drm_buffer_object ** bo);
extern int drm_fence_buffer_objects(struct drm_file * priv,
struct list_head *list,
- uint32_t fence_flags,
+ uint32_t fence_class, uint32_t fence_flags,
struct drm_fence_object * fence,
struct drm_fence_object ** used_fence);
extern void drm_bo_add_to_lru(struct drm_buffer_object * bo);
diff --git a/linux-core/i915_fence.c b/linux-core/i915_fence.c
index 6f0de2c..8983033 100644
--- a/linux-core/i915_fence.c
+++ b/linux-core/i915_fence.c
@@ -42,7 +42,7 @@ static void i915_perform_flush(struct dr
{
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
struct drm_fence_manager *fm = &dev->fm;
- struct drm_fence_class_manager *fc = &fm->class[0];
+ struct drm_fence_class_manager *fc = &fm->fence_class[0];
struct drm_fence_driver *driver = dev->driver->fence_driver;
uint32_t flush_flags = 0;
uint32_t flush_sequence = 0;
diff --git a/linux-core/via_fence.c b/linux-core/via_fence.c
index a6d4ece..8d60afa 100644
--- a/linux-core/via_fence.c
+++ b/linux-core/via_fence.c
@@ -42,7 +42,7 @@
static uint32_t via_perform_flush(struct drm_device *dev, uint32_t class)
{
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
- struct drm_fence_class_manager *fc = &dev->fm.class[class];
+ struct drm_fence_class_manager *fc = &dev->fm.fence_class[class];
uint32_t pending_flush_types = 0;
uint32_t signaled_flush_types = 0;
uint32_t status;
@@ -204,7 +204,7 @@ void via_fence_timer(unsigned long data)
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
struct drm_fence_manager *fm = &dev->fm;
uint32_t pending_flush;
- struct drm_fence_class_manager *fc = &dev->fm.class[0];
+ struct drm_fence_class_manager *fc = &dev->fm.fence_class[0];
if (!dev_priv)
return;
diff --git a/linux-core/xgi_fence.c b/linux-core/xgi_fence.c
index adedf30..22e1dce 100644
--- a/linux-core/xgi_fence.c
+++ b/linux-core/xgi_fence.c
@@ -33,7 +33,7 @@
static uint32_t xgi_do_flush(struct drm_device * dev, uint32_t class)
{
struct xgi_info * info = dev->dev_private;
- struct drm_fence_class_manager * fc = &dev->fm.class[class];
+ struct drm_fence_class_manager * fc = &dev->fm.fence_class[class];
uint32_t pending_flush_types = 0;
uint32_t signaled_flush_types = 0;
|
|
From: <da...@ke...> - 2007-09-29 16:09:36
|
linux-core/Makefile | 2 +-
shared-core/radeon_state.c | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
New commits:
diff-tree f863d23e01bf0b851c2c7addedfaec77ef951a0c (from 215eab6ccfb6d3a22218f996c8215a7dcaf65d01)
Author: chaohong guo <Minskey.Guo@Sun.COM>
Date: Sat Sep 29 18:06:47 2007 +0200
radeon: Commit the ring after each partial texture upload blit.
This makes sure each blit starts as early as possible, which may improve
texture upload performance in some cases.
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c
index ac7f601..e3aadfb 100644
--- a/shared-core/radeon_state.c
+++ b/shared-core/radeon_state.c
@@ -1861,6 +1861,7 @@ static int radeon_cp_dispatch_texture(st
OUT_RING((image->width << 16) | height);
RADEON_WAIT_UNTIL_2D_IDLE();
ADVANCE_RING();
+ COMMIT_RING();
radeon_cp_discard_buffer(dev, buf);
@@ -1878,6 +1879,8 @@ static int radeon_cp_dispatch_texture(st
RADEON_FLUSH_CACHE();
RADEON_WAIT_UNTIL_2D_IDLE();
ADVANCE_RING();
+ COMMIT_RING();
+
return 0;
}
@@ -2401,7 +2404,6 @@ static int radeon_cp_texture(struct drm_
ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image);
- COMMIT_RING();
return ret;
}
diff-tree 215eab6ccfb6d3a22218f996c8215a7dcaf65d01 (from 72134e939eda578bc53746bf43f7096cbeaf9b7b)
Author: Michel Dänzer <mi...@tu...>
Date: Thu Sep 27 08:01:58 2007 +0200
Don't build without any optimization on Linux.
Building without optimization causes the drm module not to link correctly on
ppc.
diff --git a/linux-core/Makefile b/linux-core/Makefile
index f2519ed..6eb5bf5 100644
--- a/linux-core/Makefile
+++ b/linux-core/Makefile
@@ -269,7 +269,7 @@ PAGE_AGP := $(shell cat $(LINUXDIR)/incl
ifneq ($(PAGE_AGP),0)
EXTRA_CFLAGS += -DHAVE_PAGE_AGP
endif
-EXTRA_CFLAGS += -g -O0
+EXTRA_CFLAGS += -g
# Start with all modules turned off.
CONFIG_DRM_GAMMA := n
|
|
From: <ma...@ke...> - 2007-09-29 21:07:36
|
shared-core/nouveau_fifo.c | 16 ++++++++++++++++
shared-core/nv10_graph.c | 14 +++++++++++---
2 files changed, 27 insertions(+), 3 deletions(-)
New commits:
diff-tree f8f31f04574cd6986d7d9ef2215bbb23e0f44b73 (from 097db7a9b0cd0e53fb82dffa57c662f327c19670)
Author: Matthieu Castet <cas...@fr...>
Date: Sat Sep 29 23:06:29 2007 +0200
nouveau : stop the fifo of the channel we are deleting
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c
index 437c84f..f82d130 100644
--- a/shared-core/nouveau_fifo.c
+++ b/shared-core/nouveau_fifo.c
@@ -403,7 +403,19 @@ void nouveau_fifo_free(struct nouveau_ch
/* disable the fifo caches */
NV_WRITE(NV03_PFIFO_CACHES, 0x00000000);
+ NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH)&(~0x1));
+ NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000000);
+ NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000000);
+ /* stop the fifo, otherwise it could be running and
+ * it will crash when removing gpu objects */
+ if (dev_priv->card_type < NV_50) {
+ NV_WRITE(NV03_FIFO_REGS_DMAPUT(chan->id), chan->pushbuf_base);
+ NV_WRITE(NV03_FIFO_REGS_DMAGET(chan->id), chan->pushbuf_base);
+ } else {
+ NV_WRITE(NV50_FIFO_REGS_DMAPUT(chan->id), chan->pushbuf_base);
+ NV_WRITE(NV50_FIFO_REGS_DMAGET(chan->id), chan->pushbuf_base);
+ }
// FIXME XXX needs more code
engine->fifo.destroy_context(chan);
@@ -412,6 +424,10 @@ void nouveau_fifo_free(struct nouveau_ch
engine->graph.destroy_context(chan);
/* reenable the fifo caches */
+ NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH,
+ NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH) | 1);
+ NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000001);
+ NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000001);
NV_WRITE(NV03_PFIFO_CACHES, 0x00000001);
/* Deallocate push buffer */
diff-tree 097db7a9b0cd0e53fb82dffa57c662f327c19670 (from f863d23e01bf0b851c2c7addedfaec77ef951a0c)
Author: Matthieu Castet <cas...@fr...>
Date: Sat Sep 29 23:05:44 2007 +0200
nouveau : nv1x fix strange corruption
that appears when running glxgears and nouveau demo
diff --git a/shared-core/nv10_graph.c b/shared-core/nv10_graph.c
index 311e0e9..c115ba7 100644
--- a/shared-core/nv10_graph.c
+++ b/shared-core/nv10_graph.c
@@ -714,7 +714,7 @@ void nouveau_nv10_context_switch(struct
next = dev_priv->fifos[chid];
if (!next) {
- DRM_DEBUG("Invalid next channel\n");
+ DRM_ERROR("Invalid next channel\n");
return;
}
@@ -722,7 +722,7 @@ void nouveau_nv10_context_switch(struct
last = dev_priv->fifos[chid];
if (!last) {
- DRM_DEBUG("WARNING: Invalid last channel, switch to %x\n",
+ DRM_INFO("WARNING: Invalid last channel, switch to %x\n",
next->id);
} else {
DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n",
@@ -827,6 +827,9 @@ void nv10_graph_destroy_context(struct n
int chid;
chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
+ /* This code seems to corrupt the 3D pipe, but blob seems to do similar things ????
+ */
+#if 0
/* does this avoid a potential context switch while we are written graph
* reg, or we should mask graph interrupt ???
*/
@@ -838,7 +841,12 @@ void nv10_graph_destroy_context(struct n
nv10_graph_create_context(chan);
nv10_graph_load_context(chan);
}
- NV_WRITE(NV04_PGRAPH_FIFO,0x1);
+ NV_WRITE(NV04_PGRAPH_FIFO, 0x1);
+#else
+ if (chid == chan->id) {
+ DRM_INFO("cleanning a channel with graph in current context\n");
+ }
+#endif
}
int nv10_graph_init(struct drm_device *dev) {
|
|
From: <ma...@ke...> - 2007-09-30 13:18:16
|
shared-core/nouveau_drv.h | 3 ++-
shared-core/nv04_graph.c | 27 +++++++++++++++++++--------
shared-core/nv10_graph.c | 35 ++++++++++++++++++++++-------------
3 files changed, 43 insertions(+), 22 deletions(-)
New commits:
diff-tree fb3ed99fb110a540d16923417c33ff581721ba3a (from c76e04828bd5849f526fae5af7deaf1cbc9f4c55)
Author: Matthieu Castet <cas...@fr...>
Date: Sun Sep 30 14:50:22 2007 +0200
nouveau : pgraph_ctx dynamic alloc for nv04, nv10
diff --git a/shared-core/nouveau_drv.h b/shared-core/nouveau_drv.h
index e96c8fa..02a4ee7 100644
--- a/shared-core/nouveau_drv.h
+++ b/shared-core/nouveau_drv.h
@@ -120,8 +120,9 @@ struct nouveau_channel
struct nouveau_gpuobj_ref *ramfc;
/* PGRAPH context */
+ /* XXX may be merge 2 pointers as private data ??? */
struct nouveau_gpuobj_ref *ramin_grctx;
- uint32_t pgraph_ctx [340]; /* XXX dynamic alloc ? */
+ void *pgraph_ctx;
/* NV50 VM */
struct nouveau_gpuobj *vm_pd;
diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c
index b07bcfb..33dd0a8 100644
--- a/shared-core/nv04_graph.c
+++ b/shared-core/nv04_graph.c
@@ -350,9 +350,6 @@ struct graph_state {
int nv04[sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0])];
};
-/* TODO dynamic allocation ??? */
-static struct graph_state graph_state[16];
-
void nouveau_nv04_context_switch(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -421,10 +418,14 @@ void nouveau_nv04_context_switch(struct
}
int nv04_graph_create_context(struct nouveau_channel *chan) {
- struct graph_state* pgraph_ctx = graph_state + chan->id;
+ struct graph_state* pgraph_ctx;
DRM_DEBUG("nv04_graph_context_create %d\n", chan->id);
- memset(pgraph_ctx, 0, sizeof(*pgraph_ctx));
+ chan->pgraph_ctx = pgraph_ctx = drm_calloc(1, sizeof(*pgraph_ctx),
+ DRM_MEM_DRIVER);
+
+ if (pgraph_ctx == NULL)
+ return -ENOMEM;
//dev_priv->fifos[channel].pgraph_ctx_user = channel << 24;
pgraph_ctx->nv04[0] = 0x0001ffff;
@@ -437,13 +438,17 @@ int nv04_graph_create_context(struct nou
void nv04_graph_destroy_context(struct nouveau_channel *chan)
{
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
+
+ drm_free(pgraph_ctx, sizeof(*pgraph_ctx), DRM_MEM_DRIVER);
+ chan->pgraph_ctx = NULL;
}
int nv04_graph_load_context(struct nouveau_channel *chan)
{
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = graph_state + chan->id;
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
int i;
for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
@@ -456,7 +461,7 @@ int nv04_graph_save_context(struct nouve
{
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = graph_state + chan->id;
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
int i;
for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
diff --git a/shared-core/nv10_graph.c b/shared-core/nv10_graph.c
index c115ba7..c6319b8 100644
--- a/shared-core/nv10_graph.c
+++ b/shared-core/nv10_graph.c
@@ -388,17 +388,14 @@ NV10_PGRAPH_DEBUG_4,
struct graph_state {
int nv10[sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0])];
int nv17[sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0])];
+ struct pipe_state pipe_state;
};
-/* TODO dynamic allocation ??? */
-static struct pipe_state pipe_state[NV10_FIFO_NUMBER];
-static struct graph_state graph_state[NV10_FIFO_NUMBER];
-
-
static void nv10_graph_save_pipe(struct nouveau_channel *chan) {
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct pipe_state *fifo_pipe_state = pipe_state + chan->id;
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
+ struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state;
int i;
#define PIPE_SAVE(addr) \
do { \
@@ -424,7 +421,8 @@ static void nv10_graph_save_pipe(struct
static void nv10_graph_load_pipe(struct nouveau_channel *chan) {
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct pipe_state *fifo_pipe_state = pipe_state + chan->id;
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
+ struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state;
int i;
uint32_t xfmode0, xfmode1;
#define PIPE_RESTORE(addr) \
@@ -480,7 +478,8 @@ static void nv10_graph_load_pipe(struct
}
static void nv10_graph_create_pipe(struct nouveau_channel *chan) {
- struct pipe_state *fifo_pipe_state = pipe_state + chan->id;
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
+ struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state;
uint32_t *fifo_pipe_state_addr;
int i;
#define PIPE_INIT(addr) \
@@ -656,7 +655,7 @@ int nv10_graph_load_context(struct nouve
{
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = graph_state + chan->id;
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
int i;
for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++)
@@ -675,7 +674,7 @@ int nv10_graph_save_context(struct nouve
{
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = graph_state + chan->id;
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
int i;
for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++)
@@ -763,11 +762,15 @@ void nouveau_nv10_context_switch(struct
int nv10_graph_create_context(struct nouveau_channel *chan) {
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct graph_state* pgraph_ctx = graph_state + chan->id;
+ struct graph_state* pgraph_ctx;
DRM_DEBUG("nv10_graph_context_create %d\n", chan->id);
- memset(pgraph_ctx, 0, sizeof(*pgraph_ctx));
+ chan->pgraph_ctx = pgraph_ctx = drm_calloc(1, sizeof(*pgraph_ctx),
+ DRM_MEM_DRIVER);
+
+ if (pgraph_ctx == NULL)
+ return -ENOMEM;
/* mmio trace suggest that should be done in ddx with methods/objects */
#if 0
@@ -824,7 +827,12 @@ void nv10_graph_destroy_context(struct n
{
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct graph_state* pgraph_ctx = chan->pgraph_ctx;
int chid;
+
+ drm_free(pgraph_ctx, sizeof(*pgraph_ctx), DRM_MEM_DRIVER);
+ chan->pgraph_ctx = NULL;
+
chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
/* This code seems to corrupt the 3D pipe, but blob seems to do similar things ????
@@ -838,7 +846,8 @@ void nv10_graph_destroy_context(struct n
DRM_INFO("cleanning a channel with graph in current context\n");
nouveau_wait_for_idle(dev);
DRM_INFO("reseting current graph context\n");
- nv10_graph_create_context(chan);
+ /* can't be call here because of dynamic mem alloc */
+ //nv10_graph_create_context(chan);
nv10_graph_load_context(chan);
}
NV_WRITE(NV04_PGRAPH_FIFO, 0x1);
diff-tree c76e04828bd5849f526fae5af7deaf1cbc9f4c55 (from f8f31f04574cd6986d7d9ef2215bbb23e0f44b73)
Author: Matthieu Castet <cas...@fr...>
Date: Sun Sep 30 14:21:47 2007 +0200
nouveau : nv04 don't use chan->pgraph_ctx array
This commit is a first step to dynamic alloc pgraph context on nv04, nv10.
diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c
index 2cf052c..b07bcfb 100644
--- a/shared-core/nv04_graph.c
+++ b/shared-core/nv04_graph.c
@@ -346,6 +346,13 @@ static uint32_t nv04_graph_ctx_regs [] =
};
+struct graph_state {
+ int nv04[sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0])];
+};
+
+/* TODO dynamic allocation ??? */
+static struct graph_state graph_state[16];
+
void nouveau_nv04_context_switch(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -414,12 +421,13 @@ void nouveau_nv04_context_switch(struct
}
int nv04_graph_create_context(struct nouveau_channel *chan) {
+ struct graph_state* pgraph_ctx = graph_state + chan->id;
DRM_DEBUG("nv04_graph_context_create %d\n", chan->id);
- memset(chan->pgraph_ctx, 0, sizeof(chan->pgraph_ctx));
+ memset(pgraph_ctx, 0, sizeof(*pgraph_ctx));
//dev_priv->fifos[channel].pgraph_ctx_user = channel << 24;
- chan->pgraph_ctx[0] = 0x0001ffff;
+ pgraph_ctx->nv04[0] = 0x0001ffff;
/* is it really needed ??? */
//dev_priv->fifos[channel].pgraph_ctx[1] = NV_READ(NV_PGRAPH_DEBUG_4);
//dev_priv->fifos[channel].pgraph_ctx[2] = NV_READ(0x004006b0);
@@ -435,10 +443,11 @@ int nv04_graph_load_context(struct nouve
{
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct graph_state* pgraph_ctx = graph_state + chan->id;
int i;
for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
- NV_WRITE(nv04_graph_ctx_regs[i], chan->pgraph_ctx[i]);
+ NV_WRITE(nv04_graph_ctx_regs[i], pgraph_ctx->nv04[i]);
return 0;
}
@@ -447,10 +456,11 @@ int nv04_graph_save_context(struct nouve
{
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct graph_state* pgraph_ctx = graph_state + chan->id;
int i;
for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++)
- chan->pgraph_ctx[i] = NV_READ(nv04_graph_ctx_regs[i]);
+ pgraph_ctx->nv04[i] = NV_READ(nv04_graph_ctx_regs[i]);
return 0;
}
@@ -467,10 +477,6 @@ int nv04_graph_init(struct drm_device *d
NV_WRITE(NV03_PGRAPH_INTR, 0xFFFFFFFF);
NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
- // check the context is big enough
- if ( sizeof(nv04_graph_ctx_regs)>sizeof(dev_priv->fifos[0]->pgraph_ctx) )
- DRM_ERROR("pgraph_ctx too small\n");
-
NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x000001FF);
NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x1231c000);
NV_WRITE(NV04_PGRAPH_DEBUG_1, 0xf2d91100);
|
|
From: <id...@ke...> - 2007-10-10 22:27:36
|
linux-core/xgi_cmdlist.c | 30 +++++-------------------------
linux-core/xgi_misc.c | 2 +-
linux-core/xgi_pcie.c | 3 +--
3 files changed, 7 insertions(+), 28 deletions(-)
New commits:
diff-tree fc7d4d19d36b6a12ed23d4d9e50826346258299f (from 83da774b192966b8c3f00b531ecfd4ec2b5eceaa)
Author: Ian Romanick <id...@us...>
Date: Wed Oct 10 15:27:07 2007 -0700
Eliminate trailing whitespace from last commit.
diff --git a/linux-core/xgi_cmdlist.c b/linux-core/xgi_cmdlist.c
index 69bf646..d7b23c8 100644
--- a/linux-core/xgi_cmdlist.c
+++ b/linux-core/xgi_cmdlist.c
@@ -303,12 +303,12 @@ void xgi_emit_flush(struct xgi_info * in
*/
void xgi_emit_nop(struct xgi_info * info)
{
- info->cmdring.last_ptr[1] = cpu_to_le32(BEGIN_LINK_ENABLE_MASK
+ info->cmdring.last_ptr[1] = cpu_to_le32(BEGIN_LINK_ENABLE_MASK
| (BEGIN_BEGIN_IDENTIFICATION_MASK & info->next_sequence));
info->cmdring.last_ptr[2] = 0;
info->cmdring.last_ptr[3] = 0;
DRM_WRITEMEMORYBARRIER();
- info->cmdring.last_ptr[0] = cpu_to_le32((get_batch_command(BTYPE_CTRL) << 24)
+ info->cmdring.last_ptr[0] = cpu_to_le32((get_batch_command(BTYPE_CTRL) << 24)
| (BEGIN_VALID_MASK));
triggerHWCommandList(info);
diff-tree 83da774b192966b8c3f00b531ecfd4ec2b5eceaa (from bf126f4925bf1601935e085be2feeb004b474a05)
Author: Ian Romanick <id...@us...>
Date: Wed Oct 10 15:25:30 2007 -0700
Fix command list submission on big-endian.
diff --git a/linux-core/xgi_cmdlist.c b/linux-core/xgi_cmdlist.c
index c25b0e0..69bf646 100644
--- a/linux-core/xgi_cmdlist.c
+++ b/linux-core/xgi_cmdlist.c
@@ -45,7 +45,7 @@ static inline void dwWriteReg(struct drm
DRM_INFO("mmio_map->handle = 0x%p, addr = 0x%x, data = 0x%x\n",
map->handle, addr, data);
#endif
- DRM_WRITE32(map, addr, cpu_to_le32(data));
+ DRM_WRITE32(map, addr, data);
}
@@ -98,25 +98,6 @@ int xgi_submit_cmdlist(struct drm_device
const struct xgi_cmd_info *const pCmdInfo =
(struct xgi_cmd_info *) data;
const unsigned int cmd = get_batch_command(pCmdInfo->type);
-#ifdef __BIG_ENDIAN
- const u32 *const ptr = xgi_find_pcie_virt(info, pCmdInfo->hw_addr);
- unsigned i;
- unsigned j;
-
- xgi_waitfor_pci_idle(info);
- for (j = 4; j < pCmdInfo->size; j += 4) {
- u32 reg = ptr[j];
-
- for (i = 1; i < 4; i++) {
- if ((reg & 1) != 0) {
- const unsigned r = 0x2100 | (reg & 0x0fe);
- DRM_WRITE32(info->mmio_map, r, ptr[j + i]);
- }
-
- reg >>= 8;
- }
- }
-#else
u32 begin[4];
@@ -167,7 +148,6 @@ int xgi_submit_cmdlist(struct drm_device
}
info->cmdring.last_ptr = xgi_find_pcie_virt(info, pCmdInfo->hw_addr);
-#endif
drm_fence_flush_old(info->dev, 0, info->next_sequence);
return 0;
}
@@ -323,13 +303,13 @@ void xgi_emit_flush(struct xgi_info * in
*/
void xgi_emit_nop(struct xgi_info * info)
{
- info->cmdring.last_ptr[1] = BEGIN_LINK_ENABLE_MASK
- | (BEGIN_BEGIN_IDENTIFICATION_MASK & info->next_sequence);
+ info->cmdring.last_ptr[1] = cpu_to_le32(BEGIN_LINK_ENABLE_MASK
+ | (BEGIN_BEGIN_IDENTIFICATION_MASK & info->next_sequence));
info->cmdring.last_ptr[2] = 0;
info->cmdring.last_ptr[3] = 0;
DRM_WRITEMEMORYBARRIER();
- info->cmdring.last_ptr[0] = (get_batch_command(BTYPE_CTRL) << 24)
- | (BEGIN_VALID_MASK);
+ info->cmdring.last_ptr[0] = cpu_to_le32((get_batch_command(BTYPE_CTRL) << 24)
+ | (BEGIN_VALID_MASK));
triggerHWCommandList(info);
diff --git a/linux-core/xgi_misc.c b/linux-core/xgi_misc.c
index f39b3bb..4a4a984 100644
--- a/linux-core/xgi_misc.c
+++ b/linux-core/xgi_misc.c
@@ -326,7 +326,7 @@ void xgi_waitfor_pci_idle(struct xgi_inf
unsigned int same_count = 0;
while (idleCount < 5) {
- const u32 status = le32_to_cpu(DRM_READ32(info->mmio_map, WHOLD_GE_STATUS))
+ const u32 status = DRM_READ32(info->mmio_map, WHOLD_GE_STATUS)
& IDLE_MASK;
if (status == old_status) {
diff --git a/linux-core/xgi_pcie.c b/linux-core/xgi_pcie.c
index 4becf35..a7d3ea2 100644
--- a/linux-core/xgi_pcie.c
+++ b/linux-core/xgi_pcie.c
@@ -40,8 +40,7 @@ void xgi_gart_flush(struct drm_device *d
DRM_WRITE8(info->mmio_map, 0xB00C, temp & ~0x02);
/* Set GART base address to HW */
- DRM_WRITE32(info->mmio_map, 0xB034,
- cpu_to_le32(info->gart_info.bus_addr));
+ DRM_WRITE32(info->mmio_map, 0xB034, info->gart_info.bus_addr);
/* Flush GART table. */
DRM_WRITE8(info->mmio_map, 0xB03F, 0x40);
|
|
From: <ai...@ke...> - 2007-10-12 00:54:53
|
linux-core/i915_buffer.c | 2
shared-core/i915_dma.c | 344 +++++++++++++++++++++++++++++++++++++++++++++++
shared-core/i915_drm.h | 39 +++++
shared-core/i915_drv.h | 10 +
4 files changed, 392 insertions(+), 3 deletions(-)
New commits:
diff-tree 74001c34e5ad768feec8b2fbe9a617bc598a0a4b (from 604f02ff619d87d1372bcb7969c826d981fefc60)
Author: Dave Airlie <ai...@re...>
Date: Fri Oct 12 10:54:38 2007 +1000
i915: add superioctl support to i915
This adds the initial i915 superioctl interface. The interface should be
sufficent even if the implementation may needs fixes/optimisations internally
in the drm wrt caching etc.
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index 3a9ecab..7209a8d 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -147,6 +147,10 @@ static int i915_initialize(struct drm_de
return -EINVAL;
}
+#ifdef I915_HAVE_BUFFER
+ dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
+#endif
+
dev_priv->sarea_priv = (drm_i915_sarea_t *)
((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
@@ -725,6 +729,343 @@ static int i915_cmdbuffer(struct drm_dev
return 0;
}
+#ifdef I915_HAVE_BUFFER
+struct i915_relocatee_info {
+ struct drm_buffer_object *buf;
+ unsigned long offset;
+ u32 *data_page;
+ unsigned page_offset;
+ struct drm_bo_kmap_obj kmap;
+ int is_iomem;
+};
+
+static void i915_dereference_buffers_locked(struct drm_buffer_object **buffers,
+ unsigned num_buffers)
+{
+ while (num_buffers--)
+ drm_bo_usage_deref_locked(&buffers[num_buffers]);
+}
+
+int i915_apply_reloc(struct drm_file *file_priv, int num_buffers,
+ struct drm_buffer_object **buffers,
+ struct i915_relocatee_info *relocatee,
+ uint32_t *reloc)
+{
+ unsigned index;
+ unsigned long new_cmd_offset;
+ u32 val;
+ int ret;
+
+ if (reloc[2] >= num_buffers) {
+ DRM_ERROR("Illegal relocation buffer %08X\n", reloc[2]);
+ return -EINVAL;
+ }
+
+ new_cmd_offset = reloc[0];
+ if (!relocatee->data_page ||
+ !drm_bo_same_page(relocatee->offset, new_cmd_offset)) {
+ drm_bo_kunmap(&relocatee->kmap);
+ relocatee->offset = new_cmd_offset;
+ ret = drm_bo_kmap(relocatee->buf, new_cmd_offset >> PAGE_SHIFT,
+ 1, &relocatee->kmap);
+ if (ret) {
+ DRM_ERROR("Could not map command buffer to apply relocs\n %08lx", new_cmd_offset);
+ return ret;
+ }
+
+ relocatee->data_page = drm_bmo_virtual(&relocatee->kmap,
+ &relocatee->is_iomem);
+ relocatee->page_offset = (relocatee->offset & PAGE_MASK);
+ }
+
+ val = buffers[reloc[2]]->offset;
+ index = (reloc[0] - relocatee->page_offset) >> 2;
+
+ /* add in validate */
+ val = val + reloc[1];
+
+ relocatee->data_page[index] = val;
+ return 0;
+}
+
+int i915_process_relocs(struct drm_file *file_priv,
+ uint32_t buf_handle,
+ uint32_t *reloc_buf_handle,
+ struct i915_relocatee_info *relocatee,
+ struct drm_buffer_object **buffers,
+ uint32_t num_buffers)
+{
+ struct drm_device *dev = file_priv->head->dev;
+ struct drm_buffer_object *reloc_list_object;
+ uint32_t cur_handle = *reloc_buf_handle;
+ uint32_t *reloc_page;
+ int ret, reloc_is_iomem, reloc_stride;
+ uint32_t num_relocs, reloc_offset, reloc_end, reloc_page_offset, next_offset, cur_offset;
+ struct drm_bo_kmap_obj reloc_kmap;
+
+ memset(&reloc_kmap, 0, sizeof(reloc_kmap));
+
+ reloc_list_object = drm_lookup_buffer_object(file_priv, cur_handle, 1);
+ if (!reloc_list_object)
+ return -EINVAL;
+
+ ret = drm_bo_kmap(reloc_list_object, 0, 1, &reloc_kmap);
+ if (ret) {
+ DRM_ERROR("Could not map relocation buffer.\n");
+ goto out;
+ }
+
+ reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
+ num_relocs = reloc_page[0] & 0xffff;
+
+ if ((reloc_page[0] >> 16) & 0xffff) {
+ DRM_ERROR("Unsupported relocation type requested\n");
+ goto out;
+ }
+
+ /* get next relocate buffer handle */
+ *reloc_buf_handle = reloc_page[1];
+ reloc_stride = I915_RELOC0_STRIDE * sizeof(uint32_t); /* may be different for other types of relocs */
+
+ DRM_DEBUG("num relocs is %d, next is %08X\n", num_relocs, reloc_page[1]);
+
+ reloc_page_offset = 0;
+ reloc_offset = I915_RELOC_HEADER * sizeof(uint32_t);
+ reloc_end = reloc_offset + (num_relocs * reloc_stride);
+
+ do {
+ next_offset = drm_bo_offset_end(reloc_offset, reloc_end);
+
+ do {
+ cur_offset = ((reloc_offset + reloc_page_offset) & ~PAGE_MASK) / sizeof(uint32_t);
+ ret = i915_apply_reloc(file_priv, num_buffers,
+ buffers, relocatee, &reloc_page[cur_offset]);
+ if (ret)
+ goto out;
+
+ reloc_offset += reloc_stride;
+ } while (reloc_offset < next_offset);
+
+ drm_bo_kunmap(&reloc_kmap);
+
+ reloc_offset = next_offset;
+ if (reloc_offset != reloc_end) {
+ ret = drm_bo_kmap(reloc_list_object, reloc_offset >> PAGE_SHIFT, 1, &reloc_kmap);
+ if (ret) {
+ DRM_ERROR("Could not map relocation buffer.\n");
+ goto out;
+ }
+
+ reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
+ reloc_page_offset = reloc_offset & ~PAGE_MASK;
+ }
+
+ } while (reloc_offset != reloc_end);
+out:
+ drm_bo_kunmap(&reloc_kmap);
+
+ mutex_lock(&dev->struct_mutex);
+ drm_bo_usage_deref_locked(&reloc_list_object);
+ mutex_unlock(&dev->struct_mutex);
+
+ return ret;
+}
+
+/*
+ * Validate, add fence and relocate a block of bos from a userspace list
+ */
+int i915_validate_buffer_list(struct drm_file *file_priv,
+ unsigned int fence_class, uint64_t data,
+ struct drm_buffer_object **buffers,
+ uint32_t *num_buffers)
+{
+ struct drm_i915_op_arg arg;
+ struct drm_bo_op_req *req = &arg.d.req;
+ struct drm_bo_arg_rep rep;
+ unsigned long next = 0;
+ int ret = 0;
+ unsigned buf_count = 0;
+ struct drm_device *dev = file_priv->head->dev;
+ uint32_t buf_reloc_handle, buf_handle;
+ struct i915_relocatee_info relocatee;
+
+ do {
+ if (buf_count >= *num_buffers) {
+ DRM_ERROR("Buffer count exceeded %d\n.", *num_buffers);
+ ret = -EINVAL;
+ goto out_err;
+ }
+
+ buffers[buf_count] = NULL;
+
+ if (copy_from_user(&arg, (void __user *)(unsigned)data, sizeof(arg))) {
+ ret = -EFAULT;
+ goto out_err;
+ }
+
+ if (arg.handled) {
+ data = arg.next;
+ buffers[buf_count] = drm_lookup_buffer_object(file_priv, req->arg_handle, 1);
+ buf_count++;
+ continue;
+ }
+
+ rep.ret = 0;
+ if (req->op != drm_bo_validate) {
+ DRM_ERROR
+ ("Buffer object operation wasn't \"validate\".\n");
+ rep.ret = -EINVAL;
+ goto out_err;
+ }
+
+ buf_handle = req->bo_req.handle;
+ buf_reloc_handle = arg.reloc_handle;
+
+ rep.ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
+ req->bo_req.fence_class,
+ req->bo_req.flags,
+ req->bo_req.mask,
+ req->bo_req.hint,
+ &rep.bo_info,
+ &buffers[buf_count]);
+
+ if (rep.ret) {
+ DRM_ERROR("error on handle validate %d\n", rep.ret);
+ goto out_err;
+ }
+
+
+ next = arg.next;
+ arg.handled = 1;
+ arg.d.rep = rep;
+
+ if (copy_to_user((void __user *)(unsigned)data, &arg, sizeof(arg)))
+ return -EFAULT;
+
+ data = next;
+ buf_count++;
+
+ if (buf_reloc_handle) {
+ memset(&relocatee, 0, sizeof(relocatee));
+
+ relocatee.buf = drm_lookup_buffer_object(file_priv, buf_handle, 1);
+ if (!relocatee.buf) {
+ DRM_DEBUG("relocatee buffer invalid %08x\n", buf_handle);
+ ret = -EINVAL;
+ goto out_err;
+ }
+
+ while (buf_reloc_handle) {
+ ret = i915_process_relocs(file_priv, buf_handle, &buf_reloc_handle, &relocatee, buffers, buf_count);
+ if (ret) {
+ DRM_ERROR("process relocs failed\n");
+ break;
+ }
+ }
+
+ drm_bo_kunmap(&relocatee.kmap);
+ mutex_lock(&dev->struct_mutex);
+ drm_bo_usage_deref_locked(&relocatee.buf);
+ mutex_unlock(&dev->struct_mutex);
+
+ if (ret)
+ goto out_err;
+
+ }
+ } while (next != 0);
+ *num_buffers = buf_count;
+ return 0;
+out_err:
+ mutex_lock(&dev->struct_mutex);
+ i915_dereference_buffers_locked(buffers, buf_count);
+ mutex_unlock(&dev->struct_mutex);
+ *num_buffers = 0;
+ return (ret) ? ret : rep.ret;
+}
+
+static int i915_execbuffer(struct drm_device *dev, void *data,
+ struct drm_file *file_priv)
+{
+ drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+ drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
+ dev_priv->sarea_priv;
+ struct drm_i915_execbuffer *exec_buf = data;
+ struct _drm_i915_batchbuffer *batch = &exec_buf->batch;
+ struct drm_fence_arg *fence_arg = &exec_buf->fence_arg;
+ int num_buffers;
+ int ret;
+ struct drm_buffer_object **buffers;
+ struct drm_fence_object *fence;
+
+ if (!dev_priv->allow_batchbuffer) {
+ DRM_ERROR("Batchbuffer ioctl disabled\n");
+ return -EINVAL;
+ }
+
+
+ LOCK_TEST_WITH_RETURN(dev, file_priv);
+
+ if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
+ batch->num_cliprects *
+ sizeof(struct drm_clip_rect)))
+ return -EFAULT;
+
+ if (exec_buf->num_buffers > dev_priv->max_validate_buffers)
+ return -EINVAL;
+
+ num_buffers = exec_buf->num_buffers;
+
+ buffers = drm_calloc(num_buffers, sizeof(struct drm_buffer_object *), DRM_MEM_DRIVER);
+ if (!buffers)
+ return -ENOMEM;
+
+ /* validate buffer list + fixup relocations */
+ ret = i915_validate_buffer_list(file_priv, 0, exec_buf->ops_list,
+ buffers, &num_buffers);
+ if (ret)
+ goto out_free;
+
+ /* submit buffer */
+ batch->start = buffers[num_buffers-1]->offset;
+
+ DRM_DEBUG("i915 exec batchbuffer, start %x used %d cliprects %d\n",
+ batch->start, batch->used, batch->num_cliprects);
+
+ ret = i915_dispatch_batchbuffer(dev, batch);
+ if (ret)
+ goto out_err0;
+
+ sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
+
+ /* fence */
+ ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
+ if (ret)
+ goto out_err0;
+
+ if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
+ ret = drm_fence_add_user_object(file_priv, fence, fence_arg->flags & DRM_FENCE_FLAG_SHAREABLE);
+ if (!ret) {
+ fence_arg->handle = fence->base.hash.key;
+ fence_arg->fence_class = fence->fence_class;
+ fence_arg->type = fence->type;
+ fence_arg->signaled = fence->signaled;
+ }
+ }
+ drm_fence_usage_deref_unlocked(&fence);
+out_err0:
+
+ /* handle errors */
+ mutex_lock(&dev->struct_mutex);
+ i915_dereference_buffers_locked(buffers, num_buffers);
+ mutex_unlock(&dev->struct_mutex);
+
+out_free:
+ drm_free(buffers, (exec_buf->num_buffers * sizeof(struct drm_buffer_object *)), DRM_MEM_DRIVER);
+
+ return ret;
+}
+#endif
+
static int i915_do_cleanup_pageflip(struct drm_device * dev)
{
drm_i915_private_t *dev_priv = dev->dev_private;
@@ -977,6 +1318,9 @@ struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH),
DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH),
+#ifdef I915_HAVE_BUFFER
+ DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH),
+#endif
};
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/shared-core/i915_drm.h b/shared-core/i915_drm.h
index 9976804..a6c3cf3 100644
--- a/shared-core/i915_drm.h
+++ b/shared-core/i915_drm.h
@@ -160,6 +160,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_VBLANK_SWAP 0x0f
#define DRM_I915_MMIO 0x10
#define DRM_I915_HWS_ADDR 0x11
+#define DRM_I915_EXECBUFFER 0x12
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -177,7 +178,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
-
+#define DRM_IOCTL_I915_EXECBUFFER DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_EXECBUFFER, struct drm_i915_execbuffer)
/* Asynchronous page flipping:
*/
@@ -325,4 +326,40 @@ typedef struct drm_i915_hws_addr {
uint64_t addr;
} drm_i915_hws_addr_t;
+/*
+ * Relocation header is 4 uint32_ts
+ * 0 - (16-bit relocation type << 16)| 16 bit reloc count
+ * 1 - buffer handle for another list of relocs
+ * 2-3 - spare.
+ */
+#define I915_RELOC_HEADER 4
+
+/*
+ * type 0 relocation has 4-uint32_t stride
+ * 0 - offset into buffer
+ * 1 - delta to add in
+ * 2 - index into buffer list
+ * 3 - reserved (for optimisations later).
+ */
+#define I915_RELOC_TYPE_0 0
+#define I915_RELOC0_STRIDE 4
+
+struct drm_i915_op_arg {
+ uint64_t next;
+ uint32_t reloc_handle;
+ int handled;
+ union {
+ struct drm_bo_op_req req;
+ struct drm_bo_arg_rep rep;
+ } d;
+
+};
+
+struct drm_i915_execbuffer {
+ uint64_t ops_list;
+ uint32_t num_buffers;
+ struct _drm_i915_batchbuffer batch;
+ struct drm_fence_arg fence_arg;
+};
+
#endif /* _I915_DRM_H_ */
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index 3b26040..e8f1879 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -56,15 +56,20 @@
* 1.8: New ioctl for ARB_Occlusion_Query
* 1.9: Usable page flipping and triple buffering
* 1.10: Plane/pipe disentangling
+ * 1.11: TTM superioctl
*/
#define DRIVER_MAJOR 1
#if defined(I915_HAVE_FENCE) && defined(I915_HAVE_BUFFER)
-#define DRIVER_MINOR 10
+#define DRIVER_MINOR 11
#else
#define DRIVER_MINOR 6
#endif
#define DRIVER_PATCHLEVEL 0
+#ifdef I915_HAVE_BUFFER
+#define I915_MAX_VALIDATE_BUFFERS 4096
+#endif
+
typedef struct _drm_i915_ring_buffer {
int tail_mask;
unsigned long Start;
@@ -133,10 +138,13 @@ typedef struct drm_i915_private {
#endif
#ifdef I915_HAVE_BUFFER
void *agp_iomap;
+ unsigned int max_validate_buffers;
#endif
+
DRM_SPINTYPE swaps_lock;
drm_i915_vbl_swap_t vbl_swaps;
unsigned int swaps_pending;
+
} drm_i915_private_t;
enum intel_chip_family {
diff-tree 604f02ff619d87d1372bcb7969c826d981fefc60 (from f0fd53f86b30e230f3f34b49b54392d20f053a89)
Author: Dave Airlie <ai...@re...>
Date: Fri Oct 12 09:46:11 2007 +1000
i915: check mask instead of flags for buffer fence types
diff --git a/linux-core/i915_buffer.c b/linux-core/i915_buffer.c
index 75763e7..f3ba7ce 100644
--- a/linux-core/i915_buffer.c
+++ b/linux-core/i915_buffer.c
@@ -42,7 +42,7 @@ int i915_fence_types(struct drm_buffer_o
uint32_t * fclass,
uint32_t * type)
{
- if (bo->mem.flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
+ if (bo->mem.mask & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
*type = 3;
else
*type = 1;
|
|
From: <jk...@ke...> - 2007-10-14 14:54:37
|
shared-core/nouveau_mem.c | 2 +-
shared-core/nouveau_notifier.c | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
New commits:
commit 837e364353b3137ce87b5cce9c06f05a3d603201
Author: Jeremy Kolb <jk...@br...>
Date: Sun Oct 14 10:56:31 2007 -0400
nouveau: fix warning.
diff --git a/shared-core/nouveau_notifier.c b/shared-core/nouveau_notifier.c
index c361bc6..31e2b24 100644
--- a/shared-core/nouveau_notifier.c
+++ b/shared-core/nouveau_notifier.c
@@ -33,7 +33,6 @@ int
nouveau_notifier_init_channel(struct nouveau_channel *chan)
{
struct drm_device *dev = chan->dev;
- struct drm_nouveau_private *dev_priv = dev->dev_private;
int flags, ret;
flags = (NOUVEAU_MEM_PCI | NOUVEAU_MEM_MAPPED |
commit 811e43f9e27abdf4c8a4b36c7c287e53134fc950
Author: Jeremy Kolb <jk...@br...>
Date: Sun Oct 14 10:56:17 2007 -0400
nouveau: fix warning.
diff --git a/shared-core/nouveau_mem.c b/shared-core/nouveau_mem.c
index dbfba35..e2f0b38 100644
--- a/shared-core/nouveau_mem.c
+++ b/shared-core/nouveau_mem.c
@@ -430,7 +430,7 @@ int nouveau_mem_init(struct drm_device *dev)
sgreq.size = 16 << 20; //16MB of PCI scatter-gather zone
if (drm_sg_alloc(dev, &sgreq)) {
- DRM_ERROR("Unable to allocate %dMB of scatter-gather"
+ DRM_ERROR("Unable to allocate %ldMB of scatter-gather"
" pages for PCI DMA!",sgreq.size>>20);
} else {
if (nouveau_mem_init_heap(&dev_priv->pci_heap, 0,
|
|
From: <an...@ke...> - 2007-10-17 20:26:24
|
tests/auth.c | 4 ++--
tests/lock.c | 9 +++++----
2 files changed, 7 insertions(+), 6 deletions(-)
New commits:
commit 2c5c18fbd394f419a9cf650720a1187440c643cd
Author: Robert Noland <rn...@2h...>
Date: Wed Oct 17 13:25:31 2007 -0700
Bug #12838: Fix lock test client vs. server master race and misplaced closes.
diff --git a/tests/lock.c b/tests/lock.c
index 3f62755..86caa28 100644
--- a/tests/lock.c
+++ b/tests/lock.c
@@ -87,8 +87,6 @@ client_auth(int drmfd)
struct drm_auth auth;
int ret;
- wait_event(0, SERVER_READY);
-
/* Get a client magic number and pass it to the master for auth. */
ret = ioctl(drmfd, DRM_IOCTL_GET_MAGIC, &auth);
if (ret == -1)
@@ -172,8 +170,6 @@ static void test_open_close_locked(drmfd)
ret = drmUnlock(drmfd, lock1);
if (ret != 0)
errx(1, "lock lost during open/close by same pid");
-
- close(drmfd);
}
static void client()
@@ -181,6 +177,8 @@ static void client()
int drmfd, ret;
unsigned int time;
+ wait_event(0, SERVER_READY);
+
/* XXX: Should make sure we open the same DRM as the master */
drmfd = drm_open_any();
@@ -201,6 +199,7 @@ static void client()
send_event(0, CLIENT_LOCKED);
ret = write(commfd[0], &time, sizeof(time));
+ close(drmfd);
exit(0);
}
@@ -238,6 +237,8 @@ static void server()
if (client_time < unlock_time)
errx(1, "Client took lock before server released it");
+
+ close(drmfd);
}
int main(int argc, char **argv)
commit e7523d337997018a86530266a8f3f88dd061c138
Author: Robert Noland <rn...@2h...>
Date: Wed Oct 17 13:20:46 2007 -0700
Fix a race in the auth test where client prevents server from being master.
diff --git a/tests/auth.c b/tests/auth.c
index 4160d1d..9b6fca9 100644
--- a/tests/auth.c
+++ b/tests/auth.c
@@ -69,10 +69,10 @@ static void client()
int drmfd, ret;
/* XXX: Should make sure we open the same DRM as the master */
- drmfd = drm_open_any();
-
wait_event(0, SERVER_READY);
+ drmfd = drm_open_any();
+
/* Get a client magic number and pass it to the master for auth. */
auth.magic = 0; /* Quiet valgrind */
ret = ioctl(drmfd, DRM_IOCTL_GET_MAGIC, &auth);
|
|
From: <ai...@ke...> - 2007-10-25 06:53:57
|
shared-core/i915_dma.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
New commits:
commit a70fe82baf0ca2be98e02680cff489f90b0ea3de
Author: Dave Airlie <airlied@optimus.(none)>
Date: Thu Oct 25 16:53:18 2007 +1000
i915: relocate buffers before validation add memory barrier between two
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index acbb41d..1e15e7c 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -964,6 +964,13 @@ int i915_validate_buffer_list(struct drm_file *file_priv,
buf_handle = req->bo_req.handle;
buf_reloc_handle = arg.reloc_handle;
+ if (buf_reloc_handle) {
+ ret = i915_exec_reloc(file_priv, buf_handle, buf_reloc_handle, buffers, buf_count);
+ if (ret)
+ goto out_err;
+ DRM_MEMORYBARRIER();
+ }
+
rep.ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
req->bo_req.fence_class,
req->bo_req.flags,
@@ -988,11 +995,6 @@ int i915_validate_buffer_list(struct drm_file *file_priv,
data = next;
buf_count++;
- if (buf_reloc_handle) {
- ret = i915_exec_reloc(file_priv, buf_handle, buf_reloc_handle, buffers, buf_count);
- if (ret)
- goto out_err;
- }
} while (next != 0);
*num_buffers = buf_count;
return 0;
commit c5f158abbe97492f56eb60ac54679945e9d6ddae
Author: Dave Airlie <airlied@optimus.(none)>
Date: Thu Oct 25 16:52:33 2007 +1000
i915: remove relocatee kernel mapping sooner stops mutex taking during sleep
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index eb8c915..acbb41d 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -864,6 +864,9 @@ int i915_process_relocs(struct drm_file *file_priv,
} while (reloc_offset != reloc_end);
out:
+ drm_bo_kunmap(&relocatee->kmap);
+ relocatee->data_page = NULL;
+
drm_bo_kunmap(&reloc_kmap);
mutex_lock(&dev->struct_mutex);
@@ -901,7 +904,6 @@ static int i915_exec_reloc(struct drm_file *file_priv, drm_handle_t buf_handle,
}
}
- drm_bo_kunmap(&relocatee.kmap);
mutex_lock(&dev->struct_mutex);
drm_bo_usage_deref_locked(&relocatee.buf);
mutex_unlock(&dev->struct_mutex);
|
|
From: <th...@ke...> - 2007-10-26 08:37:27
|
libdrm/xf86drm.c | 4 ++--
libdrm/xf86mm.h | 6 ++----
linux-core/drm_bo.c | 12 ++++++------
linux-core/drm_bo_move.c | 12 ++++++------
linux-core/drm_objects.h | 3 ++-
5 files changed, 18 insertions(+), 19 deletions(-)
New commits:
commit a4c87d3796cac374d25e01b26bdbb9028ce03107
Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
Date: Fri Oct 26 10:31:14 2007 +0200
Minor libdrm fixes.
diff --git a/libdrm/xf86drm.c b/libdrm/xf86drm.c
index 2f9d5c8..7001a0e 100644
--- a/libdrm/xf86drm.c
+++ b/libdrm/xf86drm.c
@@ -2865,7 +2865,7 @@ int drmBOVersion(int fd, unsigned int *major,
memset(&arg, 0, sizeof(arg));
ret = ioctl(fd, DRM_IOCTL_BO_VERSION, &arg);
if (ret)
- return ret;
+ return -errno;
if (major)
*major = arg.major;
@@ -2874,7 +2874,7 @@ int drmBOVersion(int fd, unsigned int *major,
if (patchlevel)
*patchlevel = arg.patchlevel;
- return (ret) ? -errno : 0;
+ return 0;
}
diff --git a/libdrm/xf86mm.h b/libdrm/xf86mm.h
index 49ae2c0..d3df849 100644
--- a/libdrm/xf86mm.h
+++ b/libdrm/xf86mm.h
@@ -29,6 +29,7 @@
#ifndef _XF86MM_H_
#define _XF86MM_H_
#include <stddef.h>
+#include <stdint.h>
#include "drm.h"
/*
@@ -37,7 +38,7 @@
* be protected using an external mutex.
*
* Note: Don't protect the following functions, as it may lead to deadlocks:
- * drmBOUnmap(), drmFenceBuffers().
+ * drmBOUnmap().
* The kernel is synchronizing and refcounting buffer maps.
* User space only needs to refcount object usage within the same application.
*/
@@ -156,9 +157,6 @@ extern int drmBOUnreference(int fd, drmBO *buf);
extern int drmBOMap(int fd, drmBO *buf, unsigned mapFlags, unsigned mapHint,
void **address);
extern int drmBOUnmap(int fd, drmBO *buf);
-extern int drmBOValidate(int fd, drmBO *buf, uint32_t fence_class, uint64_t flags,
- uint64_t mask, unsigned hint);
-
extern int drmBOFence(int fd, drmBO *buf, unsigned flags, unsigned fenceHandle);
extern int drmBOInfo(int fd, drmBO *buf);
extern int drmBOBusy(int fd, drmBO *buf, int *busy);
commit 1681189e11b5a00ae72a55de932146ea37f7afd9
Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
Date: Fri Oct 26 10:25:57 2007 +0200
Buffer flags and masks are 64-bit.
don't mask off the high dword.
Signed-off-by: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
diff --git a/linux-core/drm_bo.c b/linux-core/drm_bo.c
index 8d1e2f5..16203c7 100644
--- a/linux-core/drm_bo.c
+++ b/linux-core/drm_bo.c
@@ -54,9 +54,9 @@ static int drm_bo_setup_vm_locked(struct drm_buffer_object * bo);
static void drm_bo_takedown_vm_locked(struct drm_buffer_object * bo);
static void drm_bo_unmap_virtual(struct drm_buffer_object * bo);
-static inline uint32_t drm_bo_type_flags(unsigned type)
+static inline uint64_t drm_bo_type_flags(unsigned type)
{
- return (1 << (24 + type));
+ return (1ULL << (24 + type));
}
/*
@@ -785,10 +785,10 @@ static int drm_bo_mem_force_space(struct drm_device * dev,
static int drm_bo_mt_compatible(struct drm_mem_type_manager * man,
uint32_t mem_type,
- uint32_t mask, uint32_t * res_mask)
+ uint64_t mask, uint32_t * res_mask)
{
- uint32_t cur_flags = drm_bo_type_flags(mem_type);
- uint32_t flag_diff;
+ uint64_t cur_flags = drm_bo_type_flags(mem_type);
+ uint64_t flag_diff;
if (man->flags & _DRM_FLAG_MEMTYPE_CACHED)
cur_flags |= DRM_BO_FLAG_CACHED;
@@ -1271,7 +1271,7 @@ static void drm_buffer_user_object_unmap(struct drm_file *file_priv,
* Note that new_mem_flags are NOT transferred to the bo->mem.mask.
*/
-int drm_bo_move_buffer(struct drm_buffer_object * bo, uint32_t new_mem_flags,
+int drm_bo_move_buffer(struct drm_buffer_object * bo, uint64_t new_mem_flags,
int no_wait, int move_unfenced)
{
struct drm_device *dev = bo->dev;
diff --git a/linux-core/drm_bo_move.c b/linux-core/drm_bo_move.c
index 2a35d45..7c86c4a 100644
--- a/linux-core/drm_bo_move.c
+++ b/linux-core/drm_bo_move.c
@@ -53,8 +53,8 @@ int drm_bo_move_ttm(struct drm_buffer_object * bo,
{
struct drm_ttm *ttm = bo->ttm;
struct drm_bo_mem_reg *old_mem = &bo->mem;
- uint32_t save_flags = old_mem->flags;
- uint32_t save_mask = old_mem->mask;
+ uint64_t save_flags = old_mem->flags;
+ uint64_t save_mask = old_mem->mask;
int ret;
if (old_mem->mem_type == DRM_BO_MEM_TT) {
@@ -210,8 +210,8 @@ int drm_bo_move_memcpy(struct drm_buffer_object * bo,
void *old_iomap;
void *new_iomap;
int ret;
- uint32_t save_flags = old_mem->flags;
- uint32_t save_mask = old_mem->mask;
+ uint64_t save_flags = old_mem->flags;
+ uint64_t save_mask = old_mem->mask;
unsigned long i;
unsigned long page;
unsigned long add = 0;
@@ -333,8 +333,8 @@ int drm_bo_move_accel_cleanup(struct drm_buffer_object * bo,
struct drm_mem_type_manager *man = &dev->bm.man[new_mem->mem_type];
struct drm_bo_mem_reg *old_mem = &bo->mem;
int ret;
- uint32_t save_flags = old_mem->flags;
- uint32_t save_mask = old_mem->mask;
+ uint64_t save_flags = old_mem->flags;
+ uint64_t save_mask = old_mem->mask;
struct drm_buffer_object *old_obj;
if (bo->fence)
diff --git a/linux-core/drm_objects.h b/linux-core/drm_objects.h
index 702ece5..8b14ac6 100644
--- a/linux-core/drm_objects.h
+++ b/linux-core/drm_objects.h
@@ -511,7 +511,8 @@ extern int drm_bo_wait(struct drm_buffer_object * bo, int lazy, int ignore_signa
int no_wait);
extern int drm_bo_mem_space(struct drm_buffer_object * bo,
struct drm_bo_mem_reg * mem, int no_wait);
-extern int drm_bo_move_buffer(struct drm_buffer_object * bo, uint32_t new_mem_flags,
+extern int drm_bo_move_buffer(struct drm_buffer_object * bo,
+ uint64_t new_mem_flags,
int no_wait, int move_unfenced);
extern int drm_bo_clean_mm(struct drm_device * dev, unsigned mem_type);
extern int drm_bo_init_mm(struct drm_device * dev, unsigned type,
|
|
From: <jb...@ke...> - 2007-10-26 23:10:21
|
linux-core/drmP.h | 10
linux-core/drm_drv.c | 4
linux-core/drm_stub.c | 7
linux-core/drm_sysfs.c | 151 +++++++----
linux-core/i915_drv.c | 455 +++++++++++++++++++++++++++++++++
shared-core/i915_dma.c | 112 ++++----
shared-core/i915_drv.h | 663 +++++++++++++++++++++++++++++++++++++++++++++++++
7 files changed, 1289 insertions(+), 113 deletions(-)
New commits:
commit 1e2a2bababf3fbaa0a665983856761c2284dba30
Author: Jesse Barnes <jes...@in...>
Date: Fri Oct 26 16:10:02 2007 -0700
i915: suspend/resume support
Add suspend/resume support to the i915 driver. Moves some of the
initialization into the driver load routine, and fixes up places where we
assumed no dev_private existed in some of the cleanup paths. This allows
us to suspend/resume properly even if X isn't running.
diff --git a/linux-core/i915_drv.c b/linux-core/i915_drv.c
index e337e1d..f34d218 100644
--- a/linux-core/i915_drv.c
+++ b/linux-core/i915_drv.c
@@ -69,6 +69,458 @@ static struct drm_bo_driver i915_bo_driver = {
};
#endif
+enum pipe {
+ PIPE_A = 0,
+ PIPE_B,
+};
+
+static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ if (pipe == PIPE_A)
+ return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE);
+ else
+ return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE);
+}
+
+static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ unsigned long reg = (pipe == PIPE_A ? PALETTE_A : PALETTE_B);
+ u32 *array;
+ int i;
+
+ if (!i915_pipe_enabled(dev, pipe))
+ return;
+
+ if (pipe == PIPE_A)
+ array = dev_priv->save_palette_a;
+ else
+ array = dev_priv->save_palette_b;
+
+ for(i = 0; i < 256; i++)
+ array[i] = I915_READ(reg + (i << 2));
+}
+
+static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ unsigned long reg = (pipe == PIPE_A ? PALETTE_A : PALETTE_B);
+ u32 *array;
+ int i;
+
+ if (!i915_pipe_enabled(dev, pipe))
+ return;
+
+ if (pipe == PIPE_A)
+ array = dev_priv->save_palette_a;
+ else
+ array = dev_priv->save_palette_b;
+
+ for(i = 0; i < 256; i++)
+ I915_WRITE(reg + (i << 2), array[i]);
+}
+
+static u8 i915_read_indexed(u16 index_port, u16 data_port, u8 reg)
+{
+ outb(reg, index_port);
+ return inb(data_port);
+}
+
+static u8 i915_read_ar(u16 st01, u8 reg, u16 palette_enable)
+{
+ inb(st01);
+ outb(palette_enable | reg, VGA_AR_INDEX);
+ return inb(VGA_AR_DATA_READ);
+}
+
+static void i915_write_ar(u8 st01, u8 reg, u8 val, u16 palette_enable)
+{
+ inb(st01);
+ outb(palette_enable | reg, VGA_AR_INDEX);
+ outb(val, VGA_AR_DATA_WRITE);
+}
+
+static void i915_write_indexed(u16 index_port, u16 data_port, u8 reg, u8 val)
+{
+ outb(reg, index_port);
+ outb(val, data_port);
+}
+
+static void i915_save_vga(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int i;
+ u16 cr_index, cr_data, st01;
+
+ /* VGA color palette registers */
+ dev_priv->saveDACMASK = inb(VGA_DACMASK);
+ /* DACCRX automatically increments during read */
+ outb(0, VGA_DACRX);
+ /* Read 3 bytes of color data from each index */
+ for (i = 0; i < 256 * 3; i++)
+ dev_priv->saveDACDATA[i] = inb(VGA_DACDATA);
+
+ /* MSR bits */
+ dev_priv->saveMSR = inb(VGA_MSR_READ);
+ if (dev_priv->saveMSR & VGA_MSR_CGA_MODE) {
+ cr_index = VGA_CR_INDEX_CGA;
+ cr_data = VGA_CR_DATA_CGA;
+ st01 = VGA_ST01_CGA;
+ } else {
+ cr_index = VGA_CR_INDEX_MDA;
+ cr_data = VGA_CR_DATA_MDA;
+ st01 = VGA_ST01_MDA;
+ }
+
+ /* CRT controller regs */
+ i915_write_indexed(cr_index, cr_data, 0x11,
+ i915_read_indexed(cr_index, cr_data, 0x11) &
+ (~0x80));
+ for (i = 0; i < 0x24; i++)
+ dev_priv->saveCR[i] =
+ i915_read_indexed(cr_index, cr_data, i);
+ /* Make sure we don't turn off CR group 0 writes */
+ dev_priv->saveCR[0x11] &= ~0x80;
+
+ /* Attribute controller registers */
+ inb(st01);
+ dev_priv->saveAR_INDEX = inb(VGA_AR_INDEX);
+ for (i = 0; i < 20; i++)
+ dev_priv->saveAR[i] = i915_read_ar(st01, i, 0);
+ inb(st01);
+ outb(dev_priv->saveAR_INDEX, VGA_AR_INDEX);
+
+ /* Graphics controller registers */
+ for (i = 0; i < 9; i++)
+ dev_priv->saveGR[i] =
+ i915_read_indexed(VGA_GR_INDEX, VGA_GR_DATA, i);
+
+ dev_priv->saveGR[0x10] =
+ i915_read_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x10);
+ dev_priv->saveGR[0x11] =
+ i915_read_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x11);
+ dev_priv->saveGR[0x18] =
+ i915_read_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x18);
+
+ /* Sequencer registers */
+ for (i = 0; i < 8; i++)
+ dev_priv->saveSR[i] =
+ i915_read_indexed(VGA_SR_INDEX, VGA_SR_DATA, i);
+}
+
+static void i915_restore_vga(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int i;
+ u16 cr_index, cr_data, st01;
+
+ /* MSR bits */
+ outb(dev_priv->saveMSR, VGA_MSR_WRITE);
+ if (dev_priv->saveMSR & VGA_MSR_CGA_MODE) {
+ cr_index = VGA_CR_INDEX_CGA;
+ cr_data = VGA_CR_DATA_CGA;
+ st01 = VGA_ST01_CGA;
+ } else {
+ cr_index = VGA_CR_INDEX_MDA;
+ cr_data = VGA_CR_DATA_MDA;
+ st01 = VGA_ST01_MDA;
+ }
+
+ /* Sequencer registers, don't write SR07 */
+ for (i = 0; i < 7; i++)
+ i915_write_indexed(VGA_SR_INDEX, VGA_SR_DATA, i,
+ dev_priv->saveSR[i]);
+
+ /* CRT controller regs */
+ /* Enable CR group 0 writes */
+ i915_write_indexed(cr_index, cr_data, 0x11, dev_priv->saveCR[0x11]);
+ for (i = 0; i < 0x24; i++)
+ i915_write_indexed(cr_index, cr_data, i, dev_priv->saveCR[i]);
+
+ /* Graphics controller regs */
+ for (i = 0; i < 9; i++)
+ i915_write_indexed(VGA_GR_INDEX, VGA_GR_DATA, i,
+ dev_priv->saveGR[i]);
+
+ i915_write_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x10,
+ dev_priv->saveGR[0x10]);
+ i915_write_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x11,
+ dev_priv->saveGR[0x11]);
+ i915_write_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x18,
+ dev_priv->saveGR[0x18]);
+
+ /* Attribute controller registers */
+ for (i = 0; i < 20; i++)
+ i915_write_ar(st01, i, dev_priv->saveAR[i], 0);
+ inb(st01); /* switch back to index mode */
+ outb(dev_priv->saveAR_INDEX | 0x20, VGA_AR_INDEX);
+
+ /* VGA color palette registers */
+ outb(dev_priv->saveDACMASK, VGA_DACMASK);
+ /* DACCRX automatically increments during read */
+ outb(0, VGA_DACWX);
+ /* Read 3 bytes of color data from each index */
+ for (i = 0; i < 256 * 3; i++)
+ outb(dev_priv->saveDACDATA[i], VGA_DACDATA);
+
+}
+
+static int i915_suspend(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int i;
+
+ if (!dev || !dev_priv) {
+ printk(KERN_ERR "dev: %p, dev_priv: %p\n", dev, dev_priv);
+ printk(KERN_ERR "DRM not initialized, aborting suspend.\n");
+ return -ENODEV;
+ }
+
+ pci_save_state(dev->pdev);
+ pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
+
+ /* Pipe & plane A info */
+ dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
+ dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
+ dev_priv->saveFPA0 = I915_READ(FPA0);
+ dev_priv->saveFPA1 = I915_READ(FPA1);
+ dev_priv->saveDPLL_A = I915_READ(DPLL_A);
+ if (IS_I965G(dev))
+ dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
+ dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
+ dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
+ dev_priv->saveHSYNC_A = I915_READ(HSYNC_A);
+ dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
+ dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
+ dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
+ dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
+
+ dev_priv->saveDSPACNTR = I915_READ(DSPACNTR);
+ dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
+ dev_priv->saveDSPASIZE = I915_READ(DSPASIZE);
+ dev_priv->saveDSPAPOS = I915_READ(DSPAPOS);
+ dev_priv->saveDSPABASE = I915_READ(DSPABASE);
+ if (IS_I965G(dev)) {
+ dev_priv->saveDSPASURF = I915_READ(DSPASURF);
+ dev_priv->saveDSPATILEOFF = I915_READ(DSPATILEOFF);
+ }
+ i915_save_palette(dev, PIPE_A);
+
+ /* Pipe & plane B info */
+ dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
+ dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
+ dev_priv->saveFPB0 = I915_READ(FPB0);
+ dev_priv->saveFPB1 = I915_READ(FPB1);
+ dev_priv->saveDPLL_B = I915_READ(DPLL_B);
+ if (IS_I965G(dev))
+ dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
+ dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
+ dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
+ dev_priv->saveHSYNC_B = I915_READ(HSYNC_B);
+ dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
+ dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
+ dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
+ dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
+
+ dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR);
+ dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
+ dev_priv->saveDSPBSIZE = I915_READ(DSPBSIZE);
+ dev_priv->saveDSPBPOS = I915_READ(DSPBPOS);
+ dev_priv->saveDSPBBASE = I915_READ(DSPBBASE);
+ if (IS_I965GM(dev)) {
+ dev_priv->saveDSPBSURF = I915_READ(DSPBSURF);
+ dev_priv->saveDSPBTILEOFF = I915_READ(DSPBTILEOFF);
+ }
+ i915_save_palette(dev, PIPE_B);
+
+ /* CRT state */
+ dev_priv->saveADPA = I915_READ(ADPA);
+
+ /* LVDS state */
+ dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
+ dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
+ dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
+ if (IS_I965G(dev))
+ dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
+ if (IS_MOBILE(dev) && !IS_I830(dev))
+ dev_priv->saveLVDS = I915_READ(LVDS);
+ if (!IS_I830(dev) && !IS_845G(dev))
+ dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
+ dev_priv->saveLVDSPP_ON = I915_READ(LVDSPP_ON);
+ dev_priv->saveLVDSPP_OFF = I915_READ(LVDSPP_OFF);
+ dev_priv->savePP_CYCLE = I915_READ(PP_CYCLE);
+
+ /* FIXME: save TV & SDVO state */
+
+ /* FBC state */
+ dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
+ dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
+ dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
+ dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+
+ /* VGA state */
+ dev_priv->saveVCLK_DIVISOR_VGA0 = I915_READ(VCLK_DIVISOR_VGA0);
+ dev_priv->saveVCLK_DIVISOR_VGA1 = I915_READ(VCLK_DIVISOR_VGA1);
+ dev_priv->saveVCLK_POST_DIV = I915_READ(VCLK_POST_DIV);
+ dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
+
+ /* Scratch space */
+ for (i = 0; i < 16; i++) {
+ dev_priv->saveSWF0[i] = I915_READ(SWF0 + (i << 2));
+ dev_priv->saveSWF1[i] = I915_READ(SWF10 + (i << 2));
+ }
+ for (i = 0; i < 3; i++)
+ dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2));
+
+ i915_save_vga(dev);
+
+ /* Shut down the device */
+ pci_disable_device(dev->pdev);
+ pci_set_power_state(dev->pdev, PCI_D3hot);
+
+ return 0;
+}
+
+static int i915_resume(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int i;
+
+ pci_set_power_state(dev->pdev, PCI_D0);
+ pci_restore_state(dev->pdev);
+ if (pci_enable_device(dev->pdev))
+ return -1;
+
+ pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
+
+ /* Pipe & plane A info */
+ /* Prime the clock */
+ if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
+ I915_WRITE(DPLL_A, dev_priv->saveDPLL_A &
+ ~DPLL_VCO_ENABLE);
+ udelay(150);
+ }
+ I915_WRITE(FPA0, dev_priv->saveFPA0);
+ I915_WRITE(FPA1, dev_priv->saveFPA1);
+ /* Actually enable it */
+ I915_WRITE(DPLL_A, dev_priv->saveDPLL_A);
+ udelay(150);
+ if (IS_I965G(dev))
+ I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
+ udelay(150);
+
+ /* Restore mode */
+ I915_WRITE(HTOTAL_A, dev_priv->saveHTOTAL_A);
+ I915_WRITE(HBLANK_A, dev_priv->saveHBLANK_A);
+ I915_WRITE(HSYNC_A, dev_priv->saveHSYNC_A);
+ I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
+ I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
+ I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
+ I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
+
+ /* Restore plane info */
+ I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
+ I915_WRITE(DSPAPOS, dev_priv->saveDSPAPOS);
+ I915_WRITE(PIPEASRC, dev_priv->savePIPEASRC);
+ I915_WRITE(DSPABASE, dev_priv->saveDSPABASE);
+ I915_WRITE(DSPASTRIDE, dev_priv->saveDSPASTRIDE);
+ if (IS_I965G(dev)) {
+ I915_WRITE(DSPASURF, dev_priv->saveDSPASURF);
+ I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF);
+ }
+ I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);
+ i915_restore_palette(dev, PIPE_A);
+ /* Enable the plane */
+ I915_WRITE(DSPACNTR, dev_priv->saveDSPACNTR);
+ I915_WRITE(DSPABASE, I915_READ(DSPABASE));
+
+ /* Pipe & plane B info */
+ if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
+ I915_WRITE(DPLL_B, dev_priv->saveDPLL_B &
+ ~DPLL_VCO_ENABLE);
+ udelay(150);
+ }
+ I915_WRITE(FPB0, dev_priv->saveFPB0);
+ I915_WRITE(FPB1, dev_priv->saveFPB1);
+ /* Actually enable it */
+ I915_WRITE(DPLL_B, dev_priv->saveDPLL_B);
+ udelay(150);
+ if (IS_I965G(dev))
+ I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
+ udelay(150);
+
+ /* Restore mode */
+ I915_WRITE(HTOTAL_B, dev_priv->saveHTOTAL_B);
+ I915_WRITE(HBLANK_B, dev_priv->saveHBLANK_B);
+ I915_WRITE(HSYNC_B, dev_priv->saveHSYNC_B);
+ I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
+ I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
+ I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
+ I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
+
+ /* Restore plane info */
+ I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
+ I915_WRITE(DSPBPOS, dev_priv->saveDSPBPOS);
+ I915_WRITE(PIPEBSRC, dev_priv->savePIPEBSRC);
+ I915_WRITE(DSPBBASE, dev_priv->saveDSPBBASE);
+ I915_WRITE(DSPBSTRIDE, dev_priv->saveDSPBSTRIDE);
+ if (IS_I965G(dev)) {
+ I915_WRITE(DSPBSURF, dev_priv->saveDSPBSURF);
+ I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF);
+ }
+ I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF);
+ i915_restore_palette(dev, PIPE_A);
+ /* Enable the plane */
+ I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
+ I915_WRITE(DSPBBASE, I915_READ(DSPBBASE));
+
+ /* CRT state */
+ I915_WRITE(ADPA, dev_priv->saveADPA);
+
+ /* LVDS state */
+ if (IS_I965G(dev))
+ I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
+ if (IS_MOBILE(dev) && !IS_I830(dev))
+ I915_WRITE(LVDS, dev_priv->saveLVDS);
+ if (!IS_I830(dev) && !IS_845G(dev))
+ I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
+
+ I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
+ I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
+ I915_WRITE(LVDSPP_ON, dev_priv->saveLVDSPP_ON);
+ I915_WRITE(LVDSPP_OFF, dev_priv->saveLVDSPP_OFF);
+ I915_WRITE(PP_CYCLE, dev_priv->savePP_CYCLE);
+ I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
+
+ /* FIXME: restore TV & SDVO state */
+
+ /* FBC info */
+ I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
+ I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
+ I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
+ I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
+
+ /* VGA state */
+ I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
+ I915_WRITE(VCLK_DIVISOR_VGA0, dev_priv->saveVCLK_DIVISOR_VGA0);
+ I915_WRITE(VCLK_DIVISOR_VGA1, dev_priv->saveVCLK_DIVISOR_VGA1);
+ I915_WRITE(VCLK_POST_DIV, dev_priv->saveVCLK_POST_DIV);
+ udelay(150);
+
+ for (i = 0; i < 16; i++) {
+ I915_WRITE(SWF0 + (i << 2), dev_priv->saveSWF0[i]);
+ I915_WRITE(SWF10 + (i << 2), dev_priv->saveSWF1[i+7]);
+ }
+ for (i = 0; i < 3; i++)
+ I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
+
+ i915_restore_vga(dev);
+
+ return 0;
+}
+
static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
static struct drm_driver driver = {
/* don't use mtrr's here, the Xserver or user space app should
@@ -79,9 +531,12 @@ static struct drm_driver driver = {
DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL |
DRIVER_IRQ_VBL2,
.load = i915_driver_load,
+ .unload = i915_driver_unload,
.firstopen = i915_driver_firstopen,
.lastclose = i915_driver_lastclose,
.preclose = i915_driver_preclose,
+ .suspend = i915_suspend,
+ .resume = i915_resume,
.device_is_agp = i915_driver_device_is_agp,
.vblank_wait = i915_driver_vblank_wait,
.vblank_wait2 = i915_driver_vblank_wait2,
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index b116863..24a4ec4 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -31,17 +31,6 @@
#include "i915_drm.h"
#include "i915_drv.h"
-#define IS_I965G(dev) (dev->pci_device == 0x2972 || \
- dev->pci_device == 0x2982 || \
- dev->pci_device == 0x2992 || \
- dev->pci_device == 0x29A2 || \
- dev->pci_device == 0x2A02 || \
- dev->pci_device == 0x2A12)
-
-#define IS_G33(dev) (dev->pci_device == 0x29C2 || \
- dev->pci_device == 0x29B2 || \
- dev->pci_device == 0x29D2)
-
/* Really want an OS-independent resettable timer. Would like to have
* this loop run for (eg) 3 sec, but have the timer reset every time
* the head pointer changes, so that EBUSY only happens if the ring
@@ -91,6 +80,7 @@ void i915_kernel_lost_context(struct drm_device * dev)
static int i915_dma_cleanup(struct drm_device * dev)
{
+ drm_i915_private_t *dev_priv = dev->dev_private;
/* Make sure interrupts are disabled here because the uninstall ioctl
* may not have been called from userspace and after dev_private
* is freed, it's too late.
@@ -98,50 +88,42 @@ static int i915_dma_cleanup(struct drm_device * dev)
if (dev->irq)
drm_irq_uninstall(dev);
- if (dev->dev_private) {
- drm_i915_private_t *dev_priv =
- (drm_i915_private_t *) dev->dev_private;
-
- if (dev_priv->ring.virtual_start) {
- drm_core_ioremapfree(&dev_priv->ring.map, dev);
- }
+ if (dev_priv->ring.virtual_start) {
+ drm_core_ioremapfree(&dev_priv->ring.map, dev);
+ dev_priv->ring.virtual_start = 0;
+ dev_priv->ring.map.handle = 0;
+ dev_priv->ring.map.size = 0;
+ }
- if (dev_priv->status_page_dmah) {
- drm_pci_free(dev, dev_priv->status_page_dmah);
- /* Need to rewrite hardware status page */
- I915_WRITE(0x02080, 0x1ffff000);
- }
- if (dev_priv->status_gfx_addr) {
- dev_priv->status_gfx_addr = 0;
- drm_core_ioremapfree(&dev_priv->hws_map, dev);
- I915_WRITE(0x02080, 0x1ffff000);
- }
- drm_free(dev->dev_private, sizeof(drm_i915_private_t),
- DRM_MEM_DRIVER);
+ if (dev_priv->status_page_dmah) {
+ drm_pci_free(dev, dev_priv->status_page_dmah);
+ dev_priv->status_page_dmah = NULL;
+ /* Need to rewrite hardware status page */
+ I915_WRITE(0x02080, 0x1ffff000);
+ }
- dev->dev_private = NULL;
+ if (dev_priv->status_gfx_addr) {
+ dev_priv->status_gfx_addr = 0;
+ drm_core_ioremapfree(&dev_priv->hws_map, dev);
+ I915_WRITE(0x02080, 0x1ffff000);
}
return 0;
}
-static int i915_initialize(struct drm_device * dev,
- drm_i915_private_t * dev_priv,
- drm_i915_init_t * init)
+static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
{
- memset(dev_priv, 0, sizeof(drm_i915_private_t));
+ drm_i915_private_t *dev_priv = dev->dev_private;
dev_priv->sarea = drm_getsarea(dev);
if (!dev_priv->sarea) {
DRM_ERROR("can not find sarea!\n");
- dev->dev_private = (void *)dev_priv;
i915_dma_cleanup(dev);
return -EINVAL;
}
dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
if (!dev_priv->mmio_map) {
- dev->dev_private = (void *)dev_priv;
i915_dma_cleanup(dev);
DRM_ERROR("can not find mmio map!\n");
return -EINVAL;
@@ -168,7 +150,6 @@ static int i915_initialize(struct drm_device * dev,
drm_core_ioremap(&dev_priv->ring.map, dev);
if (dev_priv->ring.map.handle == NULL) {
- dev->dev_private = (void *)dev_priv;
i915_dma_cleanup(dev);
DRM_ERROR("can not ioremap virtual address for"
" ring buffer\n");
@@ -199,7 +180,6 @@ static int i915_initialize(struct drm_device * dev,
drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
if (!dev_priv->status_page_dmah) {
- dev->dev_private = (void *)dev_priv;
i915_dma_cleanup(dev);
DRM_ERROR("Can not allocate hardware status page\n");
return -ENOMEM;
@@ -212,7 +192,6 @@ static int i915_initialize(struct drm_device * dev,
I915_WRITE(0x02080, dev_priv->dma_status_page);
}
DRM_DEBUG("Enabled hardware status page\n");
- dev->dev_private = (void *)dev_priv;
mutex_init(&dev_priv->cmdbuf_mutex);
return 0;
}
@@ -258,17 +237,12 @@ static int i915_dma_resume(struct drm_device * dev)
static int i915_dma_init(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
- drm_i915_private_t *dev_priv;
drm_i915_init_t *init = data;
int retcode = 0;
switch (init->func) {
case I915_INIT_DMA:
- dev_priv = drm_alloc(sizeof(drm_i915_private_t),
- DRM_MEM_DRIVER);
- if (dev_priv == NULL)
- return -ENOMEM;
- retcode = i915_initialize(dev, dev_priv, init);
+ retcode = i915_initialize(dev, init);
break;
case I915_CLEANUP_DMA:
retcode = i915_dma_cleanup(dev);
@@ -1299,7 +1273,6 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
drm_core_ioremap(&dev_priv->hws_map, dev);
if (dev_priv->hws_map.handle == NULL) {
- dev->dev_private = (void *)dev_priv;
i915_dma_cleanup(dev);
dev_priv->status_gfx_addr = 0;
DRM_ERROR("can not ioremap virtual address for"
@@ -1318,6 +1291,10 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
int i915_driver_load(struct drm_device *dev, unsigned long flags)
{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ unsigned long base, size;
+ int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
+
/* i915 has 4 more counters */
dev->counters += 4;
dev->types[6] = _DRM_STAT_IRQ;
@@ -1325,25 +1302,52 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
dev->types[8] = _DRM_STAT_SECONDARY;
dev->types[9] = _DRM_STAT_DMA;
+ dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
+ if (dev_priv == NULL)
+ return -ENOMEM;
+
+ memset(dev_priv, 0, sizeof(drm_i915_private_t));
+
+ dev->dev_private = (void *)dev_priv;
+
+ /* Add register map (needed for suspend/resume) */
+ base = drm_get_resource_start(dev, mmio_bar);
+ size = drm_get_resource_len(dev, mmio_bar);
+
+ ret = drm_addmap(dev, base, size, _DRM_REGISTERS, _DRM_KERNEL,
+ &dev_priv->mmio_map);
+
+ return ret;
+}
+
+int i915_driver_unload(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ if (dev_priv->mmio_map)
+ drm_rmmap(dev, dev_priv->mmio_map);
+
+ drm_free(dev->dev_private, sizeof(drm_i915_private_t),
+ DRM_MEM_DRIVER);
return 0;
}
void i915_driver_lastclose(struct drm_device * dev)
{
- if (dev->dev_private) {
- drm_i915_private_t *dev_priv = dev->dev_private;
+ drm_i915_private_t *dev_priv = dev->dev_private;
+
+ if (drm_getsarea(dev) && dev_priv->sarea_priv)
i915_do_cleanup_pageflip(dev);
+ if (dev_priv->agp_heap)
i915_mem_takedown(&(dev_priv->agp_heap));
- }
+
i915_dma_cleanup(dev);
}
void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
{
- if (dev->dev_private) {
- drm_i915_private_t *dev_priv = dev->dev_private;
- i915_mem_release(dev, file_priv, dev_priv->agp_heap);
- }
+ drm_i915_private_t *dev_priv = dev->dev_private;
+ i915_mem_release(dev, file_priv, dev_priv->agp_heap);
}
struct drm_ioctl_desc i915_ioctls[] = {
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index 817288b..07a173a 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -146,6 +146,88 @@ typedef struct drm_i915_private {
drm_i915_vbl_swap_t vbl_swaps;
unsigned int swaps_pending;
+ /* Register state */
+ u8 saveLBB;
+ u32 saveDSPACNTR;
+ u32 saveDSPBCNTR;
+ u32 savePIPEACONF;
+ u32 savePIPEBCONF;
+ u32 savePIPEASRC;
+ u32 savePIPEBSRC;
+ u32 saveFPA0;
+ u32 saveFPA1;
+ u32 saveDPLL_A;
+ u32 saveDPLL_A_MD;
+ u32 saveHTOTAL_A;
+ u32 saveHBLANK_A;
+ u32 saveHSYNC_A;
+ u32 saveVTOTAL_A;
+ u32 saveVBLANK_A;
+ u32 saveVSYNC_A;
+ u32 saveBCLRPAT_A;
+ u32 saveDSPASTRIDE;
+ u32 saveDSPASIZE;
+ u32 saveDSPAPOS;
+ u32 saveDSPABASE;
+ u32 saveDSPASURF;
+ u32 saveDSPATILEOFF;
+ u32 savePFIT_PGM_RATIOS;
+ u32 saveBLC_PWM_CTL;
+ u32 saveBLC_PWM_CTL2;
+ u32 saveFPB0;
+ u32 saveFPB1;
+ u32 saveDPLL_B;
+ u32 saveDPLL_B_MD;
+ u32 saveHTOTAL_B;
+ u32 saveHBLANK_B;
+ u32 saveHSYNC_B;
+ u32 saveVTOTAL_B;
+ u32 saveVBLANK_B;
+ u32 saveVSYNC_B;
+ u32 saveBCLRPAT_B;
+ u32 saveDSPBSTRIDE;
+ u32 saveDSPBSIZE;
+ u32 saveDSPBPOS;
+ u32 saveDSPBBASE;
+ u32 saveDSPBSURF;
+ u32 saveDSPBTILEOFF;
+ u32 saveVCLK_DIVISOR_VGA0;
+ u32 saveVCLK_DIVISOR_VGA1;
+ u32 saveVCLK_POST_DIV;
+ u32 saveVGACNTRL;
+ u32 saveADPA;
+ u32 saveLVDS;
+ u32 saveLVDSPP_ON;
+ u32 saveLVDSPP_OFF;
+ u32 saveDVOA;
+ u32 saveDVOB;
+ u32 saveDVOC;
+ u32 savePP_ON;
+ u32 savePP_OFF;
+ u32 savePP_CONTROL;
+ u32 savePP_CYCLE;
+ u32 savePFIT_CONTROL;
+ u32 save_palette_a[256];
+ u32 save_palette_b[256];
+ u32 saveFBC_CFB_BASE;
+ u32 saveFBC_LL_BASE;
+ u32 saveFBC_CONTROL;
+ u32 saveFBC_CONTROL2;
+ u32 saveSWF0[16];
+ u32 saveSWF1[16];
+ u32 saveSWF2[3];
+ u8 saveMSR;
+ u8 saveSR[8];
+ u8 saveGR[24];
+ u8 saveAR_INDEX;
+ u8 saveAR[20];
+ u8 saveDACMASK;
+ u8 saveDACDATA[256*3]; /* 256 3-byte colors */
+ u8 saveCR[36];
+ u8 savePLANE0[64*1024];
+ u8 savePLANE1[64*1024];
+ u8 savePLANE2[64*1024];
+ u8 savePLANE3[64*1024];
} drm_i915_private_t;
enum intel_chip_family {
@@ -161,6 +243,7 @@ extern int i915_max_ioctl;
/* i915_dma.c */
extern void i915_kernel_lost_context(struct drm_device * dev);
extern int i915_driver_load(struct drm_device *, unsigned long flags);
+extern int i915_driver_unload(struct drm_device *);
extern void i915_driver_lastclose(struct drm_device * dev);
extern void i915_driver_preclose(struct drm_device *dev,
struct drm_file *file_priv);
@@ -273,6 +356,50 @@ extern int i915_move(struct drm_buffer_object *bo, int evict,
extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
+/* Extended config space */
+#define LBB 0xf4
+
+/* VGA stuff */
+
+#define VGA_ST01_MDA 0x3ba
+#define VGA_ST01_CGA 0x3da
+
+#define VGA_MSR_WRITE 0x3c2
+#define VGA_MSR_READ 0x3cc
+#define VGA_MSR_MEM_EN (1<<1)
+#define VGA_MSR_CGA_MODE (1<<0)
+
+#define VGA_SR_INDEX 0x3c4
+#define VGA_SR_DATA 0x3c5
+
+#define VGA_AR_INDEX 0x3c0
+#define VGA_AR_VID_EN (1<<5)
+#define VGA_AR_DATA_WRITE 0x3c0
+#define VGA_AR_DATA_READ 0x3c1
+
+#define VGA_GR_INDEX 0x3ce
+#define VGA_GR_DATA 0x3cf
+/* GR05 */
+#define VGA_GR_MEM_READ_MODE_SHIFT 3
+#define VGA_GR_MEM_READ_MODE_PLANE 1
+/* GR06 */
+#define VGA_GR_MEM_MODE_MASK 0xc
+#define VGA_GR_MEM_MODE_SHIFT 2
+#define VGA_GR_MEM_A0000_AFFFF 0
+#define VGA_GR_MEM_A0000_BFFFF 1
+#define VGA_GR_MEM_B0000_B7FFF 2
+#define VGA_GR_MEM_B0000_BFFFF 3
+
+#define VGA_DACMASK 0x3c6
+#define VGA_DACRX 0x3c7
+#define VGA_DACWX 0x3c8
+#define VGA_DACDATA 0x3c9
+
+#define VGA_CR_INDEX_MDA 0x3b4
+#define VGA_CR_DATA_MDA 0x3b5
+#define VGA_CR_INDEX_CGA 0x3d4
+#define VGA_CR_DATA_CGA 0x3d5
+
#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
#define CMD_REPORT_HEAD (7<<23)
@@ -295,6 +422,37 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
#define BB1_UNPROTECTED (0<<0)
#define BB2_END_ADDR_MASK (~0x7)
+/* Framebuffer compression */
+#define FBC_CFB_BASE 0x03200 /* 4k page aligned */
+#define FBC_LL_BASE 0x03204 /* 4k page aligned */
+#define FBC_CONTROL 0x03208
+#define FBC_CTL_EN (1<<31)
+#define FBC_CTL_PERIODIC (1<<30)
+#define FBC_CTL_INTERVAL_SHIFT (16)
+#define FBC_CTL_UNCOMPRESSIBLE (1<<14)
+#define FBC_CTL_STRIDE_SHIFT (5)
+#define FBC_CTL_FENCENO (1<<0)
+#define FBC_COMMAND 0x0320c
+#define FBC_CMD_COMPRESS (1<<0)
+#define FBC_STATUS 0x03210
+#define FBC_STAT_COMPRESSING (1<<31)
+#define FBC_STAT_COMPRESSED (1<<30)
+#define FBC_STAT_MODIFIED (1<<29)
+#define FBC_STAT_CURRENT_LINE (1<<0)
+#define FBC_CONTROL2 0x03214
+#define FBC_CTL_FENCE_DBL (0<<4)
+#define FBC_CTL_IDLE_IMM (0<<2)
+#define FBC_CTL_IDLE_FULL (1<<2)
+#define FBC_CTL_IDLE_LINE (2<<2)
+#define FBC_CTL_IDLE_DEBUG (3<<2)
+#define FBC_CTL_CPU_FENCE (1<<1)
+#define FBC_CTL_PLANEA (0<<0)
+#define FBC_CTL_PLANEB (1<<0)
+#define FBC_FENCE_OFF 0x0321b
+
+#define FBC_LL_SIZE (1536)
+#define FBC_LL_PAD (32)
+
/* Interrupt bits:
*/
#define USER_INT_FLAG (1<<1)
@@ -516,4 +674,509 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
#define READ_BREADCRUMB(dev_priv) (((volatile u32*)(dev_priv->hw_status_page))[5])
#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
+
+#define BLC_PWM_CTL 0x61254
+#define BACKLIGHT_MODULATION_FREQ_SHIFT (17)
+
+#define BLC_PWM_CTL2 0x61250
+/**
+ * This is the most significant 15 bits of the number of backlight cycles in a
+ * complete cycle of the modulated backlight control.
+ *
+ * The actual value is this field multiplied by two.
+ */
+#define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17)
+#define BLM_LEGACY_MODE (1 << 16)
+/**
+ * This is the number of cycles out of the backlight modulation cycle for which
+ * the backlight is on.
+ *
+ * This field must be no greater than the number of cycles in the complete
+ * backlight modulation cycle.
+ */
+#define BACKLIGHT_DUTY_CYCLE_SHIFT (0)
+#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff)
+
+#define I915_GCFGC 0xf0
+#define I915_LOW_FREQUENCY_ENABLE (1 << 7)
+#define I915_DISPLAY_CLOCK_190_200_MHZ (0 << 4)
+#define I915_DISPLAY_CLOCK_333_MHZ (4 << 4)
+#define I915_DISPLAY_CLOCK_MASK (7 << 4)
+
+#define I855_HPLLCC 0xc0
+#define I855_CLOCK_CONTROL_MASK (3 << 0)
+#define I855_CLOCK_133_200 (0 << 0)
+#define I855_CLOCK_100_200 (1 << 0)
+#define I855_CLOCK_100_133 (2 << 0)
+#define I855_CLOCK_166_250 (3 << 0)
+
+/* p317, 319
+ */
+#define VCLK2_VCO_M 0x6008 /* treat as 16 bit? (includes msbs) */
+#define VCLK2_VCO_N 0x600a
+#define VCLK2_VCO_DIV_SEL 0x6012
+
+#define VCLK_DIVISOR_VGA0 0x6000
+#define VCLK_DIVISOR_VGA1 0x6004
+#define VCLK_POST_DIV 0x6010
+/** Selects a post divisor of 4 instead of 2. */
+# define VGA1_PD_P2_DIV_4 (1 << 15)
+/** Overrides the p2 post divisor field */
+# define VGA1_PD_P1_DIV_2 (1 << 13)
+# define VGA1_PD_P1_SHIFT 8
+/** P1 value is 2 greater than this field */
+# define VGA1_PD_P1_MASK (0x1f << 8)
+/** Selects a post divisor of 4 instead of 2. */
+# define VGA0_PD_P2_DIV_4 (1 << 7)
+/** Overrides the p2 post divisor field */
+# define VGA0_PD_P1_DIV_2 (1 << 5)
+# define VGA0_PD_P1_SHIFT 0
+/** P1 value is 2 greater than this field */
+# define VGA0_PD_P1_MASK (0x1f << 0)
+
+/* I830 CRTC registers */
+#define HTOTAL_A 0x60000
+#define HBLANK_A 0x60004
+#define HSYNC_A 0x60008
+#define VTOTAL_A 0x6000c
+#define VBLANK_A 0x60010
+#define VSYNC_A 0x60014
+#define PIPEASRC 0x6001c
+#define BCLRPAT_A 0x60020
+#define VSYNCSHIFT_A 0x60028
+
+#define HTOTAL_B 0x61000
+#define HBLANK_B 0x61004
+#define HSYNC_B 0x61008
+#define VTOTAL_B 0x6100c
+#define VBLANK_B 0x61010
+#define VSYNC_B 0x61014
+#define PIPEBSRC 0x6101c
+#define BCLRPAT_B 0x61020
+#define VSYNCSHIFT_B 0x61028
+
+#define PP_STATUS 0x61200
+# define PP_ON (1 << 31)
+/**
+ * Indicates that all dependencies of the panel are on:
+ *
+ * - PLL enabled
+ * - pipe enabled
+ * - LVDS/DVOB/DVOC on
+ */
+# define PP_READY (1 << 30)
+# define PP_SEQUENCE_NONE (0 << 28)
+# define PP_SEQUENCE_ON (1 << 28)
+# define PP_SEQUENCE_OFF (2 << 28)
+# define PP_SEQUENCE_MASK 0x30000000
+#define PP_CONTROL 0x61204
+# define POWER_TARGET_ON (1 << 0)
+
+#define LVDSPP_ON 0x61208
+#define LVDSPP_OFF 0x6120c
+#define PP_CYCLE 0x61210
+
+#define PFIT_CONTROL 0x61230
+# define PFIT_ENABLE (1 << 31)
+# define PFIT_PIPE_MASK (3 << 29)
+# define PFIT_PIPE_SHIFT 29
+# define VERT_INTERP_DISABLE (0 << 10)
+# define VERT_INTERP_BILINEAR (1 << 10)
+# define VERT_INTERP_MASK (3 << 10)
+# define VERT_AUTO_SCALE (1 << 9)
+# define HORIZ_INTERP_DISABLE (0 << 6)
+# define HORIZ_INTERP_BILINEAR (1 << 6)
+# define HORIZ_INTERP_MASK (3 << 6)
+# define HORIZ_AUTO_SCALE (1 << 5)
+# define PANEL_8TO6_DITHER_ENABLE (1 << 3)
+
+#define PFIT_PGM_RATIOS 0x61234
+# define PFIT_VERT_SCALE_MASK 0xfff00000
+# define PFIT_HORIZ_SCALE_MASK 0x0000fff0
+
+#define PFIT_AUTO_RATIOS 0x61238
+
+
+#define DPLL_A 0x06014
+#define DPLL_B 0x06018
+# define DPLL_VCO_ENABLE (1 << 31)
+# define DPLL_DVO_HIGH_SPEED (1 << 30)
+# define DPLL_SYNCLOCK_ENABLE (1 << 29)
+# define DPLL_VGA_MODE_DIS (1 << 28)
+# define DPLLB_MODE_DAC_SERIAL (1 << 26) /* i915 */
+# define DPLLB_MODE_LVDS (2 << 26) /* i915 */
+# define DPLL_MODE_MASK (3 << 26)
+# define DPLL_DAC_SERIAL_P2_CLOCK_DIV_10 (0 << 24) /* i915 */
+# define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */
+# define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */
+# define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */
+# define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */
+# define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
+/**
+ * The i830 generation, in DAC/serial mode, defines p1 as two plus this
+ * bitfield, or just 2 if PLL_P1_DIVIDE_BY_TWO is set.
+ */
+# define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000
+/**
+ * The i830 generation, in LVDS mode, defines P1 as the bit number set within
+ * this field (only one bit may be set).
+ */
+# define DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS 0x003f0000
+# define DPLL_FPA01_P1_POST_DIV_SHIFT 16
+# define PLL_P2_DIVIDE_BY_4 (1 << 23) /* i830, required in DVO non-gang */
+# define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */
+# define PLL_REF_INPUT_DREFCLK (0 << 13)
+# define PLL_REF_INPUT_TVCLKINA (1 << 13) /* i830 */
+# define PLL_REF_INPUT_TVCLKINBC (2 << 13) /* SDVO TVCLKIN */
+# define PLLB_REF_INPUT_SPREADSPECTRUMIN (3 << 13)
+# define PLL_REF_INPUT_MASK (3 << 13)
+# define PLL_LOAD_PULSE_PHASE_SHIFT 9
+/*
+ * Parallel to Serial Load Pulse phase selection.
+ * Selects the phase for the 10X DPLL clock for the PCIe
+ * digital display port. The range is 4 to 13; 10 or more
+ * is just a flip delay. The default is 6
+ */
+# define PLL_LOAD_PULSE_PHASE_MASK (0xf << PLL_LOAD_PULSE_PHASE_SHIFT)
+# define DISPLAY_RATE_SELECT_FPA1 (1 << 8)
+
+/**
+ * SDVO multiplier for 945G/GM. Not used on 965.
+ *
+ * \sa DPLL_MD_UDI_MULTIPLIER_MASK
+ */
+# define SDVO_MULTIPLIER_MASK 0x000000ff
+# define SDVO_MULTIPLIER_SHIFT_HIRES 4
+# define SDVO_MULTIPLIER_SHIFT_VGA 0
+
+/** @defgroup DPLL_MD
+ * @{
+ */
+/** Pipe A SDVO/UDI clock multiplier/divider register for G965. */
+#define DPLL_A_MD 0x0601c
+/** Pipe B SDVO/UDI clock multiplier/divider register for G965. */
+#define DPLL_B_MD 0x06020
+/**
+ * UDI pixel divider, controlling how many pixels are stuffed into a packet.
+ *
+ * Value is pixels minus 1. Must be set to 1 pixel for SDVO.
+ */
+# define DPLL_MD_UDI_DIVIDER_MASK 0x3f000000
+# define DPLL_MD_UDI_DIVIDER_SHIFT 24
+/** UDI pixel divider for VGA, same as DPLL_MD_UDI_DIVIDER_MASK. */
+# define DPLL_MD_VGA_UDI_DIVIDER_MASK 0x003f0000
+# define DPLL_MD_VGA_UDI_DIVIDER_SHIFT 16
+/**
+ * SDVO/UDI pixel multiplier.
+ *
+ * SDVO requires that the bus clock rate be between 1 and 2 Ghz, and the bus
+ * clock rate is 10 times the DPLL clock. At low resolution/refresh rate
+ * modes, the bus rate would be below the limits, so SDVO allows for stuffing
+ * dummy bytes in the datastream at an increased clock rate, with both sides of
+ * the link knowing how many bytes are fill.
+ *
+ * So, for a mode with a dotclock of 65Mhz, we would want to double the clock
+ * rate to 130Mhz to get a bus rate of 1.30Ghz. The DPLL clock rate would be
+ * set to 130Mhz, and the SDVO multiplier set to 2x in this register and
+ * through an SDVO command.
+ *
+ * This register field has values of multiplication factor minus 1, with
+ * a maximum multiplier of 5 for SDVO.
+ */
+# define DPLL_MD_UDI_MULTIPLIER_MASK 0x00003f00
+# define DPLL_MD_UDI_MULTIPLIER_SHIFT 8
+/** SDVO/UDI pixel multiplier for VGA, same as DPLL_MD_UDI_MULTIPLIER_MASK.
+ * This best be set to the default value (3) or the CRT won't work. No,
+ * I don't entirely understand what this does...
+ */
+# define DPLL_MD_VGA_UDI_MULTIPLIER_MASK 0x0000003f
+# define DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT 0
+/** @} */
+
+#define DPLL_TEST 0x606c
+# define DPLLB_TEST_SDVO_DIV_1 (0 << 22)
+# define DPLLB_TEST_SDVO_DIV_2 (1 << 22)
+# define DPLLB_TEST_SDVO_DIV_4 (2 << 22)
+# define DPLLB_TEST_SDVO_DIV_MASK (3 << 22)
+# define DPLLB_TEST_N_BYPASS (1 << 19)
+# define DPLLB_TEST_M_BYPASS (1 << 18)
+# define DPLLB_INPUT_BUFFER_ENABLE (1 << 16)
+# define DPLLA_TEST_N_BYPASS (1 << 3)
+# define DPLLA_TEST_M_BYPASS (1 << 2)
+# define DPLLA_INPUT_BUFFER_ENABLE (1 << 0)
+
+#define ADPA 0x61100
+#define ADPA_DAC_ENABLE (1<<31)
+#define ADPA_DAC_DISABLE 0
+#define ADPA_PIPE_SELECT_MASK (1<<30)
+#define ADPA_PIPE_A_SELECT 0
+#define ADPA_PIPE_B_SELECT (1<<30)
+#define ADPA_USE_VGA_HVPOLARITY (1<<15)
+#define ADPA_SETS_HVPOLARITY 0
+#define ADPA_VSYNC_CNTL_DISABLE (1<<11)
+#define ADPA_VSYNC_CNTL_ENABLE 0
+#define ADPA_HSYNC_CNTL_DISABLE (1<<10)
+#define ADPA_HSYNC_CNTL_ENABLE 0
+#define ADPA_VSYNC_ACTIVE_HIGH (1<<4)
+#define ADPA_VSYNC_ACTIVE_LOW 0
+#define ADPA_HSYNC_ACTIVE_HIGH (1<<3)
+#define ADPA_HSYNC_ACTIVE_LOW 0
+
+#define FPA0 0x06040
+#define FPA1 0x06044
+#define FPB0 0x06048
+#define FPB1 0x0604c
+# define FP_N_DIV_MASK 0x003f0000
+# define FP_N_DIV_SHIFT 16
+# define FP_M1_DIV_MASK 0x00003f00
+# define FP_M1_DIV_SHIFT 8
+# define FP_M2_DIV_MASK 0x0000003f
+# define FP_M2_DIV_SHIFT 0
+
+
+#define PORT_HOTPLUG_EN 0x61110
+# define SDVOB_HOTPLUG_INT_EN (1 << 26)
+# define SDVOC_HOTPLUG_INT_EN (1 << 25)
+# define TV_HOTPLUG_INT_EN (1 << 18)
+# define CRT_HOTPLUG_INT_EN (1 << 9)
+# define CRT_HOTPLUG_FORCE_DETECT (1 << 3)
+
+#define PORT_HOTPLUG_STAT 0x61114
+# define CRT_HOTPLUG_INT_STATUS (1 << 11)
+# define TV_HOTPLUG_INT_STATUS (1 << 10)
+# define CRT_HOTPLUG_MONITOR_MASK (3 << 8)
+# define CRT_HOTPLUG_MONITOR_COLOR (3 << 8)
+# define CRT_HOTPLUG_MONITOR_MONO (2 << 8)
+# define CRT_HOTPLUG_MONITOR_NONE (0 << 8)
+# define SDVOC_HOTPLUG_INT_STATUS (1 << 7)
+# define SDVOB_HOTPLUG_INT_STATUS (1 << 6)
+
+#define SDVOB 0x61140
+#define SDVOC 0x61160
+#define SDVO_ENABLE (1 << 31)
+#define SDVO_PIPE_B_SELECT (1 << 30)
+#define SDVO_STALL_SELECT (1 << 29)
+#define SDVO_INTERRUPT_ENABLE (1 << 26)
+/**
+ * 915G/GM SDVO pixel multiplier.
+ *
+ * Programmed value is multiplier - 1, up to 5x.
+ *
+ * \sa DPLL_MD_UDI_MULTIPLIER_MASK
+ */
+#define SDVO_PORT_MULTIPLY_MASK (7 << 23)
+#define SDVO_PORT_MULTIPLY_SHIFT 23
+#define SDVO_PHASE_SELECT_MASK (15 << 19)
+#define SDVO_PHASE_SELECT_DEFAULT (6 << 19)
+#define SDVO_CLOCK_OUTPUT_INVERT (1 << 18)
+#define SDVOC_GANG_MODE (1 << 16)
+#define SDVO_BORDER_ENABLE (1 << 7)
+#define SDVOB_PCIE_CONCURRENCY (1 << 3)
+#define SDVO_DETECTED (1 << 2)
+/* Bits to be preserved when writing */
+#define SDVOB_PRESERVE_MASK ((1 << 17) | (1 << 16) | (1 << 14))
+#define SDVOC_PRESERVE_MASK (1 << 17)
+
+/** @defgroup LVDS
+ * @{
+ */
+/**
+ * This register controls the LVDS output enable, pipe selection, and data
+ * format selection.
+ *
+ * All of the clock/data pairs are force powered down by power sequencing.
+ */
+#define LVDS 0x61180
+/**
+ * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
+ * the DPLL semantics change when the LVDS is assigned to that pipe.
+ */
+# define LVDS_PORT_EN (1 << 31)
+/** Selects pipe B for LVDS data. Must be set on pre-965. */
+# define LVDS_PIPEB_SELECT (1 << 30)
+
+/**
+ * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
+ * pixel.
+ */
+# define LVDS_A0A2_CLKA_POWER_MASK (3 << 8)
+# define LVDS_A0A2_CLKA_POWER_DOWN (0 << 8)
+# define LVDS_A0A2_CLKA_POWER_UP (3 << 8)
+/**
+ * Controls the A3 data pair, which contains the additional LSBs for 24 bit
+ * mode. Only enabled if LVDS_A0A2_CLKA_POWER_UP also indicates it should be
+ * on.
+ */
+# define LVDS_A3_POWER_MASK (3 << 6)
+# define LVDS_A3_POWER_DOWN (0 << 6)
+# define LVDS_A3_POWER_UP (3 << 6)
+/**
+ * Controls the CLKB pair. This should only be set when LVDS_B0B3_POWER_UP
+ * is set.
+ */
+# define LVDS_CLKB_POWER_MASK (3 << 4)
+# define LVDS_CLKB_POWER_DOWN (0 << 4)
+# define LVDS_CLKB_POWER_UP (3 << 4)
+
+/**
+ * Controls the B0-B3 data pairs. This must be set to match the DPLL p2
+ * setting for whether we are in dual-channel mode. The B3 pair will
+ * additionally only be powered up when LVDS_A3_POWER_UP is set.
+ */
+# define LVDS_B0B3_POWER_MASK (3 << 2)
+# define LVDS_B0B3_POWER_DOWN (0 << 2)
+# define LVDS_B0B3_POWER_UP (3 << 2)
+
+#define PIPEACONF 0x70008
+#define PIPEACONF_ENABLE (1<<31)
+#define PIPEACONF_DISABLE 0
+#define PIPEACONF_DOUBLE_WIDE (1<<30)
+#define I965_PIPECONF_ACTIVE (1<<30)
+#define PIPEACONF_SINGLE_WIDE 0
+#define PIPEACONF_PIPE_UNLOCKED 0
+#define PIPEACONF_PIPE_LOCKED (1<<25)
+#define PIPEACONF_PALETTE 0
+#define PIPEACONF_GAMMA (1<<24)
+#define PIPECONF_FORCE_BORDER (1<<25)
+#define PIPECONF_PROGRESSIVE (0 << 21)
+#define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
+#define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21)
+
+#define PIPEBCONF 0x71008
+#define PIPEBCONF_ENABLE (1<<31)
+#define PIPEBCONF_DISABLE 0
+#define PIPEBCONF_DOUBLE_WIDE (1<<30)
+#define PIPEBCONF_DISABLE 0
+#define PIPEBCONF_GAMMA (1<<24)
+#define PIPEBCONF_PALETTE 0
+
+#define PIPEBGCMAXRED 0x71010
+#define PIPEBGCMAXGREEN 0x71014
+#define PIPEBGCMAXBLUE 0x71018
+#define PIPEBSTAT 0x71024
+#define PIPEBFRAMEHIGH 0x71040
+#define PIPEBFRAMEPIXEL 0x71044
+
+#define DSPACNTR 0x70180
+#define DSPBCNTR 0x71180
+#define DISPLAY_PLANE_ENABLE (1<<31)
+#define DISPLAY_PLANE_DISABLE 0
+#define DISPPLANE_GAMMA_ENABLE (1<<30)
+#define DISPPLANE_GAMMA_DISABLE 0
+#define DISPPLANE_PIXFORMAT_MASK (0xf<<26)
+#define DISPPLANE_8BPP (0x2<<26)
+#define DISPPLANE_15_16BPP (0x4<<26)
+#define DISPPLANE_16BPP (0x5<<26)
+#define DISPPLANE_32BPP_NO_ALPHA (0x6<<26)
+#define DISPPLANE_32BPP (0x7<<26)
+#define DISPPLANE_STEREO_ENABLE (1<<25)
+#define DISPPLANE_STEREO_DISABLE 0
+#define DISPPLANE_SEL_PIPE_MASK (1<<24)
+#define DISPPLANE_SEL_PIPE_A 0
+#define DISPPLANE_SEL_PIPE_B (1<<24)
+#define DISPPLANE_SRC_KEY_ENABLE (1<<22)
+#define DISPPLANE_SRC_KEY_DISABLE 0
+#define DISPPLANE_LINE_DOUBLE (1<<20)
+#define DISPPLANE_NO_LINE_DOUBLE 0
+#define DISPPLANE_STEREO_POLARITY_FIRST 0
+#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18)
+/* plane B only */
+#define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15)
+#define DISPPLANE_ALPHA_TRANS_DISABLE 0
+#define DISPPLANE_SPRITE_ABOVE_DISPLAYA 0
+#define DISPPLANE_SPRITE_ABOVE_OVERLAY (1)
+
+#define DSPABASE 0x70184
+#define DSPASTRIDE 0x70188
+
+#define DSPBBASE 0x71184
+#define DSPBADDR DSPBBASE
+#define DSPBSTRIDE 0x71188
+
+#define DSPAKEYVAL 0x70194
+#define DSPAKEYMASK 0x70198
+
+#define DSPAPOS 0x7018C /* reserved */
+#define DSPASIZE 0x70190
+#define DSPBPOS 0x7118C
+#define DSPBSIZE 0x71190
+
+#define DSPASURF 0x7019C
+#define DSPATILEOFF 0x701A4
+
+#define DSPBSURF 0x7119C
+#define DSPBTILEOFF 0x711A4
+
+#define VGACNTRL 0x71400
+# define VGA_DISP_DISABLE (1 << 31)
+# define VGA_2X_MODE (1 << 30)
+# define VGA_PIPE_B_SELECT (1 << 29)
+
+/*
+ * Some BIOS scratch area registers. The 845 (and 830?) store the amount
+ * of video memory available to the BIOS in SWF1.
+ */
+
+#define SWF0 0x71410
+
+/*
+ * 855 scratch registers.
+ */
+#define SWF10 0x70410
+
+#define SWF30 0x72414
+
+/*
+ * Overlay registers. These are overlay registers accessed via MMIO.
+ * Those loaded via the overlay register page are defined in i830_video.c.
+ */
+#define OVADD 0x30000
+
+#define DOVSTA 0x30008
+#define OC_BUF (0x3<<20)
+
+#define OGAMC5 0x30010
+#define OGAMC4 0x30014
+#define OGAMC3 0x30018
+#define OGAMC2 0x3001c
+#define OGAMC1 0x30020
+#define OGAMC0 0x30024
+/*
+ * Palette registers
+ */
+#define PALETTE_A 0x0a000
+#define PALETTE_B 0x0a800
+
+#define IS_I830(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82830_CGC)
+#define IS_845G(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82845G_IG)
+#define IS_I85X(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82855GM_IG)
+#define IS_I855(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82855GM_IG)
+#define IS_I865G(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82865_IG)
+
+#define IS_I915G(dev) (dev->pci_device == PCI_DEVICE_ID_INTEL_82915G_IG)/* || dev->pci_device == PCI_DEVICE_ID_INTELPCI_CHIP_E7221_G)*/
+#define IS_I915GM(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82915GM_IG)
+#define IS_I945G(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82945G_IG)
+#define IS_I945GM(dev) ((dev)->pci_device == PCI_DEVICE_ID_INTEL_82945GM_IG)
+
+#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
+ (dev)->pci_device == 0x2982 || \
+ (dev)->pci_device == 0x2992 || \
+ (dev)->pci_device == 0x29A2 || \
+ (dev)->pci_device == 0x2A02 || \
+ (dev)->pci_device == 0x2A12)
+
+#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
+
+#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
+ (dev)->pci_device == 0x29B2 || \
+ (dev)->pci_device == 0x29D2)
+
+#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
+ IS_I945GM(dev) || IS_I965G(dev))
+
+#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
+ IS_I945GM(dev) || IS_I965GM(dev))
+
+#define PRIMARY_RINGBUFFER_SIZE (128*1024)
+
#endif
commit 6707ab862656d766a4c78b85e5584a29d2434126
Author: Jesse Barnes <jes...@in...>
Date: Fri Oct 26 16:08:54 2007 -0700
update DRM sysfs support
Make DRM devices use real Linux devices instead of class devices, which are
going away. While we're at it, clean up some of the interfaces to take
struct drm_device * or struct device * and use the global drm_class where
needed instead of passing it around.
diff --git a/linux-core/drmP.h b/linux-core/drmP.h
index d0ab2c9..82a3a23 100644
--- a/linux-core/drmP.h
+++ b/linux-core/drmP.h
@@ -619,6 +619,8 @@ struct drm_driver {
void (*postclose) (struct drm_device *, struct drm_file *);
void (*lastclose) (struct drm_device *);
int (*unload) (struct drm_device *);
+ int (*suspend) (struct drm_device *);
+ int (*resume) (struct drm_device *);
int (*dma_ioctl) (struct drm_device *dev, void *data, struct drm_file *file_priv);
void (*dma_ready) (struct drm_device *);
int (*dma_quiescent) (struct drm_device *);
@@ -697,6 +699,7 @@ struct drm_head {
* may contain multiple heads.
*/
struct drm_device {
+ struct device dev; /**< Linux device */
char *unique; /**< Unique identifier: e.g., busid */
int unique_len; /**< Length of unique field */
char *devname; /**< For /proc/interrupts */
@@ -1163,10 +1166,9 @@ extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah);
/* sysfs support (drm_sysfs.c) */
struct drm_sysfs_class;
extern struct class *drm_sysfs_create(struct module *owner, char *name);
-extern void drm_sysfs_destroy(struct class *cs);
-extern struct class_device *drm_sysfs_device_add(struct class *cs,
- struct drm_head * head);
-extern void drm_sysfs_device_remove(struct class_device *class_dev);
+extern void drm_sysfs_destroy(void);
+extern int drm_sysfs_device_add(struct drm_device *dev, struct drm_head * head);
+extern void drm_sysfs_device_remove(struct drm_device *dev);
/*
* Basic memory manager support (drm_mm.c)
diff --git a/linux-core/drm_drv.c b/linux-core/drm_drv.c
index fe2b120..47d1765 100644
--- a/linux-core/drm_drv.c
+++ b/linux-core/drm_drv.c
@@ -519,7 +519,7 @@ static int __init drm_core_init(void)
CORE_MAJOR, CORE_MINOR, CORE_PATCHLEVEL, CORE_DATE);
return 0;
err_p3:
- drm_sysfs_destroy(drm_class);
+ drm_sysfs_destroy();
err_p2:
unregister_chrdev(DRM_MAJOR, "drm");
drm_free(drm_heads, sizeof(*drm_heads) * drm_cards_limit, DRM_MEM_STUB);
@@ -530,7 +530,7 @@ err_p1:
static void __exit drm_core_exit(void)
{
remove_proc_entry("dri", NULL);
- drm_sysfs_destroy(drm_class);
+ drm_sysfs_destroy();
unregister_chrdev(DRM_MAJOR, "drm");
diff --git a/linux-core/drm_stub.c b/linux-core/drm_stub.c
index 9e140ac..1d88d37 100644
--- a/linux-core/drm_stub.c
+++ b/linux-core/drm_stub.c
@@ -183,11 +183,10 @@ static int drm_get_head(struct drm_device * dev, struct drm_head * head)
goto err_g1;
}
- head->dev_class = drm_sysfs_device_add(drm_class, head);
- if (IS_ERR(head->dev_class)) {
+ ret = drm_sysfs_device_add(dev, head);
+ if (ret) {
printk(KERN_ERR
"DRM: Error sysfs_device_add.\n");
- ret = PTR_ERR(head->dev_class);
goto err_g2;
}
*heads = head;
@@ -316,7 +315,7 @@ int drm_put_head(struct drm_head * head)
DRM_DEBUG("release secondary minor %d\n", minor);
drm_proc_cleanup(minor, drm_proc_root, head->dev_root);
- drm_sysfs_device_remove(head->dev_class);
+ drm_sysfs_device_remove(head->dev);
*head = (struct drm_head){.dev = NULL};
diff --git a/linux-core/drm_sysfs.c b/linux-core/drm_sysfs.c
index cf4349b..6f8623c 100644
--- a/linux-core/drm_sysfs.c
+++ b/linux-core/drm_sysfs.c
@@ -19,6 +19,45 @@
#include "drm_core.h"
#include "drmP.h"
+#define to_drm_device(d) container_of(d, struct drm_device, dev)
+
+/**
+ * drm_sysfs_suspend - DRM class suspend hook
+ * @dev: Linux device to suspend
+ * @state: power state to enter
+ *
+ * Just figures out what the actual struct drm_device associated with
+ * @dev is and calls its suspend hook, if present.
+ */
+static int drm_sysfs_suspend(struct device *dev, pm_message_t state)
+{
+ struct drm_device *drm_dev = to_drm_device(dev);
+
+ printk(KERN_ERR "%s\n", __FUNCTION__);
+
+ if (drm_dev->driver->suspend)
+ return drm_dev->driver->suspend(drm_dev);
+
+ return 0;
+}
+
+/**
+ * drm_sysfs_resume - DRM class resume hook
+ * @dev: Linux device to resume
+ *
+ * Just figures out what the actual struct drm_device associated with
+ * @dev is and calls its resume hook, if present.
+ */
+static int drm_sysfs_resume(struct device *dev)
+{
+ struct drm_device *drm_dev = to_drm_device(dev);
+
+ if (drm_dev->driver->resume)
+ return drm_dev->driver->resume(drm_dev);
+
+ return 0;
+}
+
/* Display the version of drm_core. This doesn't work right in current design */
static ssize_t version_show(struct class *dev, char *buf)
{
@@ -33,7 +72,7 @@ static CLASS_ATTR(version, S_IRUGO, version_show, NULL);
* @owner: pointer to the module that is to "own" this struct drm_sysfs_class
* @name: pointer to a string for the name of this class.
*
- * This is used to create a struct drm_sysfs_class pointer that can then be used
+ * This is used to create DRM class pointer that can then be used
* in calls to drm_sysfs_device_add().
*
* Note, the pointer created here is to be destroyed when finished by making a
@@ -50,6 +89,9 @@ struct class *drm_sysfs_create(struct module *owner, char *name)
goto err_out;
}
+ class->suspend = drm_sysfs_suspend;
+ class->resume = drm_sysfs_resume;
+
err = class_create_file(class, &class_attr_version);
if (err)
goto err_out_class;
@@ -63,94 +105,105 @@ err_out:
}
/**
- * drm_sysfs_destroy - destroys a struct drm_sysfs_class structure
- * @cs: pointer to the struct drm_sysfs_class that is to be destroyed
+ * drm_sysfs_destroy - destroys DRM class
*
- * Note, the pointer to be destroyed must have been created with a call to
- * drm_sysfs_create().
+ * Destroy the DRM device class.
*/
-void drm_sysfs_destroy(struct class *class)
+void drm_sysfs_destroy(void)
{
- if ((class == NULL) || (IS_ERR(class)))
+ if ((drm_class == NULL) || (IS_ERR(drm_class)))
return;
-
- class_remove_file(class, &class_attr_version);
- class_destroy(class);
+ class_remove_file(drm_class, &class_attr_version);
+ class_destroy(drm_class);
}
-static ssize_t show_dri(struct class_device *class_device, char *buf)
+static ssize_t show_dri(struct device *device, struct device_attribute *attr,
+ char *buf)
{
- struct drm_device * dev = ((struct drm_head *)class_get_devdata(class_device))->dev;
+ struct drm_device *dev = to_drm_device(device);
if (dev->driver->dri_library_name)
return dev->driver->dri_library_name(dev, buf);
return snprintf(buf, PAGE_SIZE, "%s\n", dev->driver->pci_driver.name);
}
-static struct class_device_attribute class_device_attrs[] = {
+static struct device_attribute device_attrs[] = {
__ATTR(dri_library_name, S_IRUGO, show_dri, NULL),
};
/**
+ * drm_sysfs_device_release - do nothing
+ * @dev: Linux device
+ *
+ * Normally, this would free the DRM device associated with @dev, along
+ * with cleaning up any other stuff. But we do that in the DRM core, so
+ * this function can just return and hope that the core does its job.
+ */
+static void drm_sysfs_device_release(struct device *dev)
+{
+ return;
+}
+
+/**
* drm_sysfs_device_add - adds a class device to sysfs for a character driver
- * @cs: pointer to the struct class that this device should be registered to.
- * @dev: the dev_t for the device to be added.
- * @device: a pointer to a struct device that is assiociated with this class device.
- * @fmt: string for the class device's name
+ * @dev: DRM device to be added
+ * @head: DRM head in question
*
- * A struct class_device will be created in sysfs, registered to the specified
- * class. A "dev" file will be created, showing the dev_t for the device. The
- * pointer to the struct class_device will be returned from the call. Any further
- * sysfs files that might be required can be created using this pointer.
- * Note: the struct class passed to this function must have previously been
- * created with a call to drm_sysfs_create().
+ * Add a DRM device to the DRM's device model class. We use @dev's PCI device
+ * as the parent for the Linux device, and make sure it has a file containing
+ * the driver we're using (for userspace compatibility).
*/
-struct class_device *drm_sysfs_device_add(struct class *cs, struct drm_head *head)
+int drm_sysfs_device_add(struct drm_device *dev, struct drm_head *head)
{
- struct class_device *class_dev;
- int i, j, err;
-
- class_dev = class_device_create(cs, NULL,
- MKDEV(DRM_MAJOR, head->minor),
- &(head->dev->pdev)->dev,
- "card%d", head->minor);
- if (IS_ERR(class_dev)) {
- err = PTR_ERR(class_dev);
+ int err;
+ int i, j;
+
+ dev->dev.parent = &dev->pdev->dev;
+ dev->dev.class = drm_class;
+ dev->dev.release = drm_sysfs_device_release;
+ /*
+ * This will actually add the major:minor file so that udev
+ * will create the device node. We don't want to do that just
+ * yet...
+ */
+ /* dev->dev.devt = head->device; */
+ snprintf(dev->dev.bus_id, BUS_ID_SIZE, "card%d", head->minor);
+
+ err = device_register(&dev->dev);
+ if (err) {
+ DRM_ERROR("device add failed: %d\n", err);
goto err_out;
}
- class_set_devdata(class_dev, head);
-
- for (i = 0; i < ARRAY_SIZE(class_device_attrs); i++) {
- err = class_device_create_file(class_dev,
- &class_device_attrs[i]);
+ for (i = 0; i < ARRAY_SIZE(device_attrs); i++) {
+ err = device_create_file(&dev->dev, &device_attrs[i]);
if (err)
goto err_out_files;
}
- return class_dev;
+ return 0;
err_out_files:
if (i > 0)
for (j = 0; j < i; j++)
- class_device_remove_file(class_dev,
- &class_device_attrs[i]);
- class_device_unregister(class_dev);
+ device_remove_file(&dev->dev, &device_attrs[i]);
+ device_unregister(&dev->dev);
err_out:
- return ERR_PTR(err);
+
+ return err;
}
/**
- * drm_sysfs_device_remove - removes a class device that was created with drm_sysfs_device_add()
- * @dev: the dev_t of the device that was previously registered.
+ * drm_sysfs_device_remove - remove DRM device
+ * @dev: DRM device to remove
*
* This call unregisters and cleans up a class device that was created with a
* call to drm_sysfs_device_add()
*/
-void drm_sysfs_device_remove(struct class_device *class_dev)
+void drm_sysfs_device_remove(struct drm_device *dev)
{
int i;
- for (i = 0; i < ARRAY_SIZE(class_device_attrs); i++)
- class_device_remove_file(class_dev, &class_device_attrs[i]);
- class_device_unregister(class_dev);
+ for (i = 0; i < ARRAY_SIZE(device_attrs); i++)
+ device_remove_file(&dev->dev, &device_attrs[i]);
+ device_unregister(&dev->dev);
}
|
|
From: <ma...@ke...> - 2007-10-30 16:20:47
|
shared-core/nouveau_dma.c | 3
shared-core/nv20_graph.c | 2535 ----------------------------------------------
2 files changed, 18 insertions(+), 2520 deletions(-)
New commits:
commit 79744d730c90019edd367eee4a8ec1fa22d53402
Author: Stephane Marchesin <mar...@ic...>
Date: Tue Oct 30 16:55:17 2007 +0100
Nouveau: add a comment about SKIPS for next API breakage.
diff --git a/shared-core/nouveau_dma.c b/shared-core/nouveau_dma.c
index ab502e6..b33df58 100644
--- a/shared-core/nouveau_dma.c
+++ b/shared-core/nouveau_dma.c
@@ -29,6 +29,9 @@
#include "nouveau_drv.h"
#include "nouveau_dma.h"
+/* FIXME : should go into a nouveau_drm.h define ?
+ * (it's shared between DRI & DDX & DRM)
+ */
#define SKIPS 8
int
commit 0cebcd43dd7b950c07625601b87c72329857d831
Author: Stephane Marchesin <mar...@ic...>
Date: Tue Oct 30 16:54:57 2007 +0100
Nouveau: fold some loops.
diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c
index 94ce32c..e6ccf67 100644
--- a/shared-core/nv20_graph.c
+++ b/shared-core/nv20_graph.c
@@ -415,846 +415,11 @@ static void nv30_31_graph_context_init(struct drm_device *dev,
INSTANCE_WR(ctx, 0x860/4, 0x00010000);
for(i = 0x864; i< 0x874; i += 4)
INSTANCE_WR(ctx, i/4, 0x00040004);
- INSTANCE_WR(ctx, 0x1f18/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f1c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f20/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f28/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f2c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f30/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f38/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f3c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f40/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f48/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f4c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f50/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f58/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f5c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f60/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f68/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f6c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f70/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f78/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f7c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f80/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f88/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f8c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f90/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f98/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f9c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fa0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fa8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fb0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fb8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fbc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fc0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fc8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fcc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fd0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fd8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fdc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fe0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fe8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ff0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1ff8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ffc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2000/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2008/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x200c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2010/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2018/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x201c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2020/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2028/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x202c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2030/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2038/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x203c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2040/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2048/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x204c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2050/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2058/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x205c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2060/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2068/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x206c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2070/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2078/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x207c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2080/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2088/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x208c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2090/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2098/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x209c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2100/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2108/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x210c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2110/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2118/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x211c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2120/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2128/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x212c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2130/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2138/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x213c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2140/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2148/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x214c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2150/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2158/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x215c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2160/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2168/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x216c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2170/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2178/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x217c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2180/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2188/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x218c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2190/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2198/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x219c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x21a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x21a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x21ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x21b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x21b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x21bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x21c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x21c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x21cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x21d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x21d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x21dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x21e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x21e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x21ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x21f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x21f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x21fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2200/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2208/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x220c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2210/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2218/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x221c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2220/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2228/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x222c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2230/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2238/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x223c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2240/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2248/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x224c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2250/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2258/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x225c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2260/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2268/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x226c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2270/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2278/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x227c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2280/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2288/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x228c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2290/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2298/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x229c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x22a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x22a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x22ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x22b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x22b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x22bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x22c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x22c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x22cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x22d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x22d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x22dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x22e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x22e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x22ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x22f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x22f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x22fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2300/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2308/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x230c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2310/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2318/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x231c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2320/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2328/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x232c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2330/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2338/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x233c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2340/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2348/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x234c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2350/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2358/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x235c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2360/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2368/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x236c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2370/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2378/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x237c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2380/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2388/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x238c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2390/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2398/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x239c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x23a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x23a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x23ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x23b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x23b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x23bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x23c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x23c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x23cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x23d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x23d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x23dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x23e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x23e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x23ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x23f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x23f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x23fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2400/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2408/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x240c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2410/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2418/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x241c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2420/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2428/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x242c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2430/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2438/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x243c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2440/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2448/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x244c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2450/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2458/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x245c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2460/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2468/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x246c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2470/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2478/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x247c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2480/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2488/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x248c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2490/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2498/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x249c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x24a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x24a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x24ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x24b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x24b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x24bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x24c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x24c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x24cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x24d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x24d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x24dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x24e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x24e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x24ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x24f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x24f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x24fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2500/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2508/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x250c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2510/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2518/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x251c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2520/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2528/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x252c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2530/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2538/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x253c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2540/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2548/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x254c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2550/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2558/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x255c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2560/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2568/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x256c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2570/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2578/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x257c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2580/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2588/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x258c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2590/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2598/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x259c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x25a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x25a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x25ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x25b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x25b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x25bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x25c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x25c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x25cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x25d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x25d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x25dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x25e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x25e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x25ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x25f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x25f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x25fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2600/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2608/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x260c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2610/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2618/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x261c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2620/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2628/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x262c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2630/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2638/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x263c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2640/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2648/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x264c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2650/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2658/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x265c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2660/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2668/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x266c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2670/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2678/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x267c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2680/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2688/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x268c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2690/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2698/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x269c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x26a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x26a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x26ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x26b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x26b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x26bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x26c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x26c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x26cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x26d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x26d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x26dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x26e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x26e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x26ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x26f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x26f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x26fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2700/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2708/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x270c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2710/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2718/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x271c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2720/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2728/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x272c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2730/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2738/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x273c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2740/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2748/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x274c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2750/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2758/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x275c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2760/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2768/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x276c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2770/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2778/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x277c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2780/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2788/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x278c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2790/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2798/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x279c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x27a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x27a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x27ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x27b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x27b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x27bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x27c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x27c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x27cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x27d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x27d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x27dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x27e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x27e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x27ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x27f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x27f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x27fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2800/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2808/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x280c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2810/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2818/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x281c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2820/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2828/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x282c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2830/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2838/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x283c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2840/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2848/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x284c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2850/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2858/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x285c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2860/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2868/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x286c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2870/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2878/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x287c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2880/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2888/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x288c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2890/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2898/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x289c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x28a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x28a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x28ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x28b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x28b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x28bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x28c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x28c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x28cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x28d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x28d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x28dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x28e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x28e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x28ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x28f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x28f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x28fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2900/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2908/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x290c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2910/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2918/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x291c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2920/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2928/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x292c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2930/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2938/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x293c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2940/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2948/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x294c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2950/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2958/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x295c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2960/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2968/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x296c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2970/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2978/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x297c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2980/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2988/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x298c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2990/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2998/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x299c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x29a0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x29a8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x29ac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x29b0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x29b8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x29bc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x29c0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x29c8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x29cc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x29d0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x29d8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x29dc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x29e0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x29e8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x29ec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x29f0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x29f8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x29fc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a00/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a08/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a0c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a10/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a18/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a1c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a20/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a28/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a2c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a30/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a38/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a3c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a40/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a48/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a4c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a50/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a58/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a5c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a60/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a68/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a6c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a70/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a78/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a7c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a80/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a88/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a8c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2a90/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2a98/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2a9c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2aa0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2aa8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2aac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ab0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ab8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2abc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ac0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ac8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2acc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ad0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ad8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2adc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ae0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ae8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2aec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2af0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2af8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2afc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b00/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b08/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b0c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b10/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b18/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b1c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b20/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b28/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b2c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b30/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b38/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b3c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b40/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b48/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b4c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b50/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b58/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b5c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b60/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b68/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b6c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b70/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b78/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b7c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b80/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b88/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b8c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2b90/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2b98/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2b9c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ba0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ba8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2bac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2bb0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2bb8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2bbc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2bc0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2bc8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2bcc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2bd0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2bd8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2bdc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2be0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2be8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2bec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2bf0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2bf8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2bfc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c00/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c08/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c0c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c10/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c18/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c1c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c20/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c28/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c2c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c30/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c38/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c3c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c40/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c48/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c4c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c50/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c58/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c5c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c60/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c68/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c6c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c70/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c78/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c7c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c80/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c88/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c8c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2c90/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2c98/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2c9c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ca0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ca8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2cac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2cb0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2cb8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2cbc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2cc0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2cc8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2ccc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2cd0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2cd8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2cdc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ce0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ce8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2cec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2cf0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2cf8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2cfc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d00/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d08/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d0c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d10/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d18/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d1c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d20/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d28/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d2c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d30/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d38/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d3c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d40/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d48/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d4c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d50/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d58/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d5c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d60/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d68/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d6c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d70/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d78/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d7c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d80/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d88/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d8c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2d90/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2d98/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2d9c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2da0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2da8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2dac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2db0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2db8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2dbc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2dc0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2dc8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2dcc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2dd0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2dd8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2ddc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2de0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2de8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2dec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2df0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2df8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2dfc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e00/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e08/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e0c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e10/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e18/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e1c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e20/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e28/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e2c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e30/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e38/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e3c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e40/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e48/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e4c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e50/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e58/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e5c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e60/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e68/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e6c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e70/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e78/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e7c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e80/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e88/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e8c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2e90/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2e98/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2e9c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ea0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ea8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2eac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2eb0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2eb8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2ebc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ec0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ec8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2ecc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ed0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ed8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2edc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ee0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ee8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2eec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ef0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ef8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2efc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f00/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f08/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f0c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f10/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f18/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f1c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f20/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f28/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f2c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f30/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f38/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f3c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f40/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f48/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f4c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f50/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f58/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f5c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f60/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f68/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f6c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f70/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f78/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f7c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f80/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f88/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f8c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2f90/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2f98/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2f9c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2fa0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2fa8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2fac/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2fb0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2fb8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2fbc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2fc0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2fc8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2fcc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2fd0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2fd8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2fdc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2fe0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2fe8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2fec/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2ff0/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x2ff8/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2ffc/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3000/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3008/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x300c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3010/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3018/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x301c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3020/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3028/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x302c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3030/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3038/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x303c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3040/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3048/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x304c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3050/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3058/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x305c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3060/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3068/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x306c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3070/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3078/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x307c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3080/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x3088/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x308c/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x3090/4, 0x000c001b);
+ for(i = 0x1f18; i<= 0x3088 ; i+= 16) {
+ INSTANCE_WR(ctx, i/4 + 0, 0x10700ff9);
+ INSTANCE_WR(ctx, i/4 + 1, 0x0436086c);
+ INSTANCE_WR(ctx, i/4 + 2, 0x000c001b);
+ }
for(i = 0x30b8; i< 0x30c8; i += 4)
INSTANCE_WR(ctx, i/4, 0x0000ffff);
INSTANCE_WR(ctx, 0x344c/4, 0x3f800000);
@@ -1309,846 +474,11 @@ static void nv34_graph_context_init(struct drm_device *dev,
INSTANCE_WR(ctx, 0x854/4, 0x00010000);
for(i = 0x858; i< 0x868; i += 4)
INSTANCE_WR(ctx, i/4, 0x00040004);
- INSTANCE_WR(ctx, 0x15ac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x15b0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x15b4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x15bc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x15c0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x15c4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x15cc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x15d0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x15d4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x15dc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x15e0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x15e4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x15ec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x15f0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x15f4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x15fc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1600/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1604/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x160c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1610/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1614/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x161c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1620/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1624/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x162c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1630/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1634/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x163c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1640/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1644/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x164c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1650/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1654/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x165c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1660/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1664/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x166c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1670/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1674/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x167c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1680/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1684/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x168c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1690/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1694/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x169c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x16a0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x16a4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x16ac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x16b0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x16b4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x16bc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x16c0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x16c4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x16cc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x16d0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x16d4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x16dc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x16e0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x16e4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x16ec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x16f0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x16f4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x16fc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1700/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1704/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x170c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1710/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1714/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x171c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1720/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1724/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x172c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1730/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1734/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x173c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1740/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1744/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x174c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1750/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1754/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x175c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1760/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1764/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x176c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1770/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1774/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x177c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1780/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1784/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x178c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1790/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1794/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x179c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x17a0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x17a4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x17ac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x17b0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x17b4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x17bc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x17c0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x17c4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x17cc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x17d0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x17d4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x17dc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x17e0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x17e4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x17ec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x17f0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x17f4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x17fc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1800/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1804/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x180c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1810/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1814/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x181c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1820/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1824/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x182c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1830/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1834/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x183c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1840/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1844/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x184c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1850/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1854/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x185c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1860/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1864/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x186c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1870/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1874/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x187c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1880/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1884/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x188c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1890/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1894/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x189c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x18a0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x18a4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x18ac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x18b0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x18b4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x18bc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x18c0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x18c4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x18cc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x18d0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x18d4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x18dc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x18e0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x18e4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x18ec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x18f0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x18f4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x18fc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1900/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1904/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x190c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1910/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1914/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x191c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1920/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1924/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x192c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1930/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1934/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x193c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1940/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1944/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x194c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1950/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1954/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x195c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1960/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1964/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x196c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1970/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1974/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x197c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1980/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1984/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x198c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1990/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1994/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x199c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x19a0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x19a4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x19ac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x19b0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x19b4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x19bc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x19c0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x19c4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x19cc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x19d0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x19d4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x19dc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x19e0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x19e4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x19ec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x19f0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x19f4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x19fc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a00/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a04/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a0c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a10/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a14/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a1c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a20/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a24/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a2c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a30/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a34/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a3c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a40/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a44/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a4c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a50/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a54/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a5c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a60/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a64/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a6c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a70/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a74/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a7c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a80/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a84/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a8c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1a90/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1a94/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1a9c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1aa0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1aa4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1aac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ab0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ab4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1abc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ac0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ac4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1acc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ad0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ad4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1adc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ae0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ae4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1aec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1af0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1af4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1afc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b00/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b04/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b0c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b10/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b14/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b1c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b20/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b24/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b2c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b30/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b34/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b3c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b40/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b44/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b4c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b50/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b54/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b5c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b60/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b64/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b6c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b70/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b74/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b7c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b80/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b84/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b8c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1b90/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1b94/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1b9c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ba0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ba4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1bac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1bb0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1bb4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1bbc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1bc0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1bc4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1bcc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1bd0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1bd4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1bdc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1be0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1be4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1bec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1bf0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1bf4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1bfc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c00/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c04/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c0c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c10/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c14/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c1c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c20/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c24/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c2c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c30/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c34/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c3c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c40/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c44/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c4c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c50/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c54/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c5c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c60/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c64/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c6c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c70/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c74/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c7c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c80/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c84/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c8c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1c90/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1c94/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1c9c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ca0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ca4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1cac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1cb0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1cb4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1cbc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1cc0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1cc4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1ccc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1cd0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1cd4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1cdc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ce0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ce4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1cec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1cf0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1cf4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1cfc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d00/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d04/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d0c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d10/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d14/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d1c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d20/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d24/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d2c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d30/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d34/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d3c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d40/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d44/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d4c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d50/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d54/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d5c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d60/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d64/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d6c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d70/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d74/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d7c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d80/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d84/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d8c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1d90/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1d94/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1d9c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1da0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1da4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1dac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1db0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1db4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1dbc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1dc0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1dc4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1dcc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1dd0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1dd4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1ddc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1de0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1de4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1dec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1df0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1df4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1dfc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e00/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e04/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e0c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e10/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e14/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e1c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e20/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e24/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e2c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e30/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e34/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e3c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e40/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e44/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e4c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e50/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e54/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e5c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e60/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e64/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e6c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e70/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e74/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e7c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e80/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e84/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e8c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1e90/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1e94/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1e9c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ea0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ea4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1eac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1eb0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1eb4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1ebc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ec0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ec4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1ecc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ed0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ed4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1edc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ee0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ee4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1eec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ef0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ef4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1efc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f00/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f04/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f0c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f10/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f14/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f1c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f20/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f24/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f2c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f30/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f34/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f3c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f40/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f44/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f4c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f50/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f54/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f5c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f60/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f64/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f6c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f70/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f74/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f7c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f80/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f84/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f8c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1f90/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1f94/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1f9c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fa0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fa4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fb0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fb4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fbc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fc0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fc4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fcc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fd0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fd4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fdc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1fe0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1fe4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1fec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x1ff0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x1ff4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x1ffc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2000/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2004/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x200c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2010/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2014/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x201c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2020/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2024/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x202c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2030/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2034/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x203c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2040/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2044/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x204c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2050/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2054/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x205c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2060/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2064/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x206c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2070/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2074/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x207c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2080/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2084/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x208c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2090/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2094/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x209c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20a0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20a4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20ac/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20b0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20b4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20bc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20c0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20c4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20cc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20d0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20d4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20dc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20e0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20e4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20ec/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x20f0/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x20f4/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x20fc/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2100/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2104/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x210c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2110/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2114/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x211c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2120/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2124/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x212c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2130/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2134/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x213c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2140/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2144/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x214c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2150/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2154/4, 0x000c001b);
- INSTANCE_WR(ctx, 0x215c/4, 0x10700ff9);
- INSTANCE_WR(ctx, 0x2160/4, 0x0436086c);
- INSTANCE_WR(ctx, 0x2164/4...
[truncated message content] |
|
From: <ai...@ke...> - 2007-10-31 00:47:57
|
linux-core/Makefile.kernel | 2
linux-core/drm_stub.c | 9 +-
linux-core/i915_compat.c | 141 +++++++++++++++++++++++++++++++++++++++++++++
shared-core/i915_dma.c | 6 +
shared-core/i915_drv.h | 5 +
5 files changed, 158 insertions(+), 5 deletions(-)
New commits:
commit 2489062a3319c72197914ee06b089ae581c5f0a8
Author: Dave Airlie <ai...@re...>
Date: Wed Oct 31 11:27:44 2007 +1100
i915: add backwards compat chipset flushing code
diff --git a/linux-core/Makefile.kernel b/linux-core/Makefile.kernel
index 7913643..f1ae28e 100644
--- a/linux-core/Makefile.kernel
+++ b/linux-core/Makefile.kernel
@@ -19,7 +19,7 @@ r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o
mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o
i810-objs := i810_drv.o i810_dma.o
i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_fence.o \
- i915_buffer.o
+ i915_buffer.o i915_compat.o
nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
nouveau_object.o nouveau_irq.o nouveau_notifier.o nouveau_swmthd.o \
nouveau_sgdma.o nouveau_dma.o \
diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c
new file mode 100644
index 0000000..86eb1e1
--- /dev/null
+++ b/linux-core/i915_compat.c
@@ -0,0 +1,141 @@
+#include "drmP.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+
+#define PCI_DEVICE_ID_INTEL_82946GZ_HB 0x2970
+#define PCI_DEVICE_ID_INTEL_82965G_1_HB 0x2980
+#define PCI_DEVICE_ID_INTEL_82965Q_HB 0x2990
+#define PCI_DEVICE_ID_INTEL_82965G_HB 0x29A0
+#define PCI_DEVICE_ID_INTEL_82965GM_HB 0x2A00
+#define PCI_DEVICE_ID_INTEL_82965GME_HB 0x2A10
+#define PCI_DEVICE_ID_INTEL_82945GME_HB 0x27AC
+#define PCI_DEVICE_ID_INTEL_G33_HB 0x29C0
+#define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0
+#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0
+
+#define IS_I965 (agp_dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB)
+
+#define IS_G33 (agp_dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
+ agp_dev->device == PCI_DEVICE_ID_INTEL_Q33_HB)
+
+#define I915_IFPADDR 0x60
+#define I965_IFPADDR 0x70
+
+static struct _intel_private_compat {
+ void __iomem *flush_page;
+ struct resource ifp_resource;
+} intel_private;
+
+static void
+intel_compat_align_resource(void *data, struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ return;
+}
+
+
+static int intel_alloc_chipset_flush_resource(struct pci_dev *pdev)
+{
+ int ret;
+ ret = pci_bus_alloc_resource(pdev->bus, &intel_private.ifp_resource, PAGE_SIZE,
+ PAGE_SIZE, PCIBIOS_MIN_MEM, 0,
+ intel_compat_align_resource, pdev);
+ if (ret != 0)
+ return ret;
+
+ return 0;
+}
+
+static void intel_i915_setup_chipset_flush(struct pci_dev *pdev)
+{
+ int ret;
+ u32 temp;
+
+ pci_read_config_dword(pdev, I915_IFPADDR, &temp);
+ if (!(temp & 0x1)) {
+ intel_alloc_chipset_flush_resource(pdev);
+
+ pci_write_config_dword(pdev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
+ } else {
+ temp &= ~1;
+
+ intel_private.ifp_resource.start = temp;
+ intel_private.ifp_resource.end = temp + PAGE_SIZE;
+ ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
+ if (ret) {
+ intel_private.ifp_resource.start = 0;
+ printk("Failed inserting resource into tree\n");
+ }
+ }
+}
+
+static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev)
+{
+ u32 temp_hi, temp_lo;
+ int ret;
+
+ pci_read_config_dword(pdev, I965_IFPADDR + 4, &temp_hi);
+ pci_read_config_dword(pdev, I965_IFPADDR, &temp_lo);
+
+ if (!(temp_lo & 0x1)) {
+
+ intel_alloc_chipset_flush_resource(pdev);
+
+ pci_write_config_dword(pdev, I965_IFPADDR + 4, (intel_private.ifp_resource.start >> 32));
+ pci_write_config_dword(pdev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
+ intel_private.flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE);
+ } else {
+ u64 l64;
+
+ temp_lo &= ~0x1;
+ l64 = ((u64)temp_hi << 32) | temp_lo;
+
+ intel_private.ifp_resource.start = l64;
+ intel_private.ifp_resource.end = l64 + PAGE_SIZE;
+ ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
+ if (!ret) {
+ intel_private.ifp_resource.start = 0;
+ printk("Failed inserting resource into tree\n");
+ }
+ }
+}
+
+void intel_init_chipset_flush_compat(struct drm_device *dev)
+{
+ struct pci_dev *agp_dev = dev->agp->agp_info.device;
+
+ intel_private.ifp_resource.name = "GMCH IFPBAR";
+ intel_private.ifp_resource.flags = IORESOURCE_MEM;
+
+ /* Setup chipset flush for 915 */
+ if (IS_I965 || IS_G33) {
+ intel_i965_g33_setup_chipset_flush(agp_dev);
+ } else {
+ intel_i915_setup_chipset_flush(agp_dev);
+ }
+
+ if (intel_private.ifp_resource.start) {
+ intel_private.flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE);
+ if (!intel_private.flush_page)
+ printk("unable to ioremap flush page - no chipset flushing");
+ }
+}
+
+void intel_fini_chipset_flush_compat(struct drm_device *dev)
+{
+ iounmap(intel_private.flush_page);
+ release_resource(&intel_private.ifp_resource);
+}
+
+void drm_agp_chipset_flush(struct drm_device *dev)
+{
+ if (intel_private.flush_page)
+ writel(1, intel_private.flush_page);
+}
+#endif
diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
index 24a4ec4..5d0c000 100644
--- a/shared-core/i915_dma.c
+++ b/shared-core/i915_dma.c
@@ -1317,6 +1317,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
ret = drm_addmap(dev, base, size, _DRM_REGISTERS, _DRM_KERNEL,
&dev_priv->mmio_map);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+ intel_init_chipset_flush_compat(dev);
+#endif
return ret;
}
@@ -1329,6 +1332,9 @@ int i915_driver_unload(struct drm_device *dev)
drm_free(dev->dev_private, sizeof(drm_i915_private_t),
DRM_MEM_DRIVER);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+ intel_fini_chipset_flush_compat(dev);
+#endif
return 0;
}
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index 9f69d84..6ff34eb 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -313,6 +313,11 @@ extern int i915_move(struct drm_buffer_object *bo, int evict,
void i915_flush_ttm(struct drm_ttm *ttm);
#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+extern void intel_init_chipset_flush_compat(struct drm_device *dev);
+extern void intel_fini_chipset_flush_compat(struct drm_device *dev);
+#endif
+
#define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg))
#define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
#define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg))
commit c106a7d8b9ddc1f6da3d462e3114af2ca72b3b46
Author: Dave Airlie <ai...@re...>
Date: Wed Oct 31 11:21:05 2007 +1100
drm: call driver load after initing agp subsystem
diff --git a/linux-core/drm_stub.c b/linux-core/drm_stub.c
index 1d88d37..dabd174 100644
--- a/linux-core/drm_stub.c
+++ b/linux-core/drm_stub.c
@@ -111,10 +111,6 @@ static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev,
dev->driver = driver;
- if (dev->driver->load)
- if ((retcode = dev->driver->load(dev, ent->driver_data)))
- goto error_out_unreg;
-
if (drm_core_has_AGP(dev)) {
if (drm_device_is_agp(dev))
dev->agp = drm_agp_init(dev);
@@ -134,6 +130,11 @@ static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev,
}
}
+ if (dev->driver->load)
+ if ((retcode = dev->driver->load(dev, ent->driver_data)))
+ goto error_out_unreg;
+
+
retcode = drm_ctxbitmap_init(dev);
if (retcode) {
DRM_ERROR("Cannot allocate memory for context bitmap.\n");
|
|
From: <jk...@ke...> - 2007-11-01 00:14:10
|
linux-core/Makefile.kernel | 2 +-
linux-core/nouveau_drv.c | 22 ++++++++++++++++++++++
shared-core/nouveau_drv.h | 18 ++++++++++++++++++
3 files changed, 41 insertions(+), 1 deletion(-)
New commits:
commit 9416541fb29666c630f2bcfcc0f3ae0b6c4436d8
Merge: 31847b4... 61cbcb5...
Author: Jeremy Kolb <jk...@br...>
Date: Wed Oct 31 20:14:48 2007 -0400
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm
commit 31847b4b62575739a164e019b33ced0531683403
Author: Jeremy Kolb <jk...@br...>
Date: Wed Oct 31 20:13:01 2007 -0400
nouveau: ttm stubs
diff --git a/linux-core/Makefile.kernel b/linux-core/Makefile.kernel
index f1ae28e..bcbd78f 100644
--- a/linux-core/Makefile.kernel
+++ b/linux-core/Makefile.kernel
@@ -22,7 +22,7 @@ i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_fence.o \
i915_buffer.o i915_compat.o
nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
nouveau_object.o nouveau_irq.o nouveau_notifier.o nouveau_swmthd.o \
- nouveau_sgdma.o nouveau_dma.o \
+ nouveau_sgdma.o nouveau_dma.o nouveau_buffer.o \
nv04_timer.o \
nv04_mc.o nv40_mc.o nv50_mc.o \
nv04_fb.o nv10_fb.o nv40_fb.o \
diff --git a/linux-core/nouveau_drv.c b/linux-core/nouveau_drv.c
index 01de67d..9e6c8f4 100644
--- a/linux-core/nouveau_drv.c
+++ b/linux-core/nouveau_drv.c
@@ -41,6 +41,25 @@ static struct pci_device_id pciidlist[] = {
}
};
+#ifdef NOUVEAU_HAVE_BUFFER
+static uint32_t nouveau_mem_prios[] = { DRM_BO_MEM_VRAM, DRM_BO_MEM_TT, DRM_BO_MEM_LOCAL };
+static uint32_t nouveau_busy_prios[] = { DRM_BO_MEM_TT, DRM_BO_MEM_LOCAL };
+
+static struct drm_bo_driver nouveau_bo_driver = {
+ .mem_type_prio = nouveau_mem_prios,
+ .mem_busy_prio = nouveau_busy_prios,
+ .num_mem_type_prio = sizeof(nouveau_mem_prios)/sizeof(uint32_t),
+ .num_mem_busy_prio = sizeof(nouveau_busy_prios)/sizeof(uint32_t),
+ .create_ttm_backend_entry = nouveau_create_ttm_backend_entry,
+ .fence_type = nouveau_fence_types,
+ .invalidate_caches = nouveau_invalidate_caches,
+ .init_mem_type = nouveau_init_mem_type,
+ .evict_mask = nouveau_evict_mask,
+ .move = nouveau_move,
+ .ttm_cache_flush= nouveau_flush_ttm
+};
+#endif
+
extern struct drm_ioctl_desc nouveau_ioctls[];
extern int nouveau_max_ioctl;
@@ -80,6 +99,9 @@ static struct drm_driver driver = {
.probe = probe,
.remove = __devexit_p(drm_cleanup_pci),
},
+#ifdef NOUVEAU_HAVE_BUFFER
+ .bo_driver = &nouveau_bo_driver,
+#endif
.name = DRIVER_NAME,
.desc = DRIVER_DESC,
diff --git a/shared-core/nouveau_drv.h b/shared-core/nouveau_drv.h
index e5cef07..41258a5 100644
--- a/shared-core/nouveau_drv.h
+++ b/shared-core/nouveau_drv.h
@@ -39,9 +39,16 @@
#define NOUVEAU_FAMILY 0x0000FFFF
#define NOUVEAU_FLAGS 0xFFFF0000
+#if 0
+#if defined(__linux__)
+#define NOUVEAU_HAVE_BUFFER
+#endif
+#endif
+
#include "nouveau_drm.h"
#include "nouveau_reg.h"
+
struct mem_block {
struct mem_block *next;
struct mem_block *prev;
@@ -553,6 +560,17 @@ extern void nv04_timer_takedown(struct drm_device *);
extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
unsigned long arg);
+#ifdef NOUVEAU_HAVE_BUFFER
+/* nouveau_buffer.c */
+extern struct drm_ttm_backend *nouveau_create_ttm_backend_entry(struct drm_device *dev);
+extern int nouveau_fence_types(struct drm_buffer_object *bo, uint32_t *fclass, uint32_t *type);
+extern int nouveau_invalidate_caches(struct drm_device *dev, uint64_t buffer_flags);
+extern int nouveau_init_mem_type(struct drm_device *dev, uint32_t type, struct drm_mem_type_manager *man);
+extern uint32_t nouveau_evict_mask(struct drm_buffer_object *bo);
+extern int nouveau_move(struct drm_buffer_object *bo, int evict, int no_wait, struct drm_bo_mem_reg *new_mem);
+void nouveau_flush_ttm(struct drm_ttm *ttm);
+#endif
+
#if defined(__powerpc__)
#define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
#define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
|
|
From: <th...@ke...> - 2007-11-02 20:52:03
|
libdrm/xf86drm.c | 104 +++++++++++++++++++++--------------
linux-core/drm_bo.c | 90 ++++++++++++++++++++++++------
linux-core/drm_objects.h | 23 ++++++-
linux-core/drm_ttm.c | 138 ++++++++++++++++++++++++++++++++++++++---------
4 files changed, 263 insertions(+), 92 deletions(-)
New commits:
commit 94c22c334948a49641f4a1fa84687f992e5cc5cb
Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
Date: Fri Nov 2 16:03:41 2007 +0100
User buffer support.
diff --git a/libdrm/xf86drm.c b/libdrm/xf86drm.c
index 5a4071b..165cb2f 100644
--- a/libdrm/xf86drm.c
+++ b/libdrm/xf86drm.c
@@ -2612,9 +2612,9 @@ int drmBOCreate(int fd, unsigned long size,
ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_CREATE, &arg);
if (ret)
return ret;
-
+
drmBOCopyReply(rep, buf);
- buf->mapVirtual = NULL;
+ buf->virtual = user_buffer;
buf->mapCount = 0;
return 0;
@@ -2644,7 +2644,7 @@ int drmBOUnreference(int fd, drmBO *buf)
{
struct drm_bo_handle_arg arg;
- if (buf->mapVirtual) {
+ if (buf->mapVirtual && buf->mapHandle) {
(void) munmap(buf->mapVirtual, buf->start + buf->size);
buf->mapVirtual = NULL;
buf->virtual = NULL;
diff --git a/linux-core/drm_bo.c b/linux-core/drm_bo.c
index dc96e8a..ea680a1 100644
--- a/linux-core/drm_bo.c
+++ b/linux-core/drm_bo.c
@@ -137,9 +137,9 @@ static int drm_bo_add_ttm(struct drm_buffer_object * bo)
{
struct drm_device *dev = bo->dev;
int ret = 0;
- bo->ttm = NULL;
DRM_ASSERT_LOCKED(&bo->mutex);
+ bo->ttm = NULL;
switch (bo->type) {
case drm_bo_type_dc:
@@ -149,6 +149,18 @@ static int drm_bo_add_ttm(struct drm_buffer_object * bo)
ret = -ENOMEM;
break;
case drm_bo_type_user:
+ bo->ttm = drm_ttm_init(dev, bo->num_pages << PAGE_SHIFT);
+ if (!bo->ttm)
+ ret = -ENOMEM;
+
+ ret = drm_ttm_set_user(bo->ttm, current,
+ bo->mem.mask & DRM_BO_FLAG_WRITE,
+ bo->buffer_start,
+ bo->num_pages,
+ dev->bm.dummy_read_page);
+ if (ret)
+ return ret;
+
break;
default:
DRM_ERROR("Illegal buffer object type\n");
@@ -784,12 +796,15 @@ static int drm_bo_mem_force_space(struct drm_device * dev,
}
static int drm_bo_mt_compatible(struct drm_mem_type_manager * man,
+ int disallow_fixed,
uint32_t mem_type,
uint64_t mask, uint32_t * res_mask)
{
uint64_t cur_flags = drm_bo_type_flags(mem_type);
uint64_t flag_diff;
+ if ((man->flags & _DRM_FLAG_MEMTYPE_FIXED) && disallow_fixed)
+ return 0;
if (man->flags & _DRM_FLAG_MEMTYPE_CACHED)
cur_flags |= DRM_BO_FLAG_CACHED;
if (man->flags & _DRM_FLAG_MEMTYPE_MAPPABLE)
@@ -854,7 +869,9 @@ int drm_bo_mem_space(struct drm_buffer_object * bo,
mem_type = prios[i];
man = &bm->man[mem_type];
- type_ok = drm_bo_mt_compatible(man, mem_type, mem->mask,
+ type_ok = drm_bo_mt_compatible(man,
+ bo->type == drm_bo_type_user,
+ mem_type, mem->mask,
&cur_flags);
if (!type_ok)
@@ -903,7 +920,11 @@ int drm_bo_mem_space(struct drm_buffer_object * bo,
if (!man->has_type)
continue;
- if (!drm_bo_mt_compatible(man, mem_type, mem->mask, &cur_flags))
+ if (!drm_bo_mt_compatible(man,
+ bo->type == drm_bo_type_user,
+ mem_type,
+ mem->mask,
+ &cur_flags))
continue;
ret = drm_bo_mem_force_space(dev, mem, mem_type, no_wait);
@@ -928,8 +949,10 @@ static int drm_bo_new_mask(struct drm_buffer_object * bo,
{
uint32_t new_props;
- if (bo->type == drm_bo_type_user) {
- DRM_ERROR("User buffers are not supported yet.\n");
+ if (bo->type == drm_bo_type_user &&
+ ((used_mask & (DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING)) !=
+ (DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING))) {
+ DRM_ERROR("User buffers require cache-coherent memory.\n");
return -EINVAL;
}
@@ -1120,7 +1143,12 @@ static void drm_bo_fill_rep_arg(struct drm_buffer_object * bo,
rep->flags = bo->mem.flags;
rep->size = bo->num_pages * PAGE_SIZE;
rep->offset = bo->offset;
- rep->arg_handle = bo->map_list.user_token;
+
+ if (bo->type == drm_bo_type_dc)
+ rep->arg_handle = bo->map_list.user_token;
+ else
+ rep->arg_handle = 0;
+
rep->mask = bo->mem.mask;
rep->buffer_start = bo->buffer_start;
rep->fence_flags = bo->fence_type;
@@ -1619,10 +1647,7 @@ int drm_buffer_object_create(struct drm_device *dev,
int ret = 0;
unsigned long num_pages;
- if (buffer_start & ~PAGE_MASK) {
- DRM_ERROR("Invalid buffer object start.\n");
- return -EINVAL;
- }
+ size += buffer_start & ~PAGE_MASK;
num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
if (num_pages == 0) {
DRM_ERROR("Illegal buffer object size.\n");
@@ -1648,23 +1673,20 @@ int drm_buffer_object_create(struct drm_device *dev,
INIT_LIST_HEAD(&bo->vma_list);
#endif
bo->dev = dev;
- if (buffer_start != 0)
- bo->type = drm_bo_type_user;
- else
- bo->type = type;
+ bo->type = type;
bo->num_pages = num_pages;
bo->mem.mem_type = DRM_BO_MEM_LOCAL;
bo->mem.num_pages = bo->num_pages;
bo->mem.mm_node = NULL;
bo->mem.page_alignment = page_alignment;
- bo->buffer_start = buffer_start;
+ bo->buffer_start = buffer_start & PAGE_MASK;
bo->priv_flags = 0;
- bo->mem.flags = DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_CACHED |
+ bo->mem.flags = DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_CACHED |
DRM_BO_FLAG_MAPPABLE;
bo->mem.mask = DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_CACHED |
DRM_BO_FLAG_MAPPABLE;
atomic_inc(&bm->count);
- ret = drm_bo_new_mask(bo, mask, hint);
+ ret = drm_bo_new_mask(bo, mask, mask);
if (ret)
goto out_err;
@@ -1720,6 +1742,7 @@ int drm_bo_create_ioctl(struct drm_device *dev, void *data, struct drm_file *fil
struct drm_bo_create_req *req = &arg->d.req;
struct drm_bo_info_rep *rep = &arg->d.rep;
struct drm_buffer_object *entry;
+ enum drm_bo_type bo_type;
int ret = 0;
DRM_DEBUG("drm_bo_create_ioctl: %dkb, %dkb align\n",
@@ -1730,8 +1753,13 @@ int drm_bo_create_ioctl(struct drm_device *dev, void *data, struct drm_file *fil
return -EINVAL;
}
+ bo_type = (req->buffer_start) ? drm_bo_type_user : drm_bo_type_dc;
+
+ if (bo_type == drm_bo_type_user)
+ req->mask &= ~DRM_BO_FLAG_SHAREABLE;
+
ret = drm_buffer_object_create(file_priv->head->dev,
- req->size, drm_bo_type_dc, req->mask,
+ req->size, bo_type, req->mask,
req->hint, req->page_alignment,
req->buffer_start, &entry);
if (ret)
@@ -2186,6 +2214,13 @@ int drm_bo_driver_finish(struct drm_device * dev)
DRM_DEBUG("Unfenced list was clean\n");
}
out:
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
+ unlock_page(bm->dummy_read_page);
+#else
+ ClearPageReserved(bm->dummy_read_page);
+#endif
+ __free_page(bm->dummy_read_page);
mutex_unlock(&dev->struct_mutex);
return ret;
}
@@ -2203,11 +2238,24 @@ int drm_bo_driver_init(struct drm_device * dev)
struct drm_buffer_manager *bm = &dev->bm;
int ret = -EINVAL;
+ bm->dummy_read_page = NULL;
drm_bo_init_lock(&bm->bm_lock);
mutex_lock(&dev->struct_mutex);
if (!driver)
goto out_unlock;
+ bm->dummy_read_page = alloc_page(__GFP_ZERO | GFP_DMA32);
+ if (!bm->dummy_read_page) {
+ ret = -ENOMEM;
+ goto out_unlock;
+ }
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
+ SetPageLocked(bm->dummy_read_page);
+#else
+ SetPageReserved(bm->dummy_read_page);
+#endif
+
/*
* Initialize the system memory buffer type.
* Other types need to be driver / IOCTL initialized.
@@ -2462,11 +2510,15 @@ void drm_bo_unmap_virtual(struct drm_buffer_object * bo)
static void drm_bo_takedown_vm_locked(struct drm_buffer_object * bo)
{
- struct drm_map_list *list = &bo->map_list;
+ struct drm_map_list *list;
drm_local_map_t *map;
struct drm_device *dev = bo->dev;
DRM_ASSERT_LOCKED(&dev->struct_mutex);
+ if (bo->type != drm_bo_type_dc)
+ return;
+
+ list = &bo->map_list;
if (list->user_token) {
drm_ht_remove_item(&dev->map_hash, &list->hash);
list->user_token = 0;
diff --git a/linux-core/drm_objects.h b/linux-core/drm_objects.h
index cea811e..0a05e5f 100644
--- a/linux-core/drm_objects.h
+++ b/linux-core/drm_objects.h
@@ -275,6 +275,8 @@ typedef struct drm_ttm_backend {
} drm_ttm_backend_t;
struct drm_ttm {
+ struct mm_struct *user_mm;
+ struct page *dummy_read_page;
struct page **pages;
uint32_t page_flags;
unsigned long num_pages;
@@ -300,6 +302,12 @@ extern void drm_ttm_fixup_caching(struct drm_ttm * ttm);
extern struct page *drm_ttm_get_page(struct drm_ttm * ttm, int index);
extern void drm_ttm_cache_flush(void);
extern int drm_ttm_populate(struct drm_ttm * ttm);
+extern int drm_ttm_set_user(struct drm_ttm *ttm,
+ struct task_struct *tsk,
+ int write,
+ unsigned long start,
+ unsigned long num_pages,
+ struct page *dummy_read_page);
/*
* Destroy a ttm. The user normally calls drmRmMap or a similar IOCTL to do this,
@@ -320,11 +328,15 @@ extern int drm_destroy_ttm(struct drm_ttm * ttm);
* Page flags.
*/
-#define DRM_TTM_PAGE_UNCACHED 0x01
-#define DRM_TTM_PAGE_USED 0x02
-#define DRM_TTM_PAGE_BOUND 0x04
-#define DRM_TTM_PAGE_PRESENT 0x08
-#define DRM_TTM_PAGE_VMALLOC 0x10
+#define DRM_TTM_PAGE_UNCACHED (1 << 0)
+#define DRM_TTM_PAGE_USED (1 << 1)
+#define DRM_TTM_PAGE_BOUND (1 << 2)
+#define DRM_TTM_PAGE_PRESENT (1 << 3)
+#define DRM_TTM_PAGE_VMALLOC (1 << 4)
+#define DRM_TTM_PAGE_USER (1 << 5)
+#define DRM_TTM_PAGE_USER_WRITE (1 << 6)
+#define DRM_TTM_PAGE_USER_DIRTY (1 << 7)
+#define DRM_TTM_PAGE_USER_DMA (1 << 8)
/***************************************************
* Buffer objects. (drm_bo.c, drm_bo_move.c)
@@ -447,6 +459,7 @@ struct drm_buffer_manager {
uint32_t fence_type;
unsigned long cur_pages;
atomic_t count;
+ struct page *dummy_read_page;
};
struct drm_bo_driver {
diff --git a/linux-core/drm_ttm.c b/linux-core/drm_ttm.c
index fd03f6e..4d51f9f 100644
--- a/linux-core/drm_ttm.c
+++ b/linux-core/drm_ttm.c
@@ -139,15 +139,74 @@ static int drm_set_caching(struct drm_ttm * ttm, int noncached)
return 0;
}
+
+static void drm_ttm_free_user_pages(struct drm_ttm *ttm)
+{
+ struct mm_struct *mm = ttm->user_mm;
+ int write;
+ int dirty;
+ struct page *page;
+ int i;
+
+ BUG_ON(!(ttm->page_flags & DRM_TTM_PAGE_USER));
+ write = ((ttm->page_flags & DRM_TTM_PAGE_USER_WRITE) != 0);
+ dirty = ((ttm->page_flags & DRM_TTM_PAGE_USER_DIRTY) != 0);
+
+ down_read(&mm->mmap_sem);
+ for (i=0; i<ttm->num_pages; ++i) {
+ page = ttm->pages[i];
+ if (page == NULL)
+ continue;
+
+ if (page == ttm->dummy_read_page) {
+ BUG_ON(write);
+ continue;
+ }
+
+ if (write && dirty && !PageReserved(page))
+ SetPageDirty(page);
+
+ ttm->pages[i] = NULL;
+ page_cache_release(page);
+ }
+ up_read(&mm->mmap_sem);
+}
+
+static void drm_ttm_free_alloced_pages(struct drm_ttm *ttm)
+{
+ int i;
+ struct drm_buffer_manager *bm = &ttm->dev->bm;
+ struct page **cur_page;
+
+ for (i = 0; i < ttm->num_pages; ++i) {
+ cur_page = ttm->pages + i;
+ if (*cur_page) {
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
+ unlock_page(*cur_page);
+#else
+ ClearPageReserved(*cur_page);
+#endif
+ if (page_count(*cur_page) != 1) {
+ DRM_ERROR("Erroneous page count. "
+ "Leaking pages.\n");
+ }
+ if (page_mapped(*cur_page)) {
+ DRM_ERROR("Erroneous map count. "
+ "Leaking page mappings.\n");
+ }
+ __free_page(*cur_page);
+ drm_free_memctl(PAGE_SIZE);
+ --bm->cur_pages;
+ }
+ }
+}
+
/*
* Free all resources associated with a ttm.
*/
int drm_destroy_ttm(struct drm_ttm * ttm)
{
-
- int i;
- struct page **cur_page;
struct drm_ttm_backend *be;
if (!ttm)
@@ -160,31 +219,14 @@ int drm_destroy_ttm(struct drm_ttm * ttm)
}
if (ttm->pages) {
- struct drm_buffer_manager *bm = &ttm->dev->bm;
if (ttm->page_flags & DRM_TTM_PAGE_UNCACHED)
drm_set_caching(ttm, 0);
- for (i = 0; i < ttm->num_pages; ++i) {
- cur_page = ttm->pages + i;
- if (*cur_page) {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
- unlock_page(*cur_page);
-#else
- ClearPageReserved(*cur_page);
-#endif
- if (page_count(*cur_page) != 1) {
- DRM_ERROR("Erroneous page count. "
- "Leaking pages.\n");
- }
- if (page_mapped(*cur_page)) {
- DRM_ERROR("Erroneous map count. "
- "Leaking page mappings.\n");
- }
- __free_page(*cur_page);
- drm_free_memctl(PAGE_SIZE);
- --bm->cur_pages;
- }
- }
+ if (ttm->page_flags & DRM_TTM_PAGE_USER)
+ drm_ttm_free_user_pages(ttm);
+ else
+ drm_ttm_free_alloced_pages(ttm);
+
ttm_free_pages(ttm);
}
@@ -209,6 +251,49 @@ struct page *drm_ttm_get_page(struct drm_ttm * ttm, int index)
}
EXPORT_SYMBOL(drm_ttm_get_page);
+
+
+
+int drm_ttm_set_user(struct drm_ttm *ttm,
+ struct task_struct *tsk,
+ int write,
+ unsigned long start,
+ unsigned long num_pages,
+ struct page *dummy_read_page)
+{
+ struct mm_struct *mm = tsk->mm;
+ int ret;
+ int i;
+
+ BUG_ON(num_pages != ttm->num_pages);
+
+ ttm->user_mm = mm;
+ ttm->dummy_read_page = dummy_read_page;
+ ttm->page_flags = DRM_TTM_PAGE_USER |
+ ((write) ? DRM_TTM_PAGE_USER_WRITE : 0);
+
+
+ down_read(&mm->mmap_sem);
+ ret = get_user_pages(tsk, mm, start, num_pages,
+ write, 0, ttm->pages, NULL);
+ up_read(&mm->mmap_sem);
+
+ if (ret != num_pages && write) {
+ drm_ttm_free_user_pages(ttm);
+ return -ENOMEM;
+ }
+
+ for (i=0; i<num_pages; ++i) {
+ if (ttm->pages[i] == NULL) {
+ ttm->pages[i] = ttm->dummy_read_page;
+ }
+ }
+
+ return 0;
+}
+
+
+
int drm_ttm_populate(struct drm_ttm * ttm)
{
struct page *page;
@@ -340,7 +425,8 @@ int drm_bind_ttm(struct drm_ttm * ttm, struct drm_bo_mem_reg *bo_mem)
}
ttm->state = ttm_bound;
-
+ if (ttm->page_flags & DRM_TTM_PAGE_USER)
+ ttm->page_flags |= DRM_TTM_PAGE_USER_DIRTY;
return 0;
}
commit c06808fb6521822238bca4574758f30246b71c2d
Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
Date: Fri Nov 2 15:52:00 2007 +0100
Return fence errors.
Time out properly in the presence of signals.
diff --git a/libdrm/xf86drm.c b/libdrm/xf86drm.c
index 7001a0e..5a4071b 100644
--- a/libdrm/xf86drm.c
+++ b/libdrm/xf86drm.c
@@ -2432,7 +2432,7 @@ int drmFenceFlush(int fd, drmFence *fence, unsigned flush_type)
fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->signaled = arg.signaled;
- return 0;
+ return arg.error;
}
int drmFenceUpdate(int fd, drmFence *fence)
@@ -2495,7 +2495,50 @@ int drmFenceEmit(int fd, unsigned flags, drmFence *fence, unsigned emit_type)
* DRM_FENCE_FLAG_WAIT_LAZY
* DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS
*/
+
+#define DRM_IOCTL_TIMEOUT_USEC 3000000UL
+
+static unsigned long
+drmTimeDiff(struct timeval *now, struct timeval *then)
+{
+ uint64_t val;
+
+ val = now->tv_sec - then->tv_sec;
+ val *= 1000000LL;
+ val += now->tv_usec;
+ val -= then->tv_usec;
+
+ return (unsigned long) val;
+}
+
+static int
+drmIoctlTimeout(int fd, unsigned long request, void *argp)
+{
+ int haveThen = 0;
+ struct timeval then, now;
+ int ret;
+
+ do {
+ ret = ioctl(fd, request, argp);
+ if (ret != 0 && errno == EAGAIN) {
+ if (!haveThen) {
+ gettimeofday(&then, NULL);
+ haveThen = 1;
+ }
+ gettimeofday(&now, NULL);
+ }
+ } while (ret != 0 && errno == EAGAIN &&
+ drmTimeDiff(&now, &then) < DRM_IOCTL_TIMEOUT_USEC);
+
+ if (ret != 0)
+ return ((errno == EAGAIN) ? -EBUSY : -errno);
+
+ return 0;
+}
+
+
+
int drmFenceWait(int fd, unsigned flags, drmFence *fence, unsigned flush_type)
{
drm_fence_arg_t arg;
@@ -2516,17 +2559,15 @@ int drmFenceWait(int fd, unsigned flags, drmFence *fence, unsigned flush_type)
arg.type = flush_type;
arg.flags = flags;
- do {
- ret = ioctl(fd, DRM_IOCTL_FENCE_WAIT, &arg);
- } while (ret != 0 && errno == EAGAIN);
+ ret = drmIoctlTimeout(fd, DRM_IOCTL_FENCE_WAIT, &arg);
if (ret)
- return -errno;
+ return ret;
fence->fence_class = arg.fence_class;
fence->type = arg.type;
fence->signaled = arg.signaled;
- return 0;
+ return arg.error;
}
static void drmBOCopyReply(const struct drm_bo_info_rep *rep, drmBO *buf)
@@ -2568,12 +2609,9 @@ int drmBOCreate(int fd, unsigned long size,
buf->virtual = NULL;
- do {
- ret = ioctl(fd, DRM_IOCTL_BO_CREATE, &arg);
- } while (ret != 0 && errno == EAGAIN);
-
+ ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_CREATE, &arg);
if (ret)
- return -errno;
+ return ret;
drmBOCopyReply(rep, buf);
buf->mapVirtual = NULL;
@@ -2665,12 +2703,9 @@ int drmBOMap(int fd, drmBO *buf, unsigned mapFlags, unsigned mapHint,
* This IOCTL synchronizes the buffer.
*/
- do {
- ret = ioctl(fd, DRM_IOCTL_BO_MAP, &arg);
- } while (ret != 0 && errno == EAGAIN);
-
- if (ret)
- return -errno;
+ ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_MAP, &arg);
+ if (ret)
+ return ret;
drmBOCopyReply(rep, buf);
buf->mapFlags = mapFlags;
@@ -2715,14 +2750,12 @@ int drmBOSetStatus(int fd, drmBO *buf,
req->desired_tile_stride = desired_tile_stride;
req->tile_info = tile_info;
- do {
- ret = ioctl(fd, DRM_IOCTL_BO_SETSTATUS, &arg);
- } while (ret && errno == EAGAIN);
-
+ ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_SETSTATUS, &arg);
if (ret)
- return -errno;
+ return ret;
drmBOCopyReply(rep, buf);
+ return 0;
}
@@ -2757,12 +2790,9 @@ int drmBOWaitIdle(int fd, drmBO *buf, unsigned hint)
req->handle = buf->handle;
req->hint = hint;
- do {
- ret = ioctl(fd, DRM_IOCTL_BO_WAIT_IDLE, &arg);
- } while (ret && errno == EAGAIN);
-
+ ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_WAIT_IDLE, &arg);
if (ret)
- return -errno;
+ return ret;
drmBOCopyReply(rep, buf);
}
@@ -2824,35 +2854,25 @@ int drmMMTakedown(int fd, unsigned memType)
int drmMMLock(int fd, unsigned memType, int lockBM, int ignoreNoEvict)
{
struct drm_mm_type_arg arg;
- int ret;
memset(&arg, 0, sizeof(arg));
arg.mem_type = memType;
arg.lock_flags |= (lockBM) ? DRM_BO_LOCK_UNLOCK_BM : 0;
arg.lock_flags |= (ignoreNoEvict) ? DRM_BO_LOCK_IGNORE_NO_EVICT : 0;
- do{
- ret = ioctl(fd, DRM_IOCTL_MM_LOCK, &arg);
- } while (ret && errno == EAGAIN);
-
- return (ret) ? -errno : 0;
+ return drmIoctlTimeout(fd, DRM_IOCTL_MM_LOCK, &arg);
}
int drmMMUnlock(int fd, unsigned memType, int unlockBM)
{
struct drm_mm_type_arg arg;
- int ret;
memset(&arg, 0, sizeof(arg));
arg.mem_type = memType;
arg.lock_flags |= (unlockBM) ? DRM_BO_LOCK_UNLOCK_BM : 0;
- do{
- ret = ioctl(fd, DRM_IOCTL_MM_UNLOCK, &arg);
- } while (ret && errno == EAGAIN);
-
- return (ret) ? -errno : 0;
+ return drmIoctlTimeout(fd, DRM_IOCTL_MM_UNLOCK, &arg);
}
int drmBOVersion(int fd, unsigned int *major,
|
|
From: <th...@ke...> - 2007-11-05 12:23:28
|
linux-core/drm_bo.c | 2 +-
linux-core/drm_object.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
New commits:
commit 427cc561b3dfbd504472e284e5fc16b63acd1816
Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
Date: Mon Nov 5 13:22:00 2007 +0100
Export a symbol.
diff --git a/linux-core/drm_object.c b/linux-core/drm_object.c
index 5cc1c8d..5ade617 100644
--- a/linux-core/drm_object.c
+++ b/linux-core/drm_object.c
@@ -234,6 +234,7 @@ void drm_remove_ref_object(struct drm_file *priv, struct drm_ref_object *item)
}
}
+EXPORT_SYMBOL(drm_remove_ref_object);
int drm_user_object_ref(struct drm_file *priv, uint32_t user_token,
enum drm_object_type type, struct drm_user_object **object)
commit 44ad6f409d6d08163d26e20d41b1601b2fde53d7
Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
Date: Mon Nov 5 13:20:16 2007 +0100
Fix a user-buffer check.
diff --git a/linux-core/drm_bo.c b/linux-core/drm_bo.c
index 91bc0c7..6bfc6df 100644
--- a/linux-core/drm_bo.c
+++ b/linux-core/drm_bo.c
@@ -945,7 +945,7 @@ static int drm_bo_new_mask(struct drm_buffer_object *bo,
uint32_t new_props;
if (bo->type == drm_bo_type_user &&
- ((used_mask & (DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING)) !=
+ ((new_flags & (DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING)) !=
(DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING))) {
DRM_ERROR("User buffers require cache-coherent memory.\n");
return -EINVAL;
|
|
From: <ai...@ke...> - 2007-11-06 02:16:44
|
linux-core/drm_agpsupport.c | 39 ++++++++++++++++++---------------------
linux-core/i915_buffer.c | 31 +++++++++++++++----------------
linux-core/i915_fence.c | 13 +++++++------
shared-core/i915_drv.h | 4 ++--
shared-core/i915_irq.c | 11 +++++------
5 files changed, 47 insertions(+), 51 deletions(-)
New commits:
commit b437c8ca0fe62a43661a31a3010284926d20f209
Author: Dave Airlie <ai...@li...>
Date: Tue Nov 6 12:12:10 2007 +1000
drm/agp: kernel style fixes
diff --git a/linux-core/drm_agpsupport.c b/linux-core/drm_agpsupport.c
index 08ea7c4..438899e 100644
--- a/linux-core/drm_agpsupport.c
+++ b/linux-core/drm_agpsupport.c
@@ -498,14 +498,15 @@ int drm_agp_unbind_memory(DRM_AGP_MEM * handle)
#define AGP_REQUIRED_MAJOR 0
#define AGP_REQUIRED_MINOR 102
-static int drm_agp_needs_unbind_cache_adjust(struct drm_ttm_backend *backend) {
+static int drm_agp_needs_unbind_cache_adjust(struct drm_ttm_backend *backend)
+{
return ((backend->flags & DRM_BE_FLAG_BOUND_CACHED) ? 0 : 1);
}
-static int drm_agp_populate(struct drm_ttm_backend *backend, unsigned long num_pages,
- struct page **pages) {
-
+static int drm_agp_populate(struct drm_ttm_backend *backend,
+ unsigned long num_pages, struct page **pages)
+{
struct drm_agp_ttm_backend *agp_be =
container_of(backend, struct drm_agp_ttm_backend, backend);
struct page **cur_page, **last_page = pages + num_pages;
@@ -521,15 +522,14 @@ static int drm_agp_populate(struct drm_ttm_backend *backend, unsigned long num_p
mem = drm_agp_allocate_memory(agp_be->bridge, num_pages, AGP_USER_MEMORY);
#endif
if (!mem) {
- drm_free_memctl(num_pages *sizeof(void *));
+ drm_free_memctl(num_pages * sizeof(void *));
return -1;
}
DRM_DEBUG("Current page count is %ld\n", (long) mem->page_count);
mem->page_count = 0;
- for (cur_page = pages; cur_page < last_page; ++cur_page) {
+ for (cur_page = pages; cur_page < last_page; ++cur_page)
mem->memory[mem->page_count++] = phys_to_gart(page_to_phys(*cur_page));
- }
agp_be->mem = mem;
return 0;
}
@@ -551,17 +551,17 @@ static int drm_agp_bind_ttm(struct drm_ttm_backend *backend,
mem->type = AGP_USER_CACHED_MEMORY;
ret = drm_agp_bind_memory(mem, bo_mem->mm_node->start);
- if (ret) {
+ if (ret)
DRM_ERROR("AGP Bind memory failed\n");
- }
+
DRM_FLAG_MASKED(backend->flags, (bo_mem->flags & DRM_BO_FLAG_CACHED) ?
DRM_BE_FLAG_BOUND_CACHED : 0,
DRM_BE_FLAG_BOUND_CACHED);
return ret;
}
-static int drm_agp_unbind_ttm(struct drm_ttm_backend *backend) {
-
+static int drm_agp_unbind_ttm(struct drm_ttm_backend *backend)
+{
struct drm_agp_ttm_backend *agp_be =
container_of(backend, struct drm_agp_ttm_backend, backend);
@@ -572,8 +572,8 @@ static int drm_agp_unbind_ttm(struct drm_ttm_backend *backend) {
return 0;
}
-static void drm_agp_clear_ttm(struct drm_ttm_backend *backend) {
-
+static void drm_agp_clear_ttm(struct drm_ttm_backend *backend)
+{
struct drm_agp_ttm_backend *agp_be =
container_of(backend, struct drm_agp_ttm_backend, backend);
DRM_AGP_MEM *mem = agp_be->mem;
@@ -583,29 +583,27 @@ static void drm_agp_clear_ttm(struct drm_ttm_backend *backend) {
unsigned long num_pages = mem->page_count;
backend->func->unbind(backend);
agp_free_memory(mem);
- drm_free_memctl(num_pages *sizeof(void *));
+ drm_free_memctl(num_pages * sizeof(void *));
}
agp_be->mem = NULL;
}
-static void drm_agp_destroy_ttm(struct drm_ttm_backend *backend) {
-
+static void drm_agp_destroy_ttm(struct drm_ttm_backend *backend)
+{
struct drm_agp_ttm_backend *agp_be;
if (backend) {
DRM_DEBUG("drm_agp_destroy_ttm\n");
agp_be = container_of(backend, struct drm_agp_ttm_backend, backend);
if (agp_be) {
- if (agp_be->mem) {
+ if (agp_be->mem)
backend->func->clear(backend);
- }
drm_ctl_free(agp_be, sizeof(*agp_be), DRM_MEM_TTM);
}
}
}
-static struct drm_ttm_backend_func agp_ttm_backend =
-{
+static struct drm_ttm_backend_func agp_ttm_backend = {
.needs_ub_cache_adjust = drm_agp_needs_unbind_cache_adjust,
.populate = drm_agp_populate,
.clear = drm_agp_clear_ttm,
@@ -647,7 +645,6 @@ struct drm_ttm_backend *drm_agp_init_ttm(struct drm_device *dev)
agp_be->bridge = dev->agp->bridge;
agp_be->populated = FALSE;
agp_be->backend.func = &agp_ttm_backend;
- // agp_be->backend.mem_type = DRM_BO_MEM_TT;
agp_be->backend.dev = dev;
return &agp_be->backend;
commit 9493ce6ca39b65b9f955943a043c0741a5c59f7c
Author: Dave Airlie <ai...@li...>
Date: Tue Nov 6 11:32:58 2007 +1000
i915: cleanup most of the whitespace
diff --git a/linux-core/i915_buffer.c b/linux-core/i915_buffer.c
index 1f88a51..fb063ee 100644
--- a/linux-core/i915_buffer.c
+++ b/linux-core/i915_buffer.c
@@ -33,14 +33,14 @@
#include "i915_drm.h"
#include "i915_drv.h"
-struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device * dev)
+struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device *dev)
{
return drm_agp_init_ttm(dev);
}
int i915_fence_types(struct drm_buffer_object *bo,
- uint32_t * fclass,
- uint32_t * type)
+ uint32_t *fclass,
+ uint32_t *type)
{
if (bo->mem.mask & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
*type = 3;
@@ -49,7 +49,7 @@ int i915_fence_types(struct drm_buffer_object *bo,
return 0;
}
-int i915_invalidate_caches(struct drm_device * dev, uint64_t flags)
+int i915_invalidate_caches(struct drm_device *dev, uint64_t flags)
{
/*
* FIXME: Only emit once per batchbuffer submission.
@@ -65,8 +65,8 @@ int i915_invalidate_caches(struct drm_device * dev, uint64_t flags)
return i915_emit_mi_flush(dev, flush_cmd);
}
-int i915_init_mem_type(struct drm_device * dev, uint32_t type,
- struct drm_mem_type_manager * man)
+int i915_init_mem_type(struct drm_device *dev, uint32_t type,
+ struct drm_mem_type_manager *man)
{
switch (type) {
case DRM_BO_MEM_LOCAL:
@@ -226,25 +226,24 @@ out_cleanup:
#endif
/*
- * Disable i915_move_flip for now, since we can't guarantee that the hardware lock
- * is held here. To re-enable we need to make sure either
+ * Disable i915_move_flip for now, since we can't guarantee that the hardware
+ * lock is held here. To re-enable we need to make sure either
* a) The X server is using DRM to submit commands to the ring, or
- * b) DRM can use the HP ring for these blits. This means i915 needs to implement
- * a new ring submission mechanism and fence class.
+ * b) DRM can use the HP ring for these blits. This means i915 needs to
+ * implement a new ring submission mechanism and fence class.
*/
-
-int i915_move(struct drm_buffer_object * bo,
- int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
+int i915_move(struct drm_buffer_object *bo,
+ int evict, int no_wait, struct drm_bo_mem_reg *new_mem)
{
struct drm_bo_mem_reg *old_mem = &bo->mem;
if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
} else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
- if (0 /*i915_move_flip(bo, evict, no_wait, new_mem)*/)
+ if (0) /*i915_move_flip(bo, evict, no_wait, new_mem)*/
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
} else {
- if (0 /*i915_move_blit(bo, evict, no_wait, new_mem)*/)
+ if (0) /*i915_move_blit(bo, evict, no_wait, new_mem)*/
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
}
return 0;
@@ -259,7 +258,7 @@ static inline void clflush(volatile void *__p)
static inline void drm_cache_flush_addr(void *virt)
{
- int i;
+ int i;
for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
clflush(virt+i);
diff --git a/linux-core/i915_fence.c b/linux-core/i915_fence.c
index f2c2982..e3c76df 100644
--- a/linux-core/i915_fence.c
+++ b/linux-core/i915_fence.c
@@ -38,7 +38,7 @@
* Implements an intel sync flush operation.
*/
-static void i915_perform_flush(struct drm_device * dev)
+static void i915_perform_flush(struct drm_device *dev)
{
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
struct drm_fence_manager *fm = &dev->fm;
@@ -63,7 +63,7 @@ static void i915_perform_flush(struct drm_device * dev)
diff = (sequence - fc->last_exe_flush) & BREADCRUMB_MASK;
if (diff < driver->wrap_diff && diff != 0) {
- drm_fence_handler(dev, 0, sequence,
+ drm_fence_handler(dev, 0, sequence,
DRM_FENCE_TYPE_EXE, 0);
}
@@ -110,7 +110,7 @@ static void i915_perform_flush(struct drm_device * dev)
}
-void i915_poke_flush(struct drm_device * dev, uint32_t class)
+void i915_poke_flush(struct drm_device *dev, uint32_t class)
{
struct drm_fence_manager *fm = &dev->fm;
unsigned long flags;
@@ -120,8 +120,9 @@ void i915_poke_flush(struct drm_device * dev, uint32_t class)
write_unlock_irqrestore(&fm->lock, flags);
}
-int i915_fence_emit_sequence(struct drm_device * dev, uint32_t class, uint32_t flags,
- uint32_t * sequence, uint32_t * native_type)
+int i915_fence_emit_sequence(struct drm_device *dev, uint32_t class,
+ uint32_t flags, uint32_t *sequence,
+ uint32_t *native_type)
{
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
if (!dev_priv)
@@ -136,7 +137,7 @@ int i915_fence_emit_sequence(struct drm_device * dev, uint32_t class, uint32_t f
return 0;
}
-void i915_fence_handler(struct drm_device * dev)
+void i915_fence_handler(struct drm_device *dev)
{
struct drm_fence_manager *fm = &dev->fm;
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index 9ee79fa..91d4ac0 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -267,7 +267,7 @@ extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
struct drm_file *file_priv);
extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
struct drm_file *file_priv);
-extern int i915_emit_irq(struct drm_device * dev);
+extern int i915_emit_irq(struct drm_device *dev);
extern void i915_user_irq_on(drm_i915_private_t *dev_priv);
extern void i915_user_irq_off(drm_i915_private_t *dev_priv);
extern int i915_vblank_swap(struct drm_device *dev, void *data,
@@ -303,7 +303,7 @@ extern int i915_fence_has_irq(struct drm_device *dev, uint32_t class, uint32_t f
/* i915_buffer.c */
extern struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device *dev);
extern int i915_fence_types(struct drm_buffer_object *bo, uint32_t *fclass,
- uint32_t *type);
+ uint32_t *type);
extern int i915_invalidate_caches(struct drm_device *dev, uint64_t buffer_flags);
extern int i915_init_mem_type(struct drm_device *dev, uint32_t type,
struct drm_mem_type_manager *man);
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 43e73e0..2c699ec 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -365,9 +365,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
return IRQ_HANDLED;
}
-int i915_emit_irq(struct drm_device * dev)
+int i915_emit_irq(struct drm_device *dev)
{
-
drm_i915_private_t *dev_priv = dev->dev_private;
RING_LOCALS;
@@ -383,8 +382,6 @@ int i915_emit_irq(struct drm_device * dev)
ADVANCE_LP_RING();
return dev_priv->counter;
-
-
}
void i915_user_irq_on(drm_i915_private_t *dev_priv)
@@ -471,7 +468,8 @@ int i915_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence)
/* Needs the lock as it touches the ring.
*/
-int i915_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv)
+int i915_irq_emit(struct drm_device *dev, void *data,
+ struct drm_file *file_priv)
{
drm_i915_private_t *dev_priv = dev->dev_private;
drm_i915_irq_emit_t *emit = data;
@@ -747,13 +745,14 @@ void i915_driver_irq_postinstall(struct drm_device * dev)
* Initialize the hardware status page IRQ location.
*/
- I915_WRITE(I915REG_INSTPM, ( 1 << 5) | ( 1 << 21));
+ I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
}
void i915_driver_irq_uninstall(struct drm_device * dev)
{
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
u16 temp;
+
if (!dev_priv)
return;
|
|
From: <ai...@ke...> - 2007-11-06 07:00:59
|
linux-core/i915_compat.c | 24 ++++++++++++------------
shared-core/i915_drv.h | 2 +-
2 files changed, 13 insertions(+), 13 deletions(-)
New commits:
commit 349eebd567246e3c2d47734772e882ae50723cb9
Author: Dave Airlie <ai...@li...>
Date: Tue Nov 6 18:00:10 2007 +1100
i915: compat code doesn't work in i8xx hw.
diff --git a/linux-core/i915_compat.c b/linux-core/i915_compat.c
index 3a437a1..b09cc9f 100644
--- a/linux-core/i915_compat.c
+++ b/linux-core/i915_compat.c
@@ -2,6 +2,9 @@
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+#include "i915_drm.h"
+#include "i915_drv.h"
+
#define PCI_DEVICE_ID_INTEL_82946GZ_HB 0x2970
#define PCI_DEVICE_ID_INTEL_82965G_1_HB 0x2980
#define PCI_DEVICE_ID_INTEL_82965Q_HB 0x2990
@@ -13,17 +16,6 @@
#define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0
#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0
-#define IS_I965 (agp_dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \
- agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \
- agp_dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \
- agp_dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
- agp_dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
- agp_dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB)
-
-#define IS_G33 (agp_dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
- agp_dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
- agp_dev->device == PCI_DEVICE_ID_INTEL_Q33_HB)
-
#define I915_IFPADDR 0x60
#define I965_IFPADDR 0x70
@@ -109,11 +101,15 @@ void intel_init_chipset_flush_compat(struct drm_device *dev)
{
struct pci_dev *agp_dev = dev->agp->agp_info.device;
+ /* not flush on i8xx */
+ if (!IS_I9XX(dev))
+ return;
+
intel_private.ifp_resource.name = "GMCH IFPBAR";
intel_private.ifp_resource.flags = IORESOURCE_MEM;
/* Setup chipset flush for 915 */
- if (IS_I965 || IS_G33) {
+ if (IS_I965G(dev) || IS_G33(dev)) {
intel_i965_g33_setup_chipset_flush(agp_dev);
} else {
intel_i915_setup_chipset_flush(agp_dev);
@@ -128,6 +124,10 @@ void intel_init_chipset_flush_compat(struct drm_device *dev)
void intel_fini_chipset_flush_compat(struct drm_device *dev)
{
+ /* not flush on i8xx */
+ if (!IS_I9XX(dev))
+ return;
+
iounmap(intel_private.flush_page);
release_resource(&intel_private.ifp_resource);
}
commit 81b7f9b71c45fc621e0b5770062aedf5ae5e57ee
Author: Zhenyu Wang <zhe...@in...>
Date: Tue Nov 6 17:59:14 2007 +1100
[PATCH] i915: fix missing G33 detect in IS_I9XX
G33 detect seems missing with Jesse's suspend/resume patch.
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index 91d4ac0..c66b065 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -1173,7 +1173,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
(dev)->pci_device == 0x29D2)
#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
- IS_I945GM(dev) || IS_I965G(dev))
+ IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
IS_I945GM(dev) || IS_I965GM(dev))
|
|
From: <th...@ke...> - 2007-11-06 08:49:10
|
linux-core/Makefile.kernel | 3
linux-core/drm_bo.c | 15 ++-
linux-core/drm_regman.c | 205 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 219 insertions(+), 4 deletions(-)
New commits:
commit 40fb079aebae4277813e6a32e2e93c81dc0038e3
Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
Date: Tue Nov 6 09:47:57 2007 +0100
Avoid buffers not ending up on a list in some cases.
diff --git a/linux-core/drm_bo.c b/linux-core/drm_bo.c
index 6bfc6df..b107798 100644
--- a/linux-core/drm_bo.c
+++ b/linux-core/drm_bo.c
@@ -1331,16 +1331,25 @@ int drm_bo_move_buffer(struct drm_buffer_object *bo, uint64_t new_mem_flags,
ret = drm_bo_handle_move_mem(bo, &mem, 0, no_wait);
out_unlock:
+ mutex_lock(&dev->struct_mutex);
if (ret || !move_unfenced) {
- mutex_lock(&dev->struct_mutex);
if (mem.mm_node) {
if (mem.mm_node != bo->pinned_node)
drm_mm_put_block(mem.mm_node);
mem.mm_node = NULL;
}
- mutex_unlock(&dev->struct_mutex);
+ drm_bo_add_to_lru(bo);
+ if (bo->priv_flags & _DRM_BO_FLAG_UNFENCED) {
+ DRM_WAKEUP(&bo->event_queue);
+ DRM_FLAG_MASKED(bo->priv_flags, 0,
+ _DRM_BO_FLAG_UNFENCED);
+ }
+ } else {
+ list_add_tail(&bo->lru, &bm->unfenced);
+ DRM_FLAG_MASKED(bo->priv_flags, _DRM_BO_FLAG_UNFENCED,
+ _DRM_BO_FLAG_UNFENCED);
}
-
+ mutex_unlock(&dev->struct_mutex);
mutex_unlock(&bm->evict_mutex);
return ret;
}
commit 20eecf2b884193d865419312290b2bb9f94ebf37
Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
Date: Tue Nov 6 09:36:25 2007 +0100
Add missing drm_regman.c file.
diff --git a/linux-core/Makefile.kernel b/linux-core/Makefile.kernel
index d1f3bb7..e7c280d 100644
--- a/linux-core/Makefile.kernel
+++ b/linux-core/Makefile.kernel
@@ -13,7 +13,8 @@ drm-objs := drm_auth.o drm_bufs.o drm_context.o drm_dma.o drm_drawable.o \
drm_sysfs.o drm_pci.o drm_agpsupport.o drm_scatter.o \
drm_memory_debug.o ati_pcigart.o drm_sman.o \
drm_hashtab.o drm_mm.o drm_object.o drm_compat.o \
- drm_fence.o drm_ttm.o drm_bo.o drm_bo_move.o drm_bo_lock.o
+ drm_fence.o drm_ttm.o drm_bo.o drm_bo_move.o drm_bo_lock.o \
+ drm_regman.o
tdfx-objs := tdfx_drv.o
r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o
mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o
diff --git a/linux-core/drm_regman.c b/linux-core/drm_regman.c
new file mode 100644
index 0000000..f49a25c
--- /dev/null
+++ b/linux-core/drm_regman.c
@@ -0,0 +1,205 @@
+/**************************************************************************
+ * Copyright (c) 2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+/*
+ * An allocate-fence manager implementation intended for sets of base-registers
+ * or tiling-registers.
+ */
+
+#include "drmP.h"
+
+/*
+ * Allocate a compatible register and put it on the unfenced list.
+ */
+
+int drm_regs_alloc(struct drm_reg_manager *manager,
+ const void *data,
+ uint32_t fence_class,
+ uint32_t fence_type,
+ int interruptible, int no_wait, struct drm_reg **reg)
+{
+ struct drm_reg *entry, *next_entry;
+ int ret;
+
+ *reg = NULL;
+
+ /*
+ * Search the unfenced list.
+ */
+
+ list_for_each_entry(entry, &manager->unfenced, head) {
+ if (manager->reg_reusable(entry, data)) {
+ entry->new_fence_type |= fence_type;
+ goto out;
+ }
+ }
+
+ /*
+ * Search the lru list.
+ */
+
+ list_for_each_entry_safe(entry, next_entry, &manager->lru, head) {
+ struct drm_fence_object *fence = entry->fence;
+ if (fence->fence_class == fence_class &&
+ (entry->fence_type & fence_type) == entry->fence_type &&
+ manager->reg_reusable(entry, data)) {
+ list_del(&entry->head);
+ entry->new_fence_type = fence_type;
+ list_add_tail(&entry->head, &manager->unfenced);
+ goto out;
+ }
+ }
+
+ /*
+ * Search the free list.
+ */
+
+ list_for_each_entry(entry, &manager->free, head) {
+ list_del(&entry->head);
+ entry->new_fence_type = fence_type;
+ list_add_tail(&entry->head, &manager->unfenced);
+ goto out;
+ }
+
+ if (no_wait)
+ return -EBUSY;
+
+ /*
+ * Go back to the lru list and try to expire fences.
+ */
+
+ list_for_each_entry_safe(entry, next_entry, &manager->lru, head) {
+ BUG_ON(!entry->fence);
+ ret = drm_fence_object_wait(entry->fence, 0, !interruptible,
+ entry->fence_type);
+ if (ret)
+ return ret;
+
+ drm_fence_usage_deref_unlocked(&entry->fence);
+ list_del(&entry->head);
+ entry->new_fence_type = fence_type;
+ list_add_tail(&entry->head, &manager->unfenced);
+ goto out;
+ }
+
+ /*
+ * Oops. All registers are used up :(.
+ */
+
+ return -EBUSY;
+ out:
+ *reg = entry;
+ return 0;
+}
+
+EXPORT_SYMBOL(drm_regs_alloc);
+
+void drm_regs_fence(struct drm_reg_manager *manager,
+ struct drm_fence_object *fence)
+{
+ struct drm_reg *entry;
+ struct drm_reg *next_entry;
+
+ if (!fence) {
+
+ /*
+ * Old fence (if any) is still valid.
+ * Put back on free and lru lists.
+ */
+
+ list_for_each_entry_safe_reverse(entry, next_entry,
+ &manager->unfenced, head) {
+ list_del(&entry->head);
+ list_add(&entry->head, (entry->fence) ?
+ &manager->lru : &manager->free);
+ }
+ } else {
+
+ /*
+ * Fence with a new fence and put on lru list.
+ */
+
+ list_for_each_entry_safe(entry, next_entry, &manager->unfenced,
+ head) {
+ list_del(&entry->head);
+ if (entry->fence)
+ drm_fence_usage_deref_unlocked(&entry->fence);
+ drm_fence_reference_unlocked(&entry->fence, fence);
+
+ entry->fence_type = entry->new_fence_type;
+ BUG_ON((entry->fence_type & fence->type) !=
+ entry->fence_type);
+
+ list_add_tail(&entry->head, &manager->lru);
+ }
+ }
+}
+
+EXPORT_SYMBOL(drm_regs_fence);
+
+void drm_regs_free(struct drm_reg_manager *manager)
+{
+ struct drm_reg *entry;
+ struct drm_reg *next_entry;
+
+ drm_regs_fence(manager, NULL);
+
+ list_for_each_entry_safe(entry, next_entry, &manager->free, head) {
+ list_del(&entry->head);
+ manager->reg_destroy(entry);
+ }
+
+ list_for_each_entry_safe(entry, next_entry, &manager->lru, head) {
+
+ (void)drm_fence_object_wait(entry->fence, 1, 1,
+ entry->fence_type);
+ list_del(&entry->head);
+ drm_fence_usage_deref_unlocked(&entry->fence);
+ manager->reg_destroy(entry);
+ }
+}
+
+EXPORT_SYMBOL(drm_regs_free);
+
+void drm_regs_add(struct drm_reg_manager *manager, struct drm_reg *reg)
+{
+ reg->fence = NULL;
+ list_add_tail(®->head, &manager->free);
+}
+
+EXPORT_SYMBOL(drm_regs_add);
+
+void drm_regs_init(struct drm_reg_manager *manager,
+ int (*reg_reusable) (const struct drm_reg *, const void *),
+ void (*reg_destroy) (struct drm_reg *))
+{
+ INIT_LIST_HEAD(&manager->free);
+ INIT_LIST_HEAD(&manager->lru);
+ INIT_LIST_HEAD(&manager->unfenced);
+ manager->reg_reusable = reg_reusable;
+ manager->reg_destroy = reg_destroy;
+}
+
+EXPORT_SYMBOL(drm_regs_init);
|
|
From: <jk...@ke...> - 2007-11-16 03:11:54
|
linux-core/nouveau_buffer.c | 47 +++++++++++++++++++++++++++++++++++++++++---
1 file changed, 44 insertions(+), 3 deletions(-)
New commits:
commit f2c8d39a0f99dab9d69d927214c8c66aabb70c5c
Author: Jeremy Kolb <jk...@br...>
Date: Thu Nov 15 22:09:59 2007 -0500
nouveau: rename
diff --git a/linux-core/nouveau_buffer.c b/linux-core/nouveau_buffer.c
index 0dd4a53..9b252a0 100644
--- a/linux-core/nouveau_buffer.c
+++ b/linux-core/nouveau_buffer.c
@@ -149,7 +149,7 @@ nouveau_bo_evict_mask(struct drm_buffer_object *bo)
*/
static int
nouveau_bo_move_m2mf(struct drm_buffer_object *bo, int evict, int no_wait,
- struct drm_bo_mem_reg *new_mem)
+ struct drm_bo_mem_reg *new_mem)
{
struct drm_device *dev = bo->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -198,8 +198,8 @@ nouveau_bo_move_m2mf(struct drm_buffer_object *bo, int evict, int no_wait,
/* Flip pages into the GART and move if we can. */
static int
-nouveau_bo_flip(struct drm_buffer_object *bo, int evict, int no_wait,
- struct drm_bo_mem_reg *new_mem)
+nouveau_bo_move_gart(struct drm_buffer_object *bo, int evict, int no_wait,
+ struct drm_bo_mem_reg *new_mem)
{
struct drm_device *dev = bo->dev;
struct drm_bo_mem_reg tmp_mem;
@@ -246,14 +246,14 @@ nouveau_bo_move(struct drm_buffer_object *bo, int evict, int no_wait,
if (old_mem->mem_type == DRM_BO_MEM_LOCAL)
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
#if 0
- if (!nouveau_bo_move_flipd(bo, evict, no_wait, new_mem))
+ if (!nouveau_bo_move_to_gart(bo, evict, no_wait, new_mem))
#endif
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
}
else
if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
#if 0
- if (nouveau_bo_move_flips(bo, evict, no_wait, new_mem))
+ if (nouveau_bo_move_to_gart(bo, evict, no_wait, new_mem))
#endif
return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
}
commit a3e627f8d66b5e9e896837824ce76664e5997b27
Author: Jeremy Kolb <jk...@br...>
Date: Thu Nov 15 20:46:49 2007 -0500
nouveau: flip buffer into gart.
diff --git a/linux-core/nouveau_buffer.c b/linux-core/nouveau_buffer.c
index c40dff6..0dd4a53 100644
--- a/linux-core/nouveau_buffer.c
+++ b/linux-core/nouveau_buffer.c
@@ -143,6 +143,7 @@ nouveau_bo_evict_mask(struct drm_buffer_object *bo)
return 0;
}
+
/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
* DRM_BO_MEM_{VRAM,PRIV0,TT} directly.
*/
@@ -195,6 +196,46 @@ nouveau_bo_move_m2mf(struct drm_buffer_object *bo, int evict, int no_wait,
DRM_FENCE_TYPE_EXE, 0, new_mem);
}
+/* Flip pages into the GART and move if we can. */
+static int
+nouveau_bo_flip(struct drm_buffer_object *bo, int evict, int no_wait,
+ struct drm_bo_mem_reg *new_mem)
+{
+ struct drm_device *dev = bo->dev;
+ struct drm_bo_mem_reg tmp_mem;
+ int ret;
+
+ tmp_mem = *new_mem;
+ tmp_mem.mm_node = NULL;
+ tmp_mem.mask = DRM_BO_FLAG_MEM_TT |
+ DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
+
+ ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
+
+ if (ret)
+ return ret;
+
+ ret = drm_bind_ttm(bo->ttm, &tmp_mem);
+ if (ret)
+ goto out_cleanup;
+
+ ret = nouveau_bo_move_m2mf(bo, 1, no_wait, &tmp_mem);
+ if (ret)
+ goto out_cleanup;
+
+ ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
+
+out_cleanup:
+ if (tmp_mem.mm_node) {
+ mutex_lock(&dev->struct_mutex);
+ if (tmp_mem.mm_node != bo->pinned_node)
+ drm_mm_put_block(tmp_mem.mm_node);
+ tmp_mem.mm_node = NULL;
+ mutex_unlock(&dev->struct_mutex);
+ }
+ return ret;
+}
+
static int
nouveau_bo_move(struct drm_buffer_object *bo, int evict, int no_wait,
struct drm_bo_mem_reg *new_mem)
|
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