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dri-patches
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From: <eve...@ke...> - 2016-12-14 17:12:19
|
autogen.sh | 6 ++++++
libkms/exynos.c | 3 ++-
2 files changed, 8 insertions(+), 1 deletion(-)
New commits:
commit a07cf7f08d79924ba00fd702230d3e1690eebc5e
Author: Seung-Woo Kim <sw0...@sa...>
Date: Mon Nov 14 14:31:34 2016 +0900
libkms/exynos: fix memory leak in error path
This patch fixes memory leak in error path of exynos_bo_create().
Signed-off-by: Seung-Woo Kim <sw0...@sa...>
Reviewed-by: Emil Velikov <emi...@gm...>
Reviewed-by: Eric Engestrom <eri...@im...>
diff --git a/libkms/exynos.c b/libkms/exynos.c
index 5de2e5a..0e97fb5 100644
--- a/libkms/exynos.c
+++ b/libkms/exynos.c
@@ -88,7 +88,8 @@ exynos_bo_create(struct kms_driver *kms,
pitch = (pitch + 512 - 1) & ~(512 - 1);
size = pitch * ((height + 4 - 1) & ~(4 - 1));
} else {
- return -EINVAL;
+ ret = -EINVAL;
+ goto err_free;
}
memset(&arg, 0, sizeof(arg));
commit 0645648dd08942face3cad03bedcdd39e3a6f5fc
Author: Emil Velikov <emi...@gm...>
Date: Mon Dec 12 17:50:46 2016 +0000
autogen.sh: set format.subjectPrefix and sendemail.to if needed
Just set the rules automatically rather than asking each contributor to
update thing locally.
v2: Silence errors if run outside of git repo. (Eric)
Signed-off-by: Emil Velikov <emi...@gm...
Reviewed-by: Eric Engestrom <eri...@im...>
diff --git a/autogen.sh b/autogen.sh
index c896097..d82ab18 100755
--- a/autogen.sh
+++ b/autogen.sh
@@ -9,6 +9,12 @@ cd "$srcdir"
autoreconf --force --verbose --install || exit 1
cd "$ORIGDIR" || exit $?
+git config --local --get format.subjectPrefix ||
+ git config --local format.subjectPrefix "PATCH libdrm" 2>/dev/null
+
+git config --local --get sendemail.to ||
+ git config --local sendemail.to "dri...@li..." 2>/dev/null
+
if test -z "$NOCONFIGURE"; then
"$srcdir"/configure "$@"
fi
|
|
From: <ta...@ke...> - 2017-01-12 21:41:54
|
.editorconfig | 19 +++++++++++++++++++
xf86drm.c | 4 ++--
2 files changed, 21 insertions(+), 2 deletions(-)
New commits:
commit 885624b0b9691562cdc019182985605a84042e5c
Author: Thierry Reding <tr...@nv...>
Date: Wed Dec 21 18:08:29 2016 +0100
Add .editorconfig
This encodes the indentation style for libdrm and can be used with
various editors. See http://editorconfig.org for instructions.
Reviewed-by: Emil Velikov <emi...@gm...>
Signed-off-by: Thierry Reding <tr...@nv...>
diff --git a/.editorconfig b/.editorconfig
new file mode 100644
index 0000000..893b7be
--- /dev/null
+++ b/.editorconfig
@@ -0,0 +1,19 @@
+# To use this config with your editor, follow the instructions at:
+# http://editorconfig.org
+
+root = true
+
+[*]
+charset = utf-8
+insert_final_newline = true
+
+[*.{c,h}]
+indent_style = space
+indent_size = 4
+
+[{Makefile.*,*.mk}]
+indent_style = tab
+
+[*.m4]
+indent_style = space
+indent_size = 2
commit e17cad1994d321a8279c124e7a85ddddcdd9e4cd
Author: Thierry Reding <tr...@nv...>
Date: Wed Dec 21 18:00:52 2016 +0100
xf86drm: Fix indentation
libdrm uses spaces for indentation. Fix the two inconsistent lines in
this file.
Reviewed-by: Emil Velikov <emi...@gm...>
Signed-off-by: Thierry Reding <tr...@nv...>
diff --git a/xf86drm.c b/xf86drm.c
index 7d7df18..b8b2cfe 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -2908,7 +2908,7 @@ static int drmParseSubsystemType(int maj, int min)
return -EINVAL;
#elif defined(__OpenBSD__)
- return DRM_BUS_PCI;
+ return DRM_BUS_PCI;
#else
#warning "Missing implementation of drmParseSubsystemType"
return -EINVAL;
@@ -3419,7 +3419,7 @@ int drmGetDevice2(int fd, uint32_t flags, drmDevicePtr *device)
closedir(sysdir);
free(local_devices);
if (*device == NULL)
- return -ENODEV;
+ return -ENODEV;
return 0;
free_devices:
|
|
From: <ic...@ke...> - 2017-01-27 20:26:46
|
intel/intel_bufmgr.h | 1 +
intel/intel_bufmgr_gem.c | 21 +++++++++++++++++++++
2 files changed, 22 insertions(+)
New commits:
commit dfd536c60d0bdffe005e354be0677f066af94f83
Author: Chris Wilson <ch...@ch...>
Date: Fri Jan 27 20:25:04 2017 +0000
intel: Export a function to re-enable implicit synchronisation
Implicit synchronisation is the default behaviour of the kernel when
rendering with an execobject. It may be disabled with
drm_intel_gem_bo_disable_implicit_sync(), and then to restore it use
drm_intel_gem_bo_enable_implicit_sync().
Signed-off-by: Chris Wilson <ch...@ch...>
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index 11579fb..693472a 100644
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
@@ -187,6 +187,7 @@ int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
#define HAVE_DRM_INTEL_GEM_BO_DISABLE_IMPLICIT_SYNC 1
int drm_intel_bufmgr_gem_can_disable_implicit_sync(drm_intel_bufmgr *bufmgr);
void drm_intel_gem_bo_disable_implicit_sync(drm_intel_bo *bo);
+void drm_intel_gem_bo_enable_implicit_sync(drm_intel_bo *bo);
void *drm_intel_gem_bo_map__cpu(drm_intel_bo *bo);
void *drm_intel_gem_bo_map__gtt(drm_intel_bo *bo);
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 077746c..a665600 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -2816,6 +2816,25 @@ drm_intel_gem_bo_disable_implicit_sync(drm_intel_bo *bo)
}
/**
+ * Enables implicit synchronisation before executing the bo
+ *
+ * This is the default behaviour of the kernel, to wait upon prior writes
+ * completing on the object before rendering with it, or to wait for prior
+ * reads to complete before writing into the object.
+ * drm_intel_gem_bo_disable_implicit_sync() can stop this behaviour, telling
+ * the kernel never to insert a stall before using the object. Then this
+ * function can be used to restore the implicit sync before subsequent
+ * rendering.
+ */
+void
+drm_intel_gem_bo_enable_implicit_sync(drm_intel_bo *bo)
+{
+ drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
+
+ bo_gem->kflags &= ~EXEC_OBJECT_ASYNC;
+}
+
+/**
* Query whether the kernel supports disabling of its implicit synchronisation
* before execbuf. See drm_intel_gem_bo_disable_implicit_sync()
*/
commit 22cfd0431131538ad1953af86f7cc2d48af176d4
Author: Chris Wilson <ch...@ch...>
Date: Fri Jan 27 20:20:30 2017 +0000
intel: Clear execobject flags before preserving object in reuse cache
Signed-off-by: Chris Wilson <ch...@ch...>
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 9195f3e..077746c 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -1411,6 +1411,8 @@ drm_intel_gem_bo_unreference_final(drm_intel_bo *bo, time_t time)
bo_gem->name = NULL;
bo_gem->validate_index = -1;
+ bo_gem->kflags = 0;
+
DRMLISTADDTAIL(&bo_gem->head, &bucket->head);
} else {
drm_intel_gem_bo_free(bo);
|
|
From: <ic...@ke...> - 2017-02-11 11:06:03
|
intel/intel_bufmgr_gem.c | 50 +++++++++++++++--------------------------------
1 file changed, 16 insertions(+), 34 deletions(-)
New commits:
commit ec80fd36a752960f28c5c900c8c68e201ce07093
Author: Chris Wilson <ch...@ch...>
Date: Sat Feb 11 11:04:50 2017 +0000
intel: Move 48b support to bo_gem->kflags
Another boolean that can be set and used along side the other execobject
flags.
Signed-off-by: Chris Wilson <ch...@ch...>
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 0b66e15..b1e6907 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -270,15 +270,6 @@ struct _drm_intel_bo_gem {
bool is_userptr;
/**
- * Boolean of whether this buffer can be placed in the full 48-bit
- * address range on gen8+.
- *
- * By default, buffers will be keep in a 32-bit range, unless this
- * flag is explicitly set.
- */
- bool use_48b_address_range;
-
- /**
* Size in bytes of this buffer and its relocation descendents.
*
* Used to avoid costly tree walking in
@@ -541,8 +532,6 @@ drm_intel_add_validate_buffer2(drm_intel_bo *bo, int need_fence)
flags = 0;
if (need_fence)
flags |= EXEC_OBJECT_NEEDS_FENCE;
- if (bo_gem->use_48b_address_range)
- flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
if (bo_gem->validate_index != -1) {
bufmgr_gem->exec2_objects[bo_gem->validate_index].flags |= flags;
@@ -851,7 +840,6 @@ retry:
bo_gem->used_as_reloc_target = false;
bo_gem->has_error = false;
bo_gem->reusable = true;
- bo_gem->use_48b_address_range = false;
drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, alignment);
pthread_mutex_unlock(&bufmgr_gem->lock);
@@ -1010,7 +998,6 @@ drm_intel_gem_bo_alloc_userptr(drm_intel_bufmgr *bufmgr,
bo_gem->used_as_reloc_target = false;
bo_gem->has_error = false;
bo_gem->reusable = false;
- bo_gem->use_48b_address_range = false;
drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, 0);
pthread_mutex_unlock(&bufmgr_gem->lock);
@@ -1158,7 +1145,6 @@ drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
bo_gem->bo.handle = open_arg.handle;
bo_gem->global_name = handle;
bo_gem->reusable = false;
- bo_gem->use_48b_address_range = false;
HASH_ADD(handle_hh, bufmgr_gem->handle_table,
gem_handle, sizeof(bo_gem->gem_handle), bo_gem);
@@ -2046,7 +2032,11 @@ static void
drm_intel_gem_bo_use_48b_address_range(drm_intel_bo *bo, uint32_t enable)
{
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
- bo_gem->use_48b_address_range = enable;
+
+ if (enable)
+ bo_gem->kflags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+ else
+ bo_gem->kflags &= ~EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
}
static int
@@ -2702,7 +2692,6 @@ drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr, int prime_fd, int s
bo_gem->used_as_reloc_target = false;
bo_gem->has_error = false;
bo_gem->reusable = false;
- bo_gem->use_48b_address_range = false;
memclear(get_tiling);
get_tiling.handle = bo_gem->gem_handle;
commit e0f05b2fad60f04971f05b4dcd7b219b1b21bd5e
Author: Chris Wilson <ch...@ch...>
Date: Sat Jan 28 16:32:23 2017 +0000
intel: Move is_softpin to obj->kflags
Use obj->kflags to set EXEC_OBJECT_PINNED when the object is softpinned,
and so remember to clear the softpin status when the object is freed
(and reused).
Signed-off-by: Chris Wilson <ch...@ch...>
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index a665600..0b66e15 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -279,11 +279,6 @@ struct _drm_intel_bo_gem {
bool use_48b_address_range;
/**
- * Whether this buffer is softpinned at offset specified by the user
- */
- bool is_softpin;
-
- /**
* Size in bytes of this buffer and its relocation descendents.
*
* Used to avoid costly tree walking in
@@ -438,7 +433,7 @@ drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem)
if (bo_gem->relocs == NULL && bo_gem->softpin_target == NULL) {
DBG("%2d: %d %s(%s)\n", i, bo_gem->gem_handle,
- bo_gem->is_softpin ? "*" : "",
+ bo_gem->kflags & EXEC_OBJECT_PINNED ? "*" : "",
bo_gem->name);
continue;
}
@@ -452,7 +447,7 @@ drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem)
"%d (%s)@0x%08x %08x + 0x%08x\n",
i,
bo_gem->gem_handle,
- bo_gem->is_softpin ? "*" : "",
+ bo_gem->kflags & EXEC_OBJECT_PINNED ? "*" : "",
bo_gem->name,
upper_32_bits(bo_gem->relocs[j].offset),
lower_32_bits(bo_gem->relocs[j].offset),
@@ -471,7 +466,7 @@ drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem)
"%d *(%s)@0x%08x %08x\n",
i,
bo_gem->gem_handle,
- bo_gem->is_softpin ? "*" : "",
+ bo_gem->kflags & EXEC_OBJECT_PINNED ? "*" : "",
bo_gem->name,
target_gem->gem_handle,
target_gem->name,
@@ -541,14 +536,13 @@ drm_intel_add_validate_buffer2(drm_intel_bo *bo, int need_fence)
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
int index;
- int flags = 0;
+ unsigned long flags;
+ flags = 0;
if (need_fence)
flags |= EXEC_OBJECT_NEEDS_FENCE;
if (bo_gem->use_48b_address_range)
flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
- if (bo_gem->is_softpin)
- flags |= EXEC_OBJECT_PINNED;
if (bo_gem->validate_index != -1) {
bufmgr_gem->exec2_objects[bo_gem->validate_index].flags |= flags;
@@ -579,7 +573,7 @@ drm_intel_add_validate_buffer2(drm_intel_bo *bo, int need_fence)
bufmgr_gem->exec2_objects[index].relocs_ptr = (uintptr_t)bo_gem->relocs;
bufmgr_gem->exec2_objects[index].alignment = bo->align;
bufmgr_gem->exec2_objects[index].offset = bo->offset64;
- bufmgr_gem->exec2_objects[index].flags = flags | bo_gem->kflags;
+ bufmgr_gem->exec2_objects[index].flags = bo_gem->kflags | flags;
bufmgr_gem->exec2_objects[index].rsvd1 = 0;
bufmgr_gem->exec2_objects[index].rsvd2 = 0;
bufmgr_gem->exec_bos[index] = bo;
@@ -1411,8 +1405,6 @@ drm_intel_gem_bo_unreference_final(drm_intel_bo *bo, time_t time)
bo_gem->name = NULL;
bo_gem->validate_index = -1;
- bo_gem->kflags = 0;
-
DRMLISTADDTAIL(&bo_gem->head, &bucket->head);
} else {
drm_intel_gem_bo_free(bo);
@@ -2071,7 +2063,7 @@ drm_intel_gem_bo_add_softpin_target(drm_intel_bo *bo, drm_intel_bo *target_bo)
return -ENOMEM;
}
- if (!target_bo_gem->is_softpin)
+ if (!(target_bo_gem->kflags & EXEC_OBJECT_PINNED))
return -EINVAL;
if (target_bo_gem == bo_gem)
return -EINVAL;
@@ -2103,7 +2095,7 @@ drm_intel_gem_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *)target_bo;
- if (target_bo_gem->is_softpin)
+ if (target_bo_gem->kflags & EXEC_OBJECT_PINNED)
return drm_intel_gem_bo_add_softpin_target(bo, target_bo);
else
return do_bo_emit_reloc(bo, offset, target_bo, target_offset,
@@ -2287,7 +2279,7 @@ drm_intel_update_buffer_offsets2 (drm_intel_bufmgr_gem *bufmgr_gem)
/* If we're seeing softpinned object here it means that the kernel
* has relocated our object... Indicating a programming error
*/
- assert(!bo_gem->is_softpin);
+ assert(!(bo_gem->kflags & EXEC_OBJECT_PINNED));
DBG("BO %d (%s) migrated: 0x%08x %08x -> 0x%08x %08x\n",
bo_gem->gem_handle, bo_gem->name,
upper_32_bits(bo->offset64),
@@ -2643,9 +2635,10 @@ drm_intel_gem_bo_set_softpin_offset(drm_intel_bo *bo, uint64_t offset)
{
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
- bo_gem->is_softpin = true;
bo->offset64 = offset;
bo->offset = offset;
+ bo_gem->kflags |= EXEC_OBJECT_PINNED;
+
return 0;
}
|
|
From: <eri...@ke...> - 2017-02-28 13:36:19
|
autogen.sh | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
New commits:
commit 1bf96af525436d3727d44d137fe922b491512b14
Author: Eric Engestrom <eri...@im...>
Date: Fri Feb 3 18:21:10 2017 +0000
autogen.sh: run git commands in the (potentially) git dir
If the build dir is outside of the git dir, the order matters :)
Signed-off-by: Eric Engestrom <eri...@im...>
Reviewed-by: Chad Versace <cha...@ch...>
Reviewed-by: Emil Velikov <emi...@co...>
diff --git a/autogen.sh b/autogen.sh
index d003096..13d6991 100755
--- a/autogen.sh
+++ b/autogen.sh
@@ -6,15 +6,15 @@ test -z "$srcdir" && srcdir=.
ORIGDIR=`pwd`
cd "$srcdir"
-autoreconf --force --verbose --install || exit 1
-cd "$ORIGDIR" || exit $?
-
git config --local --get format.subjectPrefix >/dev/null ||
git config --local format.subjectPrefix "PATCH libdrm" 2>/dev/null
git config --local --get sendemail.to >/dev/null ||
git config --local sendemail.to "dri...@li..." 2>/dev/null
+autoreconf --force --verbose --install || exit 1
+cd "$ORIGDIR" || exit $?
+
if test -z "$NOCONFIGURE"; then
"$srcdir"/configure "$@"
fi
commit a6cdfa5cd8cc953ffec4497cd8262059c4b14675
Author: Eric Engestrom <eri...@im...>
Date: Fri Feb 3 18:21:09 2017 +0000
autogen.sh: don't print old git-config values
Old values are of no interest to the user, so let's reduce the spam
a bit by hiding those.
Signed-off-by: Eric Engestrom <eri...@im...>
Reviewed-by: Chad Versace <cha...@ch...>
Reviewed-by: Emil Velikov <emi...@co...>
diff --git a/autogen.sh b/autogen.sh
index d82ab18..d003096 100755
--- a/autogen.sh
+++ b/autogen.sh
@@ -9,10 +9,10 @@ cd "$srcdir"
autoreconf --force --verbose --install || exit 1
cd "$ORIGDIR" || exit $?
-git config --local --get format.subjectPrefix ||
+git config --local --get format.subjectPrefix >/dev/null ||
git config --local format.subjectPrefix "PATCH libdrm" 2>/dev/null
-git config --local --get sendemail.to ||
+git config --local --get sendemail.to >/dev/null ||
git config --local sendemail.to "dri...@li..." 2>/dev/null
if test -z "$NOCONFIGURE"; then
|
|
From: <rob...@ke...> - 2017-03-23 19:23:06
|
freedreno/Makefile.am | 1
freedreno/freedreno_bo.c | 12 ++++++++
freedreno/freedreno_bo_cache.c | 4 ++
freedreno/freedreno_device.c | 3 +-
freedreno/freedreno_priv.h | 56 +++++++++++++++++++++++++++++++++++++++++
freedreno/kgsl/kgsl_device.c | 2 +
freedreno/msm/msm_device.c | 2 +
7 files changed, 77 insertions(+), 3 deletions(-)
New commits:
commit a07ae97c75ca45c08327b53df5d8d53e56a46a8a
Author: Rob Clark <rob...@fr...>
Date: Thu Mar 23 14:58:38 2017 -0400
freedreno: fix device close issues
Move closing the fd to after subclass ->destroy() (since it might want
to delete gem bo's, etc), and actually free() the fd_device object.
Signed-off-by: Rob Clark <rob...@fr...>
diff --git a/freedreno/freedreno_device.c b/freedreno/freedreno_device.c
index fcbf1402..dba7ec47 100644
--- a/freedreno/freedreno_device.c
+++ b/freedreno/freedreno_device.c
@@ -115,9 +115,10 @@ static void fd_device_del_impl(struct fd_device *dev)
fd_bo_cache_cleanup(&dev->bo_cache, 0);
drmHashDestroy(dev->handle_table);
drmHashDestroy(dev->name_table);
+ dev->funcs->destroy(dev);
if (dev->closefd)
close(dev->fd);
- dev->funcs->destroy(dev);
+ free(dev);
}
drm_private void fd_device_del_locked(struct fd_device *dev)
commit d0dae26ca4e743933f50c1bf4a742e0db8e1994b
Author: Rob Clark <rob...@fr...>
Date: Tue Mar 21 19:44:57 2017 -0400
freedreno: valgrind support
Signed-off-by: Rob Clark <rob...@fr...>
diff --git a/freedreno/Makefile.am b/freedreno/Makefile.am
index 0771d146..cbb0d031 100644
--- a/freedreno/Makefile.am
+++ b/freedreno/Makefile.am
@@ -5,6 +5,7 @@ AM_CFLAGS = \
$(WARN_CFLAGS) \
-I$(top_srcdir) \
$(PTHREADSTUBS_CFLAGS) \
+ $(VALGRIND_CFLAGS) \
-I$(top_srcdir)/include/drm
libdrm_freedreno_la_LTLIBRARIES = libdrm_freedreno.la
diff --git a/freedreno/freedreno_bo.c b/freedreno/freedreno_bo.c
index 996d6b95..10949ebf 100644
--- a/freedreno/freedreno_bo.c
+++ b/freedreno/freedreno_bo.c
@@ -102,6 +102,8 @@ fd_bo_new(struct fd_device *dev, uint32_t size, uint32_t flags)
bo->bo_reuse = TRUE;
pthread_mutex_unlock(&table_lock);
+ VG_BO_ALLOC(bo);
+
return bo;
}
@@ -118,6 +120,8 @@ fd_bo_from_handle(struct fd_device *dev, uint32_t handle, uint32_t size)
bo = bo_from_handle(dev, size, handle);
+ VG_BO_ALLOC(bo);
+
out_unlock:
pthread_mutex_unlock(&table_lock);
@@ -147,6 +151,8 @@ fd_bo_from_dmabuf(struct fd_device *dev, int fd)
bo = bo_from_handle(dev, size, handle);
+ VG_BO_ALLOC(bo);
+
out_unlock:
pthread_mutex_unlock(&table_lock);
@@ -177,8 +183,10 @@ struct fd_bo * fd_bo_from_name(struct fd_device *dev, uint32_t name)
goto out_unlock;
bo = bo_from_handle(dev, req.size, req.handle);
- if (bo)
+ if (bo) {
set_name(bo, name);
+ VG_BO_ALLOC(bo);
+ }
out_unlock:
pthread_mutex_unlock(&table_lock);
@@ -213,6 +221,8 @@ out:
/* Called under table_lock */
drm_private void bo_del(struct fd_bo *bo)
{
+ VG_BO_FREE(bo);
+
if (bo->map)
drm_munmap(bo->map, bo->size);
diff --git a/freedreno/freedreno_bo_cache.c b/freedreno/freedreno_bo_cache.c
index 7becb0d6..d922f3a9 100644
--- a/freedreno/freedreno_bo_cache.c
+++ b/freedreno/freedreno_bo_cache.c
@@ -33,7 +33,6 @@
#include "freedreno_drmif.h"
#include "freedreno_priv.h"
-
drm_private void bo_del(struct fd_bo *bo);
drm_private extern pthread_mutex_t table_lock;
@@ -102,6 +101,7 @@ fd_bo_cache_cleanup(struct fd_bo_cache *cache, time_t time)
if (time && ((time - bo->free_time) <= 1))
break;
+ VG_BO_OBTAIN(bo);
list_del(&bo->list);
bo_del(bo);
}
@@ -177,6 +177,7 @@ retry:
*size = bucket->size;
bo = find_in_bucket(bucket, flags);
if (bo) {
+ VG_BO_OBTAIN(bo);
if (bo->funcs->madvise(bo, TRUE) <= 0) {
/* we've lost the backing pages, delete and try again: */
pthread_mutex_lock(&table_lock);
@@ -207,6 +208,7 @@ fd_bo_cache_free(struct fd_bo_cache *cache, struct fd_bo *bo)
clock_gettime(CLOCK_MONOTONIC, &time);
bo->free_time = time.tv_sec;
+ VG_BO_RELEASE(bo);
list_addtail(&bo->list, &bucket->list);
fd_bo_cache_cleanup(cache, time.tv_sec);
diff --git a/freedreno/freedreno_priv.h b/freedreno/freedreno_priv.h
index 32170391..8dd3ee69 100644
--- a/freedreno/freedreno_priv.h
+++ b/freedreno/freedreno_priv.h
@@ -102,6 +102,9 @@ struct fd_device {
struct fd_bo_cache bo_cache;
int closefd; /* call close(fd) upon destruction */
+
+ /* just for valgrind: */
+ int bo_size;
};
drm_private void fd_bo_cache_init(struct fd_bo_cache *cache, int coarse);
@@ -196,4 +199,57 @@ offset_bytes(void *end, void *start)
return ((char *)end) - ((char *)start);
}
+#ifdef HAVE_VALGRIND
+# include <memcheck.h>
+
+/*
+ * For tracking the backing memory (if valgrind enabled, we force a mmap
+ * for the purposes of tracking)
+ */
+static inline void VG_BO_ALLOC(struct fd_bo *bo)
+{
+ if (bo && RUNNING_ON_VALGRIND) {
+ VALGRIND_MALLOCLIKE_BLOCK(fd_bo_map(bo), bo->size, 0, 1);
+ }
+}
+
+static inline void VG_BO_FREE(struct fd_bo *bo)
+{
+ VALGRIND_FREELIKE_BLOCK(bo->map, 0);
+}
+
+/*
+ * For tracking bo structs that are in the buffer-cache, so that valgrind
+ * doesn't attribute ownership to the first one to allocate the recycled
+ * bo.
+ *
+ * Note that the list_head in fd_bo is used to track the buffers in cache
+ * so disable error reporting on the range while they are in cache so
+ * valgrind doesn't squawk about list traversal.
+ *
+ */
+static inline void VG_BO_RELEASE(struct fd_bo *bo)
+{
+ if (RUNNING_ON_VALGRIND) {
+ VALGRIND_DISABLE_ADDR_ERROR_REPORTING_IN_RANGE(bo, bo->dev->bo_size);
+ VALGRIND_MAKE_MEM_NOACCESS(bo, bo->dev->bo_size);
+ VALGRIND_FREELIKE_BLOCK(bo->map, 0);
+ }
+}
+static inline void VG_BO_OBTAIN(struct fd_bo *bo)
+{
+ if (RUNNING_ON_VALGRIND) {
+ VALGRIND_MAKE_MEM_DEFINED(bo, bo->dev->bo_size);
+ VALGRIND_ENABLE_ADDR_ERROR_REPORTING_IN_RANGE(bo, bo->dev->bo_size);
+ VALGRIND_MALLOCLIKE_BLOCK(bo->map, bo->size, 0, 1);
+ }
+}
+#else
+static inline void VG_BO_ALLOC(struct fd_bo *bo) {}
+static inline void VG_BO_FREE(struct fd_bo *bo) {}
+static inline void VG_BO_RELEASE(struct fd_bo *bo) {}
+static inline void VG_BO_OBTAIN(struct fd_bo *bo) {}
+#endif
+
+
#endif /* FREEDRENO_PRIV_H_ */
diff --git a/freedreno/kgsl/kgsl_device.c b/freedreno/kgsl/kgsl_device.c
index 175e8378..958e8a72 100644
--- a/freedreno/kgsl/kgsl_device.c
+++ b/freedreno/kgsl/kgsl_device.c
@@ -61,5 +61,7 @@ drm_private struct fd_device * kgsl_device_new(int fd)
dev = &kgsl_dev->base;
dev->funcs = &funcs;
+ dev->bo_size = sizeof(struct kgsl_bo);
+
return dev;
}
diff --git a/freedreno/msm/msm_device.c b/freedreno/msm/msm_device.c
index 727baa44..c454938d 100644
--- a/freedreno/msm/msm_device.c
+++ b/freedreno/msm/msm_device.c
@@ -64,5 +64,7 @@ drm_private struct fd_device * msm_device_new(int fd)
fd_bo_cache_init(&msm_dev->ring_cache, TRUE);
+ dev->bo_size = sizeof(struct msm_bo);
+
return dev;
}
|
|
From: <eve...@ke...> - 2017-04-03 17:02:49
|
tegra/tegra-symbol-check | 7 +++++--
tests/etnaviv/Makefile.am | 1 +
2 files changed, 6 insertions(+), 2 deletions(-)
New commits:
commit 6796859fcce7b9d7157f066a8b0dac3ede6438dd
Author: Bernd Kuhls <ber...@t-...>
Date: Mon Apr 3 17:57:22 2017 +0100
tests/etnaviv: link against libdrm
Fixes link errors detected by buildroot autobuilders:
http://autobuild.buildroot.net/results/68a/68af62f4ab6944d326468818562c05fd5cc55b03/build-end.log
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100530
Signed-off-by: Bernd Kuhls <ber...@t-...>
Reviewed-by: Emil Velikov <emi...@co...>
diff --git a/tests/etnaviv/Makefile.am b/tests/etnaviv/Makefile.am
index 06318643..226baee2 100644
--- a/tests/etnaviv/Makefile.am
+++ b/tests/etnaviv/Makefile.am
@@ -28,6 +28,7 @@ etnaviv_2d_test_SOURCES = \
write_bmp.h
etnaviv_cmd_stream_test_LDADD = \
+ $(top_builddir)/libdrm.la \
$(top_builddir)/etnaviv/libdrm_etnaviv.la
etnaviv_cmd_stream_test_SOURCES = \
commit e5053343de6f910882a43214ce5c7b69a9b07927
Author: Erik Faye-Lund <kus...@gm...>
Date: Wed Mar 29 22:24:24 2017 +0000
tegra: update symbol-check
I get a few more symbols in my build tegra-libraries, so let's
include these in the whitelist as well.
While we're at it, update the comment at the top.
Signed-off-by: Erik Faye-Lund <kus...@gm...>
Reviewed-by: Emil Velikov <emi...@co...>
diff --git a/tegra/tegra-symbol-check b/tegra/tegra-symbol-check
index 40208311..420469f4 100755
--- a/tegra/tegra-symbol-check
+++ b/tegra/tegra-symbol-check
@@ -1,11 +1,14 @@
#!/bin/bash
-# The following symbols (past the first five) are taken from the public headers.
-# A list of the latter should be available Makefile.sources/LIBDRM_FREEDRENO_H_FILES
+# The following symbols (past the first nine) are taken from tegra.h.
FUNCS=$(nm -D --format=bsd --defined-only ${1-.libs/libdrm_tegra.so} | awk '{print $3}'| while read func; do
( grep -q "^$func$" || echo $func ) <<EOF
+__bss_end__
+__bss_start__
__bss_start
+__end__
+_bss_end__
_edata
_end
_fini
|
|
From: <da...@ke...> - 2017-04-06 19:35:09
|
include/drm/drm.h | 3 ++-
include/drm/drm_mode.h | 45 +++++++++++++++++++++++++++++++--------------
xf86drm.h | 9 ++++++++-
xf86drmMode.c | 24 ++++++++++++++++--------
4 files changed, 57 insertions(+), 24 deletions(-)
New commits:
commit 890d43a6a8d091211b82dd432af5e0a38472ffa6
Author: Ander Conselvan de Oliveira <and...@in...>
Date: Mon Aug 17 16:21:24 2015 +0300
Add CRTC ID to vblank event
When using the atomic API, one request can span multiple CRTCs, however
one event is generated per CRTC. As we cannot disambiguate the CRTC with
user data (since we only have one piece of user data to pass in), newer
kernels can include the CRTC ID in the page flip event.
Add a new vfunc to dispatch vblank events carrying a CRTC ID to clients
who negotiate a higher interface version.
[daniels: Rebased, include new cap, call page_flip_handler if it is set
but page_flip_handler2 isn't even on newer contexts, write a
commit message.]
v2: Split into separate commit.
Signed-off-by: Ander Conselvan de Oliveira <and...@in...>
Signed-off-by: Daniel Stone <da...@co...>
Reviewed-by: Maarten Lankhorst <maa...@in...>
diff --git a/xf86drm.h b/xf86drm.h
index 0d927018..d75ca8ce 100644
--- a/xf86drm.h
+++ b/xf86drm.h
@@ -728,7 +728,7 @@ extern void drmMsg(const char *format, ...) DRM_PRINTFLIKE(1, 2);
extern int drmSetMaster(int fd);
extern int drmDropMaster(int fd);
-#define DRM_EVENT_CONTEXT_VERSION 2
+#define DRM_EVENT_CONTEXT_VERSION 3
typedef struct _drmEventContext {
@@ -748,6 +748,13 @@ typedef struct _drmEventContext {
unsigned int tv_usec,
void *user_data);
+ void (*page_flip_handler2)(int fd,
+ unsigned int sequence,
+ unsigned int tv_sec,
+ unsigned int tv_usec,
+ unsigned int crtc_id,
+ void *user_data);
+
} drmEventContext, *drmEventContextPtr;
extern int drmHandleEvent(int fd, drmEventContextPtr evctx);
diff --git a/xf86drmMode.c b/xf86drmMode.c
index 0266bc10..d3bc20ea 100644
--- a/xf86drmMode.c
+++ b/xf86drmMode.c
@@ -889,6 +889,7 @@ int drmHandleEvent(int fd, drmEventContextPtr evctx)
int len, i;
struct drm_event *e;
struct drm_event_vblank *vblank;
+ void *user_data;
/* The DRM read semantics guarantees that we always get only
* complete events. */
@@ -915,15 +916,22 @@ int drmHandleEvent(int fd, drmEventContextPtr evctx)
U642VOID (vblank->user_data));
break;
case DRM_EVENT_FLIP_COMPLETE:
- if (evctx->version < 2 ||
- evctx->page_flip_handler == NULL)
- break;
vblank = (struct drm_event_vblank *) e;
- evctx->page_flip_handler(fd,
- vblank->sequence,
- vblank->tv_sec,
- vblank->tv_usec,
- U642VOID (vblank->user_data));
+ user_data = U642VOID (vblank->user_data);
+
+ if (evctx->version >= 3 && evctx->page_flip_handler2)
+ evctx->page_flip_handler2(fd,
+ vblank->sequence,
+ vblank->tv_sec,
+ vblank->tv_usec,
+ vblank->crtc_id,
+ user_data);
+ else if (evctx->version >= 2 && evctx->page_flip_handler)
+ evctx->page_flip_handler(fd,
+ vblank->sequence,
+ vblank->tv_sec,
+ vblank->tv_usec,
+ user_data);
break;
default:
break;
commit e379c6a137bba5c40d9a126b71a667b4d7f5697a
Author: Daniel Stone <da...@co...>
Date: Tue Apr 4 21:38:56 2017 +0100
Headers: Sync drm{,_mode}.h with the kernel
Generated using make headers_install, based on drm-misc-next commit
5db06a8a98f515f67446a69c57577c4c363ec65d.
This clarifies the comments around modifiers such that they are
per-framebuffer rather than per-plane, adds the beginnings of aspect
ratio mode flags, link status properties, and updates the 'reserved'
field from vblank events to include the CRTC ID.
v2: Split into separate patch, pull in full kernel changes.
v3: Undo revert of connector-type enums, since it is not actually
harmful.
Signed-off-by: Daniel Stone <da...@co...>
Reviewed-by: Emil Velikov <emi...@co...>
diff --git a/include/drm/drm.h b/include/drm/drm.h
index f6fd5c2c..1e7a4bc7 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -641,6 +641,7 @@ struct drm_gem_open {
#define DRM_CAP_CURSOR_HEIGHT 0x9
#define DRM_CAP_ADDFB2_MODIFIERS 0x10
#define DRM_CAP_PAGE_FLIP_TARGET 0x11
+#define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12
/** DRM_IOCTL_GET_CAP ioctl argument type */
struct drm_get_cap {
@@ -845,7 +846,7 @@ struct drm_event_vblank {
__u32 tv_sec;
__u32 tv_usec;
__u32 sequence;
- __u32 reserved;
+ __u32 crtc_id; /* 0 on older kernels that do not support this */
};
/* typedef area */
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index df0e3504..70571af6 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -47,7 +47,15 @@ extern "C" {
#define DRM_MODE_TYPE_DRIVER (1<<6)
/* Video mode flags */
-/* bit compatible with the xorg definitions. */
+/* bit compatible with the xrandr RR_ definitions (bits 0-13)
+ *
+ * ABI warning: Existing userspace really expects
+ * the mode flags to match the xrandr definitions. Any
+ * changes that don't match the xrandr definitions will
+ * likely need a new client cap or some other mechanism
+ * to avoid breaking existing userspace. This includes
+ * allocating new flags in the previously unused bits!
+ */
#define DRM_MODE_FLAG_PHSYNC (1<<0)
#define DRM_MODE_FLAG_NHSYNC (1<<1)
#define DRM_MODE_FLAG_PVSYNC (1<<2)
@@ -107,6 +115,10 @@ extern "C" {
#define DRM_MODE_DIRTY_ON 1
#define DRM_MODE_DIRTY_ANNOTATE 2
+/* Link Status options */
+#define DRM_MODE_LINK_STATUS_GOOD 0
+#define DRM_MODE_LINK_STATUS_BAD 1
+
struct drm_mode_modeinfo {
__u32 clock;
__u16 hdisplay;
@@ -220,14 +232,16 @@ struct drm_mode_get_encoder {
/* This is for connectors with multiple signal types. */
/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
-#define DRM_MODE_SUBCONNECTOR_Automatic 0
-#define DRM_MODE_SUBCONNECTOR_Unknown 0
-#define DRM_MODE_SUBCONNECTOR_DVID 3
-#define DRM_MODE_SUBCONNECTOR_DVIA 4
-#define DRM_MODE_SUBCONNECTOR_Composite 5
-#define DRM_MODE_SUBCONNECTOR_SVIDEO 6
-#define DRM_MODE_SUBCONNECTOR_Component 8
-#define DRM_MODE_SUBCONNECTOR_SCART 9
+enum drm_mode_subconnector {
+ DRM_MODE_SUBCONNECTOR_Automatic = 0,
+ DRM_MODE_SUBCONNECTOR_Unknown = 0,
+ DRM_MODE_SUBCONNECTOR_DVID = 3,
+ DRM_MODE_SUBCONNECTOR_DVIA = 4,
+ DRM_MODE_SUBCONNECTOR_Composite = 5,
+ DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
+ DRM_MODE_SUBCONNECTOR_Component = 8,
+ DRM_MODE_SUBCONNECTOR_SCART = 9,
+};
#define DRM_MODE_CONNECTOR_Unknown 0
#define DRM_MODE_CONNECTOR_VGA 1
@@ -392,17 +406,20 @@ struct drm_mode_fb_cmd2 {
* offsets[1]. Note that offsets[0] will generally
* be 0 (but this is not required).
*
- * To accommodate tiled, compressed, etc formats, a per-plane
+ * To accommodate tiled, compressed, etc formats, a
* modifier can be specified. The default value of zero
* indicates "native" format as specified by the fourcc.
- * Vendor specific modifier token. This allows, for example,
- * different tiling/swizzling pattern on different planes.
- * See discussion above of DRM_FORMAT_MOD_xxx.
+ * Vendor specific modifier token. Note that even though
+ * it looks like we have a modifier per-plane, we in fact
+ * do not. The modifier for each plane must be identical.
+ * Thus all combinations of different data layouts for
+ * multi plane formats must be enumerated as separate
+ * modifiers.
*/
__u32 handles[4];
__u32 pitches[4]; /* pitch for each plane */
__u32 offsets[4]; /* offset of each plane */
- __u64 modifier[4]; /* ie, tiling, compressed (per plane) */
+ __u64 modifier[4]; /* ie, tiling, compress */
};
#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
|
|
From: <ly...@ke...> - 2017-04-12 10:06:59
|
etnaviv/etnaviv-symbol-check | 1 +
etnaviv/etnaviv_cmd_stream.c | 33 +++++++++++++++++++++++++++++----
etnaviv/etnaviv_drm.h | 8 ++++++++
etnaviv/etnaviv_drmif.h | 2 ++
4 files changed, 40 insertions(+), 4 deletions(-)
New commits:
commit 2f902a6844124291e8f4458ecae98543bd9a2802
Author: Philipp Zabel <p....@pe...>
Date: Mon Apr 10 11:15:53 2017 +0200
etnaviv: add fence fd support
Add etna_cmd_stream_flush2 with in-fence fd and out-fence fd support for
explicit fencing.
v3: added etna_cmd_stream_flush2 to etnaviv/etnaviv-symbol-check
v2: renamed etna_cmd_stream_flush_explicit to etna_cmd_stream_flush2
Signed-off-by: Philipp Zabel <p....@pe...>
Reviewed-by: Eric Engestrom <eri...@im...>
Reviewed-by: Christian Gmeiner <chr...@gm...>
Signed-off-by: Lucas Stach <l....@pe...>
diff --git a/etnaviv/etnaviv-symbol-check b/etnaviv/etnaviv-symbol-check
index 22afd168..0e2030e4 100755
--- a/etnaviv/etnaviv-symbol-check
+++ b/etnaviv/etnaviv-symbol-check
@@ -39,6 +39,7 @@ etna_cmd_stream_new
etna_cmd_stream_del
etna_cmd_stream_timestamp
etna_cmd_stream_flush
+etna_cmd_stream_flush2
etna_cmd_stream_finish
etna_cmd_stream_reloc
EOF
diff --git a/etnaviv/etnaviv_cmd_stream.c b/etnaviv/etnaviv_cmd_stream.c
index 9ce3f363..3c7b0ed6 100644
--- a/etnaviv/etnaviv_cmd_stream.c
+++ b/etnaviv/etnaviv_cmd_stream.c
@@ -177,7 +177,8 @@ static uint32_t bo2idx(struct etna_cmd_stream *stream, struct etna_bo *bo,
return idx;
}
-static void flush(struct etna_cmd_stream *stream)
+static void flush(struct etna_cmd_stream *stream, int in_fence_fd,
+ int *out_fence_fd)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
int ret, id = priv->pipe->id;
@@ -194,8 +195,22 @@ static void flush(struct etna_cmd_stream *stream)
.stream_size = stream->offset * 4, /* in bytes */
};
+ if (in_fence_fd != -1) {
+ req.flags |= ETNA_SUBMIT_FENCE_FD_IN | ETNA_SUBMIT_NO_IMPLICIT;
+ req.fence_fd = in_fence_fd;
+ }
+
+ if (out_fence_fd)
+ req.flags |= ETNA_SUBMIT_FENCE_FD_OUT;
+
+ /*
+ * Pass the complete submit structure only if flags are set. Otherwise,
+ * only pass the fields up to, but not including the flags field for
+ * backwards compatiblity with older kernels.
+ */
ret = drmCommandWriteRead(gpu->dev->fd, DRM_ETNAVIV_GEM_SUBMIT,
- &req, sizeof(req));
+ &req, req.flags ? sizeof(req) :
+ offsetof(struct drm_etnaviv_gem_submit, flags));
if (ret)
ERROR_MSG("submit failed: %d (%s)", ret, strerror(errno));
@@ -208,11 +223,21 @@ static void flush(struct etna_cmd_stream *stream)
bo->current_stream = NULL;
etna_bo_del(bo);
}
+
+ if (out_fence_fd)
+ *out_fence_fd = req.fence_fd;
}
void etna_cmd_stream_flush(struct etna_cmd_stream *stream)
{
- flush(stream);
+ flush(stream, -1, NULL);
+ reset_buffer(stream);
+}
+
+void etna_cmd_stream_flush2(struct etna_cmd_stream *stream, int in_fence_fd,
+ int *out_fence_fd)
+{
+ flush(stream, in_fence_fd, out_fence_fd);
reset_buffer(stream);
}
@@ -220,7 +245,7 @@ void etna_cmd_stream_finish(struct etna_cmd_stream *stream)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
- flush(stream);
+ flush(stream, -1, NULL);
etna_pipe_wait(priv->pipe, priv->last_timestamp, 5000);
reset_buffer(stream);
}
diff --git a/etnaviv/etnaviv_drmif.h b/etnaviv/etnaviv_drmif.h
index 8119baad..87704acd 100644
--- a/etnaviv/etnaviv_drmif.h
+++ b/etnaviv/etnaviv_drmif.h
@@ -142,6 +142,8 @@ struct etna_cmd_stream *etna_cmd_stream_new(struct etna_pipe *pipe, uint32_t siz
void etna_cmd_stream_del(struct etna_cmd_stream *stream);
uint32_t etna_cmd_stream_timestamp(struct etna_cmd_stream *stream);
void etna_cmd_stream_flush(struct etna_cmd_stream *stream);
+void etna_cmd_stream_flush2(struct etna_cmd_stream *stream, int in_fence_fd,
+ int *out_fence_fd);
void etna_cmd_stream_finish(struct etna_cmd_stream *stream);
static inline uint32_t etna_cmd_stream_avail(struct etna_cmd_stream *stream)
commit 26e51e413be72256d4d416f8a9b9d04a78bfbf18
Author: Philipp Zabel <p....@pe...>
Date: Mon Apr 10 11:15:52 2017 +0200
etnaviv: sync uapi header
Import the etnaviv header changes from kernel commits 9ad59fea162c
("drm/etnaviv: submit support for in-fences") and 78ec187f64fa
("drm/etnaviv: submit support for out-fences") for fence fd support.
The drm_etnaviv_gem_submit structure was extended to include a flags
field, new flags for in-fence and out-fence fds and an input/output
fence fd field.
This is one-way backwards compatible because old userspace code passing
a short structure not including the flags field to new kernels will
cause the remaining fields to be zero-filled. New userspace code must
make sure to only pass the short structure to old kernels, though.
Not generated using make headers_install, since the drm/etnaviv_drm.h
uapi header is not installed yet by the kernel.
Copied from the airlied/drm-next commit 78ec187f64fa.
v2: improved commit message
Signed-off-by: Philipp Zabel <p....@pe...>
Reviewed-by: Christian Gmeiner <chr...@gm...>
Signed-off-by: Lucas Stach <l....@pe...>
diff --git a/etnaviv/etnaviv_drm.h b/etnaviv/etnaviv_drm.h
index 2584c1cc..76f6f78a 100644
--- a/etnaviv/etnaviv_drm.h
+++ b/etnaviv/etnaviv_drm.h
@@ -154,6 +154,12 @@ struct drm_etnaviv_gem_submit_bo {
* one or more cmdstream buffers. This allows for conditional execution
* (context-restore), and IB buffers needed for per tile/bin draw cmds.
*/
+#define ETNA_SUBMIT_NO_IMPLICIT 0x0001
+#define ETNA_SUBMIT_FENCE_FD_IN 0x0002
+#define ETNA_SUBMIT_FENCE_FD_OUT 0x0004
+#define ETNA_SUBMIT_FLAGS (ETNA_SUBMIT_NO_IMPLICIT | \
+ ETNA_SUBMIT_FENCE_FD_IN | \
+ ETNA_SUBMIT_FENCE_FD_OUT)
#define ETNA_PIPE_3D 0x00
#define ETNA_PIPE_2D 0x01
#define ETNA_PIPE_VG 0x02
@@ -167,6 +173,8 @@ struct drm_etnaviv_gem_submit {
__u64 bos; /* in, ptr to array of submit_bo's */
__u64 relocs; /* in, ptr to array of submit_reloc's */
__u64 stream; /* in, ptr to cmdstream */
+ __u32 flags; /* in, mask of ETNA_SUBMIT_x */
+ __s32 fence_fd; /* in/out, fence fd (see ETNA_SUBMIT_FENCE_FD_x) */
};
/* The normal way to synchronize with the GPU is just to CPU_PREP on
|
|
From: <nh...@ke...> - 2017-04-18 19:07:55
|
amdgpu/amdgpu-symbol-check | 1
amdgpu/amdgpu.h | 23 ++++++++++
amdgpu/amdgpu_cs.c | 71 +++++++++++++++++++++++++++++++
tests/amdgpu/basic_tests.c | 100 +++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 195 insertions(+)
New commits:
commit 90c304584af8e1bac6391530f59bbe9ccac8e06a
Author: Nicolai Hähnle <nic...@am...>
Date: Thu Apr 13 16:43:58 2017 +0200
amdgpu: add a test for amdgpu_cs_wait_fences
Signed-off-by: monk.liu <Mon...@am...>
[v2: actually hook up the test case]
Signed-off-by: Nicolai Hähnle <nic...@am...>
Reviewed-by: Alex Deucher <ale...@am...>
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 4dce67e9..8d5844b6 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -45,6 +45,7 @@ static void amdgpu_query_info_test(void);
static void amdgpu_memory_alloc(void);
static void amdgpu_command_submission_gfx(void);
static void amdgpu_command_submission_compute(void);
+static void amdgpu_command_submission_multi_fence(void);
static void amdgpu_command_submission_sdma(void);
static void amdgpu_userptr_test(void);
static void amdgpu_semaphore_test(void);
@@ -59,6 +60,7 @@ CU_TestInfo basic_tests[] = {
{ "Userptr Test", amdgpu_userptr_test },
{ "Command submission Test (GFX)", amdgpu_command_submission_gfx },
{ "Command submission Test (Compute)", amdgpu_command_submission_compute },
+ { "Command submission Test (Multi-Fence)", amdgpu_command_submission_multi_fence },
{ "Command submission Test (SDMA)", amdgpu_command_submission_sdma },
{ "SW semaphore Test", amdgpu_semaphore_test },
CU_TEST_INFO_NULL,
@@ -1149,6 +1151,104 @@ static void amdgpu_command_submission_sdma(void)
amdgpu_command_submission_sdma_copy_linear();
}
+static void amdgpu_command_submission_multi_fence_wait_all(bool wait_all)
+{
+ amdgpu_context_handle context_handle;
+ amdgpu_bo_handle ib_result_handle, ib_result_ce_handle;
+ void *ib_result_cpu, *ib_result_ce_cpu;
+ uint64_t ib_result_mc_address, ib_result_ce_mc_address;
+ struct amdgpu_cs_request ibs_request[2] = {0};
+ struct amdgpu_cs_ib_info ib_info[2];
+ struct amdgpu_cs_fence fence_status[2] = {0};
+ uint32_t *ptr;
+ uint32_t expired;
+ amdgpu_bo_list_handle bo_list;
+ amdgpu_va_handle va_handle, va_handle_ce;
+ int r;
+ int i, ib_cs_num = 2;
+
+ r = amdgpu_cs_ctx_create(device_handle, &context_handle);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
+ AMDGPU_GEM_DOMAIN_GTT, 0,
+ &ib_result_handle, &ib_result_cpu,
+ &ib_result_mc_address, &va_handle);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
+ AMDGPU_GEM_DOMAIN_GTT, 0,
+ &ib_result_ce_handle, &ib_result_ce_cpu,
+ &ib_result_ce_mc_address, &va_handle_ce);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_get_bo_list(device_handle, ib_result_handle,
+ ib_result_ce_handle, &bo_list);
+ CU_ASSERT_EQUAL(r, 0);
+
+ memset(ib_info, 0, 2 * sizeof(struct amdgpu_cs_ib_info));
+
+ /* IT_SET_CE_DE_COUNTERS */
+ ptr = ib_result_ce_cpu;
+ ptr[0] = 0xc0008900;
+ ptr[1] = 0;
+ ptr[2] = 0xc0008400;
+ ptr[3] = 1;
+ ib_info[0].ib_mc_address = ib_result_ce_mc_address;
+ ib_info[0].size = 4;
+ ib_info[0].flags = AMDGPU_IB_FLAG_CE;
+
+ /* IT_WAIT_ON_CE_COUNTER */
+ ptr = ib_result_cpu;
+ ptr[0] = 0xc0008600;
+ ptr[1] = 0x00000001;
+ ib_info[1].ib_mc_address = ib_result_mc_address;
+ ib_info[1].size = 2;
+
+ for (i = 0; i < ib_cs_num; i++) {
+ ibs_request[i].ip_type = AMDGPU_HW_IP_GFX;
+ ibs_request[i].number_of_ibs = 2;
+ ibs_request[i].ibs = ib_info;
+ ibs_request[i].resources = bo_list;
+ ibs_request[i].fence_info.handle = NULL;
+ }
+
+ r = amdgpu_cs_submit(context_handle, 0,ibs_request, ib_cs_num);
+
+ CU_ASSERT_EQUAL(r, 0);
+
+ for (i = 0; i < ib_cs_num; i++) {
+ fence_status[i].context = context_handle;
+ fence_status[i].ip_type = AMDGPU_HW_IP_GFX;
+ fence_status[i].fence = ibs_request[i].seq_no;
+ }
+
+ r = amdgpu_cs_wait_fences(fence_status, ib_cs_num, wait_all,
+ AMDGPU_TIMEOUT_INFINITE,
+ &expired, NULL);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
+ ib_result_mc_address, 4096);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_bo_unmap_and_free(ib_result_ce_handle, va_handle_ce,
+ ib_result_ce_mc_address, 4096);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_bo_list_destroy(bo_list);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_cs_ctx_free(context_handle);
+ CU_ASSERT_EQUAL(r, 0);
+}
+
+static void amdgpu_command_submission_multi_fence(void)
+{
+ amdgpu_command_submission_multi_fence_wait_all(true);
+ amdgpu_command_submission_multi_fence_wait_all(false);
+}
+
static void amdgpu_userptr_test(void)
{
int i, r, j;
commit d8d45a4938d99337503197fe6d28cbf20b16cc32
Author: Nicolai Hähnle <nic...@am...>
Date: Thu Apr 13 16:43:14 2017 +0200
amdgpu: add the interface of waiting multiple fences
Signed-off-by: Junwei Zhang <Jer...@am...>
[v2: allow returning the first signaled fence index]
Signed-off-by: monk.liu <Mon...@am...>
[v3:
- cleanup *status setting
- fix amdgpu symbols check
v4: simplify return from amdgpu_cs_wait_fences (suggested
by Edward O'Callaghan)]
Signed-off-by: Nicolai Hähnle <nic...@am...>
Reviewed-by: Christian König <chr...@am...> (v1)
Reviewed-by: Jammy Zhou <Jam...@am...> (v1)
Reviewed-by: Alex Deucher <ale...@am...>
diff --git a/amdgpu/amdgpu-symbol-check b/amdgpu/amdgpu-symbol-check
index 4d1ae65c..81ef9b4e 100755
--- a/amdgpu/amdgpu-symbol-check
+++ b/amdgpu/amdgpu-symbol-check
@@ -33,6 +33,7 @@ amdgpu_cs_query_fence_status
amdgpu_cs_query_reset_state
amdgpu_cs_signal_semaphore
amdgpu_cs_submit
+amdgpu_cs_wait_fences
amdgpu_cs_wait_semaphore
amdgpu_device_deinitialize
amdgpu_device_initialize
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 55884b24..fdea9050 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -907,6 +907,29 @@ int amdgpu_cs_query_fence_status(struct amdgpu_cs_fence *fence,
uint64_t flags,
uint32_t *expired);
+/**
+ * Wait for multiple fences
+ *
+ * \param fences - \c [in] The fence array to wait
+ * \param fence_count - \c [in] The fence count
+ * \param wait_all - \c [in] If true, wait all fences to be signaled,
+ * otherwise, wait at least one fence
+ * \param timeout_ns - \c [in] The timeout to wait, in nanoseconds
+ * \param status - \c [out] '1' for signaled, '0' for timeout
+ * \param first - \c [out] the index of the first signaled fence from @fences
+ *
+ * \return 0 on success
+ * <0 - Negative POSIX Error code
+ *
+ * \note Currently it supports only one amdgpu_device. All fences come from
+ * the same amdgpu_device with the same fd.
+*/
+int amdgpu_cs_wait_fences(struct amdgpu_cs_fence *fences,
+ uint32_t fence_count,
+ bool wait_all,
+ uint64_t timeout_ns,
+ uint32_t *status, uint32_t *first);
+
/*
* Query / Info API
*
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
index fb5b3a8c..779c7dbc 100644
--- a/amdgpu/amdgpu_cs.c
+++ b/amdgpu/amdgpu_cs.c
@@ -443,6 +443,77 @@ int amdgpu_cs_query_fence_status(struct amdgpu_cs_fence *fence,
return r;
}
+static int amdgpu_ioctl_wait_fences(struct amdgpu_cs_fence *fences,
+ uint32_t fence_count,
+ bool wait_all,
+ uint64_t timeout_ns,
+ uint32_t *status,
+ uint32_t *first)
+{
+ struct drm_amdgpu_fence *drm_fences;
+ amdgpu_device_handle dev = fences[0].context->dev;
+ union drm_amdgpu_wait_fences args;
+ int r;
+ uint32_t i;
+
+ drm_fences = alloca(sizeof(struct drm_amdgpu_fence) * fence_count);
+ for (i = 0; i < fence_count; i++) {
+ drm_fences[i].ctx_id = fences[i].context->id;
+ drm_fences[i].ip_type = fences[i].ip_type;
+ drm_fences[i].ip_instance = fences[i].ip_instance;
+ drm_fences[i].ring = fences[i].ring;
+ drm_fences[i].seq_no = fences[i].fence;
+ }
+
+ memset(&args, 0, sizeof(args));
+ args.in.fences = (uint64_t)(uintptr_t)drm_fences;
+ args.in.fence_count = fence_count;
+ args.in.wait_all = wait_all;
+ args.in.timeout_ns = amdgpu_cs_calculate_timeout(timeout_ns);
+
+ r = drmIoctl(dev->fd, DRM_IOCTL_AMDGPU_WAIT_FENCES, &args);
+ if (r)
+ return -errno;
+
+ *status = args.out.status;
+
+ if (first)
+ *first = args.out.first_signaled;
+
+ return 0;
+}
+
+int amdgpu_cs_wait_fences(struct amdgpu_cs_fence *fences,
+ uint32_t fence_count,
+ bool wait_all,
+ uint64_t timeout_ns,
+ uint32_t *status,
+ uint32_t *first)
+{
+ uint32_t i;
+
+ /* Sanity check */
+ if (NULL == fences)
+ return -EINVAL;
+ if (NULL == status)
+ return -EINVAL;
+ if (fence_count <= 0)
+ return -EINVAL;
+ for (i = 0; i < fence_count; i++) {
+ if (NULL == fences[i].context)
+ return -EINVAL;
+ if (fences[i].ip_type >= AMDGPU_HW_IP_NUM)
+ return -EINVAL;
+ if (fences[i].ring >= AMDGPU_CS_MAX_RINGS)
+ return -EINVAL;
+ }
+
+ *status = 0;
+
+ return amdgpu_ioctl_wait_fences(fences, fence_count, wait_all,
+ timeout_ns, status, first);
+}
+
int amdgpu_cs_create_semaphore(amdgpu_semaphore_handle *sem)
{
struct amdgpu_semaphore *gpu_semaphore;
|
|
From: <an...@ke...> - 2017-04-25 23:11:10
|
tests/util/kms.c | 3 +++
1 file changed, 3 insertions(+)
New commits:
commit 2ee1fd2470e96473f27080c01c5ecd710a6ab6c8
Author: Eric Anholt <er...@an...>
Date: Tue Apr 25 11:31:27 2017 -0700
Add the DPI encoder/connector types to KMS utils.
Signed-off-by: Eric Anholt <er...@an...>
Reviewed-by: Daniel Stone <da...@co...>
diff --git a/tests/util/kms.c b/tests/util/kms.c
index c008f78a..028cc8d9 100644
--- a/tests/util/kms.c
+++ b/tests/util/kms.c
@@ -79,6 +79,7 @@ static const struct type_name encoder_type_names[] = {
{ DRM_MODE_ENCODER_VIRTUAL, "Virtual" },
{ DRM_MODE_ENCODER_DSI, "DSI" },
{ DRM_MODE_ENCODER_DPMST, "DPMST" },
+ { DRM_MODE_ENCODER_DPI, "DPI" },
};
const char *util_lookup_encoder_type_name(unsigned int type)
@@ -117,6 +118,7 @@ static const struct type_name connector_type_names[] = {
{ DRM_MODE_CONNECTOR_eDP, "eDP" },
{ DRM_MODE_CONNECTOR_VIRTUAL, "Virtual" },
{ DRM_MODE_CONNECTOR_DSI, "DSI" },
+ { DRM_MODE_CONNECTOR_DPI, "DPI" },
};
const char *util_lookup_connector_type_name(unsigned int type)
commit d75a7ef1d7353cd122e5f8e975e69d2446eaad74
Author: Eric Anholt <er...@an...>
Date: Tue Apr 25 11:29:33 2017 -0700
Add pl111 as a KMS driver for utils.
Signed-off-by: Eric Anholt <er...@an...>
Reviewed-by: Daniel Stone <da...@co...>
diff --git a/tests/util/kms.c b/tests/util/kms.c
index 959b6881..c008f78a 100644
--- a/tests/util/kms.c
+++ b/tests/util/kms.c
@@ -145,6 +145,7 @@ static const char * const modules[] = {
"virtio_gpu",
"mediatek",
"meson",
+ "pl111",
};
int util_open(const char *device, const char *module)
|
|
From: <aj...@ke...> - 2017-05-04 18:38:21
|
configure.ac | 4 ++++
xf86drm.c | 18 +++++++++---------
xf86drm.h | 2 ++
3 files changed, 15 insertions(+), 9 deletions(-)
New commits:
commit 7040fea0280bad527ed4b3d5eee7d7bfbf303efc
Author: Adam Jackson <aj...@re...>
Date: Thu May 4 12:25:01 2017 -0400
configure: Fix the <sys/sysmacros.h> check
AC_HEADER_MAJOR only defines MAJOR_IN_SYSMACROS if major() is _not_
defined by <sys/types.h> alone. It is, but it warns, and that's ugly.
To fix this, push -Werror into CFLAGS when invoking AC_HEADER_MAJOR so
the warning makes the compilation test fail.
Reviewed-by: Emil Velikov <emi...@co...>
Signed-off-by: Adam Jackson <aj...@re...>
diff --git a/configure.ac b/configure.ac
index e5158b7d..43fcf68f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -54,7 +54,11 @@ AC_USE_SYSTEM_EXTENSIONS
AC_SYS_LARGEFILE
AC_FUNC_ALLOCA
+save_CFLAGS="$CFLAGS"
+export CFLAGS="$CFLAGS -Werror"
AC_HEADER_MAJOR
+CFLAGS="$save_CFLAGS"
+
AC_CHECK_HEADERS([sys/sysctl.h sys/select.h])
# Initialize libtool
commit 7c27cd7c5da0b87cea0dacd454307e2613d3b415
Author: Adam Jackson <aj...@re...>
Date: Thu May 4 10:48:56 2017 -0400
Export drmDevicesEqual
drmCompareBusInfo was almost this already, but it wasn't exported, its
name didn't match its functionality, and while it almost looks like it
was usable for sorting due to memcmp it wouldn't work if you had
multiple bus types. I don't really want to think about defining a
sensible sort order for bus types, so let's at least make it less of a
trap for the caller.
Invert its boolean sense to be 'true if equal', rename it to describe
the types it actually operates on, and export.
Reviewed-by: Eric Anholt <er...@an...>
Reviewed-by: Emil Velikov <emi...@co...>
Signed-off-by: Adam Jackson <aj...@re...>
diff --git a/xf86drm.c b/xf86drm.c
index 685cf69d..29fea331 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -3029,32 +3029,32 @@ static int drmParsePciBusInfo(int maj, int min, drmPciBusInfoPtr info)
#endif
}
-static int drmCompareBusInfo(drmDevicePtr a, drmDevicePtr b)
+int drmDevicesEqual(drmDevicePtr a, drmDevicePtr b)
{
if (a == NULL || b == NULL)
- return -1;
+ return 0;
if (a->bustype != b->bustype)
- return -1;
+ return 0;
switch (a->bustype) {
case DRM_BUS_PCI:
- return memcmp(a->businfo.pci, b->businfo.pci, sizeof(drmPciBusInfo));
+ return memcmp(a->businfo.pci, b->businfo.pci, sizeof(drmPciBusInfo)) == 0;
case DRM_BUS_USB:
- return memcmp(a->businfo.usb, b->businfo.usb, sizeof(drmUsbBusInfo));
+ return memcmp(a->businfo.usb, b->businfo.usb, sizeof(drmUsbBusInfo)) == 0;
case DRM_BUS_PLATFORM:
- return memcmp(a->businfo.platform, b->businfo.platform, sizeof(drmPlatformBusInfo));
+ return memcmp(a->businfo.platform, b->businfo.platform, sizeof(drmPlatformBusInfo)) == 0;
case DRM_BUS_HOST1X:
- return memcmp(a->businfo.host1x, b->businfo.host1x, sizeof(drmHost1xBusInfo));
+ return memcmp(a->businfo.host1x, b->businfo.host1x, sizeof(drmHost1xBusInfo)) == 0;
default:
break;
}
- return -1;
+ return 0;
}
static int drmGetNodeType(const char *name)
@@ -3669,7 +3669,7 @@ static void drmFoldDuplicatedDevices(drmDevicePtr local_devices[], int count)
for (i = 0; i < count; i++) {
for (j = i + 1; j < count; j++) {
- if (drmCompareBusInfo(local_devices[i], local_devices[j]) == 0) {
+ if (drmCompareDevices(local_devices[i], local_devices[j])) {
local_devices[i]->available_nodes |= local_devices[j]->available_nodes;
node_type = log2(local_devices[j]->available_nodes);
memcpy(local_devices[i]->nodes[node_type],
diff --git a/xf86drm.h b/xf86drm.h
index d75ca8ce..74f54f17 100644
--- a/xf86drm.h
+++ b/xf86drm.h
@@ -851,6 +851,8 @@ extern void drmFreeDevices(drmDevicePtr devices[], int count);
extern int drmGetDevice2(int fd, uint32_t flags, drmDevicePtr *device);
extern int drmGetDevices2(uint32_t flags, drmDevicePtr devices[], int max_devices);
+extern int drmDevicesEqual(drmDevicePtr a, drmDevicePtr b);
+
#if defined(__cplusplus)
}
#endif
|
|
From: <eri...@ke...> - 2017-06-03 22:40:09
|
include/drm/drm_fourcc.h | 126 +++++++++++++++++++++++++++++++++++++++++++++++
include/drm/drm_sarea.h | 8 ++
2 files changed, 134 insertions(+)
New commits:
commit 48aac8c6ef301be5ed4cf824779baa3c98981a90
Author: Eric Engestrom <eri...@im...>
Date: Wed May 31 14:47:40 2017 +0100
headers: sync drm_sarea.h with airlied/drm-next
Adds the C++ extern guards from
ebbb0e5cfd2ceb1150b1 drm: add extern C guard for the UAPI headers
Generated using `make headers_install` from airlied/drm-next
at commit 2a1720376adda5ecf8e636fbfb05339c7dad1c55
Signed-off-by: Eric Engestrom <eri...@im...>
Reviewed-by: Emil Velikov <emi...@co...>
diff --git a/include/drm/drm_sarea.h b/include/drm/drm_sarea.h
index 502934ed..93025be8 100644
--- a/include/drm/drm_sarea.h
+++ b/include/drm/drm_sarea.h
@@ -34,6 +34,10 @@
#include "drm.h"
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
/* SAREA area needs to be at least a page */
#if defined(__alpha__)
#define SAREA_MAX 0x2000U
@@ -81,4 +85,8 @@ typedef struct drm_sarea_drawable drm_sarea_drawable_t;
typedef struct drm_sarea_frame drm_sarea_frame_t;
typedef struct drm_sarea drm_sarea_t;
+#if defined(__cplusplus)
+}
+#endif
+
#endif /* _DRM_SAREA_H_ */
commit 1b8db1777983b917384c2ed78ed5a2ab653d9e55
Author: Eric Engestrom <eri...@im...>
Date: Wed May 31 13:48:53 2017 +0100
headers: sync drm_fourcc.h with airlied/drm-next
This adds a bunch of modifiers stuff, as well as a few new formats.
Includes the following changes:
ebbb0e5cfd2ceb1150b1 drm: add extern C guard for the UAPI headers
b9fb2a21ac8058965a6b drm_fourcc: Document linear modifier
af913418261d6d3e7a29 drm_fourcc: Fix DRM_FORMAT_MOD_LINEAR #define
fd056f05b9fcba35b77e drm: add fourcc codes for 16bit R and RG
73f1a5858bf82f3bf232 drm/fourcc: add vivante tiled layout format modifiers
ba2b5277dc52cc96944d drm: add RGB formats with separate alpha plane
5e91144dd702d068b22a drm/tegra: Add tiling FB modifiers
Generated using `make headers_install` from airlied/drm-next
at commit 2a1720376adda5ecf8e636fbfb05339c7dad1c55
Signed-off-by: Eric Engestrom <eri...@im...>
Reviewed-by: Emil Velikov <emi...@co...>
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index 4d8da699..55e30104 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -26,6 +26,10 @@
#include "drm.h"
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
#define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
((__u32)(c) << 16) | ((__u32)(d) << 24))
@@ -37,10 +41,17 @@
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
+/* 32 bpp RG */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
@@ -103,6 +114,20 @@
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
/*
+ * 2 plane RGB + A
+ * index 0 = RGB plane, same format as the corresponding non _A8 format has
+ * index 1 = A plane, [7:0] A
+ */
+#define DRM_FORMAT_XRGB8888_A8 fourcc_code('X', 'R', 'A', '8')
+#define DRM_FORMAT_XBGR8888_A8 fourcc_code('X', 'B', 'A', '8')
+#define DRM_FORMAT_RGBX8888_A8 fourcc_code('R', 'X', 'A', '8')
+#define DRM_FORMAT_BGRX8888_A8 fourcc_code('B', 'X', 'A', '8')
+#define DRM_FORMAT_RGB888_A8 fourcc_code('R', '8', 'A', '8')
+#define DRM_FORMAT_BGR888_A8 fourcc_code('B', '8', 'A', '8')
+#define DRM_FORMAT_RGB565_A8 fourcc_code('R', '5', 'A', '8')
+#define DRM_FORMAT_BGR565_A8 fourcc_code('B', '5', 'A', '8')
+
+/*
* 2 plane YCbCr
* index 0 = Y plane, [7:0] Y
* index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
@@ -150,11 +175,13 @@
/* Vendor Ids: */
#define DRM_FORMAT_MOD_NONE 0
+#define DRM_FORMAT_MOD_VENDOR_NONE 0
#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01
#define DRM_FORMAT_MOD_VENDOR_AMD 0x02
#define DRM_FORMAT_MOD_VENDOR_NV 0x03
#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
+#define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06
/* add more to the end as needed */
#define fourcc_mod_code(vendor, val) \
@@ -168,6 +195,16 @@
* authoritative source for all of these.
*/
+/*
+ * Linear Layout
+ *
+ * Just plain linear layout. Note that this is different from no specifying any
+ * modifier (e.g. not setting DRM_MODE_FB_MODIFIERS in the DRM_ADDFB2 ioctl),
+ * which tells the driver to also take driver-internal information into account
+ * and so might actually result in a tiled framebuffer.
+ */
+#define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0)
+
/* Intel framebuffer modifiers */
/*
@@ -229,4 +266,93 @@
*/
#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
+/* Vivante framebuffer modifiers */
+
+/*
+ * Vivante 4x4 tiling layout
+ *
+ * This is a simple tiled layout using tiles of 4x4 pixels in a row-major
+ * layout.
+ */
+#define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1)
+
+/*
+ * Vivante 64x64 super-tiling layout
+ *
+ * This is a tiled layout using 64x64 pixel super-tiles, where each super-tile
+ * contains 8x4 groups of 2x4 tiles of 4x4 pixels (like above) each, all in row-
+ * major layout.
+ *
+ * For more information: see
+ * https://github.com/etnaviv/etna_viv/blob/master/doc/hardware.md#texture-tiling
+ */
+#define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2)
+
+/*
+ * Vivante 4x4 tiling layout for dual-pipe
+ *
+ * Same as the 4x4 tiling layout, except every second 4x4 pixel tile starts at a
+ * different base address. Offsets from the base addresses are therefore halved
+ * compared to the non-split tiled layout.
+ */
+#define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3)
+
+/*
+ * Vivante 64x64 super-tiling layout for dual-pipe
+ *
+ * Same as the 64x64 super-tiling layout, except every second 4x4 pixel tile
+ * starts at a different base address. Offsets from the base addresses are
+ * therefore halved compared to the non-split super-tiled layout.
+ */
+#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
+
+
+/* NVIDIA Tegra frame buffer modifiers */
+
+/*
+ * Some modifiers take parameters, for example the number of vertical GOBs in
+ * a block. Reserve the lower 32 bits for parameters
+ */
+#define __fourcc_mod_tegra_mode_shift 32
+#define fourcc_mod_tegra_code(val, params) \
+ fourcc_mod_code(NV, ((((__u64)val) << __fourcc_mod_tegra_mode_shift) | params))
+#define fourcc_mod_tegra_mod(m) \
+ (m & ~((1ULL << __fourcc_mod_tegra_mode_shift) - 1))
+#define fourcc_mod_tegra_param(m) \
+ (m & ((1ULL << __fourcc_mod_tegra_mode_shift) - 1))
+
+/*
+ * Tegra Tiled Layout, used by Tegra 2, 3 and 4.
+ *
+ * Pixels are arranged in simple tiles of 16 x 16 bytes.
+ */
+#define NV_FORMAT_MOD_TEGRA_TILED fourcc_mod_tegra_code(1, 0)
+
+/*
+ * Tegra 16Bx2 Block Linear layout, used by TK1/TX1
+ *
+ * Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
+ * vertically by a power of 2 (1 to 32 GOBs) to form a block.
+ *
+ * Within a GOB, data is ordered as 16B x 2 lines sectors laid in Z-shape.
+ *
+ * Parameter 'v' is the log2 encoding of the number of GOBs stacked vertically.
+ * Valid values are:
+ *
+ * 0 == ONE_GOB
+ * 1 == TWO_GOBS
+ * 2 == FOUR_GOBS
+ * 3 == EIGHT_GOBS
+ * 4 == SIXTEEN_GOBS
+ * 5 == THIRTYTWO_GOBS
+ *
+ * Chapter 20 "Pixel Memory Formats" of the Tegra X1 TRM describes this format
+ * in full detail.
+ */
+#define NV_FORMAT_MOD_TEGRA_16BX2_BLOCK(v) fourcc_mod_tegra_code(2, v)
+
+#if defined(__cplusplus)
+}
+#endif
+
#endif /* DRM_FOURCC_H */
|
|
From: <ai...@ke...> - 2017-06-28 19:33:32
|
include/drm/drm.h | 26 +++++++++++++++++
xf86drm.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
xf86drm.h | 8 +++++
3 files changed, 115 insertions(+)
New commits:
commit fc4922793f1871577bb44b1d69ec3801acb23eb6
Author: Dave Airlie <ai...@re...>
Date: Sat Jun 17 11:01:01 2017 +1000
libdrm: add drm syncobj create/destroy/import/export
These ioctls are now in drm next so add the first set of libdrm APIs.
Reviewed-by: Eric Anholt <er...@an...>
Signed-off-by: Dave Airlie <ai...@re...>
diff --git a/xf86drm.c b/xf86drm.c
index 728ac78c..2ac3f265 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -4146,3 +4146,84 @@ char *drmGetDeviceNameFromFd2(int fd)
return strdup(node);
#endif
}
+
+int drmSyncobjCreate(int fd, uint32_t flags, uint32_t *handle)
+{
+ struct drm_syncobj_create args;
+ int ret;
+
+ memclear(args);
+ args.flags = flags;
+ args.handle = 0;
+ ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_CREATE, &args);
+ if (ret)
+ return ret;
+ *handle = args.handle;
+ return 0;
+}
+
+int drmSyncobjDestroy(int fd, uint32_t handle)
+{
+ struct drm_syncobj_destroy args;
+
+ memclear(args);
+ args.handle = handle;
+ return drmIoctl(fd, DRM_IOCTL_SYNCOBJ_DESTROY, &args);
+}
+
+int drmSyncobjHandleToFD(int fd, uint32_t handle, int *obj_fd)
+{
+ struct drm_syncobj_handle args;
+ int ret;
+
+ memclear(args);
+ args.fd = -1;
+ args.handle = handle;
+ ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, &args);
+ if (ret)
+ return ret;
+ *obj_fd = args.fd;
+ return 0;
+}
+
+int drmSyncobjFDToHandle(int fd, int obj_fd, uint32_t *handle)
+{
+ struct drm_syncobj_handle args;
+ int ret;
+
+ memclear(args);
+ args.fd = obj_fd;
+ args.handle = 0;
+ ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, &args);
+ if (ret)
+ return ret;
+ *handle = args.handle;
+ return 0;
+}
+
+int drmSyncobjImportSyncFile(int fd, uint32_t handle, int sync_file_fd)
+{
+ struct drm_syncobj_handle args;
+
+ memclear(args);
+ args.fd = sync_file_fd;
+ args.handle = handle;
+ args.flags = DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE;
+ return drmIoctl(fd, DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, &args);
+}
+
+int drmSyncobjExportSyncFile(int fd, uint32_t handle, int *sync_file_fd)
+{
+ struct drm_syncobj_handle args;
+ int ret;
+
+ memclear(args);
+ args.fd = -1;
+ args.handle = handle;
+ args.flags = DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE;
+ ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, &args);
+ if (ret)
+ return ret;
+ *sync_file_fd = args.fd;
+ return 0;
+}
diff --git a/xf86drm.h b/xf86drm.h
index 74f54f17..2855a3ee 100644
--- a/xf86drm.h
+++ b/xf86drm.h
@@ -853,6 +853,14 @@ extern int drmGetDevices2(uint32_t flags, drmDevicePtr devices[], int max_device
extern int drmDevicesEqual(drmDevicePtr a, drmDevicePtr b);
+extern int drmSyncobjCreate(int fd, uint32_t flags, uint32_t *handle);
+extern int drmSyncobjDestroy(int fd, uint32_t handle);
+extern int drmSyncobjHandleToFD(int fd, uint32_t handle, int *obj_fd);
+extern int drmSyncobjFDToHandle(int fd, int obj_fd, uint32_t *handle);
+
+extern int drmSyncobjImportSyncFile(int fd, uint32_t handle, int sync_file_fd);
+extern int drmSyncobjExportSyncFile(int fd, uint32_t handle, int *sync_file_fd);
+
#if defined(__cplusplus)
}
#endif
commit 3832374dafb8d0b1b69d8856be28352514afab5d
Author: Dave Airlie <ai...@re...>
Date: Thu Jun 29 05:27:39 2017 +1000
drm: update drm.h to latest in drm-next.
This syncs the drm.h header with my drm-next branch as of
6d61e70ccc21606ffb8a0a03bd3aba24f659502b.
It brings over the semaphore API changes.
Generated using make headers_install.
Generated from git://people.freedesktop.org/~airlied/linux drm-next commit 6d61e70ccc2.
[airlied: I split patch in two, split reviewed by across both]
Reviewed-by: Eric Anholt <er...@an...>
Signed-off-by: Dave Airlie <ai...@re...>
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 1e7a4bc7..bf3674ae 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -642,6 +642,7 @@ struct drm_gem_open {
#define DRM_CAP_ADDFB2_MODIFIERS 0x10
#define DRM_CAP_PAGE_FLIP_TARGET 0x11
#define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12
+#define DRM_CAP_SYNCOBJ 0x13
/** DRM_IOCTL_GET_CAP ioctl argument type */
struct drm_get_cap {
@@ -691,6 +692,26 @@ struct drm_prime_handle {
__s32 fd;
};
+struct drm_syncobj_create {
+ __u32 handle;
+ __u32 flags;
+};
+
+struct drm_syncobj_destroy {
+ __u32 handle;
+ __u32 pad;
+};
+
+#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
+#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
+struct drm_syncobj_handle {
+ __u32 handle;
+ __u32 flags;
+
+ __s32 fd;
+ __u32 pad;
+};
+
#if defined(__cplusplus)
}
#endif
@@ -809,6 +830,11 @@ extern "C" {
#define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob)
#define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
+#define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create)
+#define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy)
+#define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle)
+#define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle)
+
/**
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x9f.
|
|
From: <ai...@ke...> - 2017-07-18 23:33:53
|
amdgpu/amdgpu.h | 85 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
amdgpu/amdgpu_cs.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 169 insertions(+), 1 deletion(-)
New commits:
commit 22790a65d4a12c43ddbb266cb5985a9ab6b29662
Author: Dave Airlie <ai...@re...>
Date: Tue Jul 18 01:31:27 2017 +0100
drm/amdgpu: add new low overhead command submission API. (v2)
This just sends chunks to the kernel API for a single command
stream.
This should provide a more future proof and extensible API
for command submission.
v2: use amdgpu_bo_list_handle, add two helper functions to
access bo and context internals.
Reviewed-by: Christian König <chr...@am...>
Signed-off-by: Dave Airlie <ai...@re...>
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 183f974c..238b1aaa 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1382,6 +1382,36 @@ int amdgpu_cs_import_syncobj(amdgpu_device_handle dev,
int shared_fd,
uint32_t *syncobj);
+/**
+ * Submit raw command submission to kernel
+ *
+ * \param dev - \c [in] device handle
+ * \param context - \c [in] context handle for context id
+ * \param bo_list_handle - \c [in] request bo list handle (0 for none)
+ * \param num_chunks - \c [in] number of CS chunks to submit
+ * \param chunks - \c [in] array of CS chunks
+ * \param seq_no - \c [out] output sequence number for submission.
+ *
+ * \return 0 on success\n
+ * <0 - Negative POSIX Error code
+ *
+ */
+struct drm_amdgpu_cs_chunk;
+struct drm_amdgpu_cs_chunk_dep;
+struct drm_amdgpu_cs_chunk_data;
+
+int amdgpu_cs_submit_raw(amdgpu_device_handle dev,
+ amdgpu_context_handle context,
+ amdgpu_bo_list_handle bo_list_handle,
+ int num_chunks,
+ struct drm_amdgpu_cs_chunk *chunks,
+ uint64_t *seq_no);
+
+void amdgpu_cs_chunk_fence_to_dep(struct amdgpu_cs_fence *fence,
+ struct drm_amdgpu_cs_chunk_dep *dep);
+void amdgpu_cs_chunk_fence_info_to_data(struct amdgpu_cs_fence_info *fence_info,
+ struct drm_amdgpu_cs_chunk_data *data);
+
#ifdef __cplusplus
}
#endif
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
index 722fd75b..dfba8754 100644
--- a/amdgpu/amdgpu_cs.c
+++ b/amdgpu/amdgpu_cs.c
@@ -634,3 +634,50 @@ int amdgpu_cs_import_syncobj(amdgpu_device_handle dev,
return drmSyncobjFDToHandle(dev->fd, shared_fd, handle);
}
+
+int amdgpu_cs_submit_raw(amdgpu_device_handle dev,
+ amdgpu_context_handle context,
+ amdgpu_bo_list_handle bo_list_handle,
+ int num_chunks,
+ struct drm_amdgpu_cs_chunk *chunks,
+ uint64_t *seq_no)
+{
+ union drm_amdgpu_cs cs = {0};
+ uint64_t *chunk_array;
+ int i, r;
+ if (num_chunks == 0)
+ return -EINVAL;
+
+ chunk_array = alloca(sizeof(uint64_t) * num_chunks);
+ for (i = 0; i < num_chunks; i++)
+ chunk_array[i] = (uint64_t)(uintptr_t)&chunks[i];
+ cs.in.chunks = (uint64_t)(uintptr_t)chunk_array;
+ cs.in.ctx_id = context->id;
+ cs.in.bo_list_handle = bo_list_handle ? bo_list_handle->handle : 0;
+ cs.in.num_chunks = num_chunks;
+ r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CS,
+ &cs, sizeof(cs));
+ if (r)
+ return r;
+
+ if (seq_no)
+ *seq_no = cs.out.handle;
+ return 0;
+}
+
+void amdgpu_cs_chunk_fence_info_to_data(struct amdgpu_cs_fence_info *fence_info,
+ struct drm_amdgpu_cs_chunk_data *data)
+{
+ data->fence_data.handle = fence_info->handle->handle;
+ data->fence_data.offset = fence_info->offset * sizeof(uint64_t);
+}
+
+void amdgpu_cs_chunk_fence_to_dep(struct amdgpu_cs_fence *fence,
+ struct drm_amdgpu_cs_chunk_dep *dep)
+{
+ dep->ip_type = fence->ip_type;
+ dep->ip_instance = fence->ip_instance;
+ dep->ring = fence->ring;
+ dep->ctx_id = fence->context->id;
+ dep->handle = fence->fence;
+}
commit 69532d0188ffa12454bc26bb1c30c52555a984e0
Author: Dave Airlie <ai...@re...>
Date: Sun Jul 16 20:18:40 2017 +0100
drm/amdgpu: add syncobj create/destroy/import/export apis
These are just wrappers using the amdgpu device handle.
Acked-by: Chunming Zhou <dav...@am...>
Reviewed-by: Christian König <chr...@am...>
Signed-off-by: Dave Airlie <ai...@re...>
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 1901fa8c..183f974c 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1328,8 +1328,61 @@ int amdgpu_cs_destroy_semaphore(amdgpu_semaphore_handle sem);
*/
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev);
+/**
+ * Create kernel sync object
+ *
+ * \param dev - \c [in] device handle
+ * \param syncobj - \c [out] sync object handle
+ *
+ * \return 0 on success\n
+ * <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_cs_create_syncobj(amdgpu_device_handle dev,
+ uint32_t *syncobj);
+/**
+ * Destroy kernel sync object
+ *
+ * \param dev - \c [in] device handle
+ * \param syncobj - \c [in] sync object handle
+ *
+ * \return 0 on success\n
+ * <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_cs_destroy_syncobj(amdgpu_device_handle dev,
+ uint32_t syncobj);
+
+/**
+ * Export kernel sync object to shareable fd.
+ *
+ * \param dev - \c [in] device handle
+ * \param syncobj - \c [in] sync object handle
+ * \param shared_fd - \c [out] shared file descriptor.
+ *
+ * \return 0 on success\n
+ * <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_cs_export_syncobj(amdgpu_device_handle dev,
+ uint32_t syncobj,
+ int *shared_fd);
+/**
+ * Import kernel sync object from shareable fd.
+ *
+ * \param dev - \c [in] device handle
+ * \param shared_fd - \c [in] shared file descriptor.
+ * \param syncobj - \c [out] sync object handle
+ *
+ * \return 0 on success\n
+ * <0 - Negative POSIX Error code
+ *
+*/
+int amdgpu_cs_import_syncobj(amdgpu_device_handle dev,
+ int shared_fd,
+ uint32_t *syncobj);
+
#ifdef __cplusplus
}
#endif
-
#endif /* #ifdef _AMDGPU_H_ */
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
index 868eb7b0..722fd75b 100644
--- a/amdgpu/amdgpu_cs.c
+++ b/amdgpu/amdgpu_cs.c
@@ -596,3 +596,41 @@ int amdgpu_cs_destroy_semaphore(amdgpu_semaphore_handle sem)
{
return amdgpu_cs_unreference_sem(sem);
}
+
+int amdgpu_cs_create_syncobj(amdgpu_device_handle dev,
+ uint32_t *handle)
+{
+ if (NULL == dev)
+ return -EINVAL;
+
+ return drmSyncobjCreate(dev->fd, 0, handle);
+}
+
+int amdgpu_cs_destroy_syncobj(amdgpu_device_handle dev,
+ uint32_t handle)
+{
+ if (NULL == dev)
+ return -EINVAL;
+
+ return drmSyncobjDestroy(dev->fd, handle);
+}
+
+int amdgpu_cs_export_syncobj(amdgpu_device_handle dev,
+ uint32_t handle,
+ int *shared_fd)
+{
+ if (NULL == dev)
+ return -EINVAL;
+
+ return drmSyncobjHandleToFD(dev->fd, handle, shared_fd);
+}
+
+int amdgpu_cs_import_syncobj(amdgpu_device_handle dev,
+ int shared_fd,
+ uint32_t *handle)
+{
+ if (NULL == dev)
+ return -EINVAL;
+
+ return drmSyncobjFDToHandle(dev->fd, shared_fd, handle);
+}
|
|
From: <eve...@ke...> - 2017-07-20 11:31:24
|
xf86drm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
New commits:
commit 3876bc246a07070a6043159cd7623d4def9bbd4c
Author: Emil Velikov <emi...@co...>
Date: Thu Jul 20 12:25:27 2017 +0100
xf86drm: continue with next device if drmProcessUsbDevice fails
Analogous to previous commit (and the rest of the codebase), simply
discard the device if we cannot parse it.
Fixes: f8484ccbd12 ("xf86drm: Add USB support")
Signed-off-by: Emil Velikov <emi...@co...>
diff --git a/xf86drm.c b/xf86drm.c
index f306c9b7..6ea01129 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -3989,7 +3989,7 @@ int drmGetDevices2(uint32_t flags, drmDevicePtr devices[], int max_devices)
ret = drmProcessUsbDevice(&device, node, node_type, maj, min,
devices != NULL, flags);
if (ret)
- goto free_devices;
+ continue;
break;
commit 5226b52773e0a9972cd1e0dade55cb9ae869941c
Author: Gurchetan Singh <gur...@ch...>
Date: Wed Jul 19 08:37:06 2017 -0700
xf86drm: continue after drmProcessPlatformDevice failure
On ChromeOS devices, readdir() processes the directory in
the following order:
-NAME- -TYPE-
. n/a
.. n/a
vgem n/a
card1 DRM_BUS_PLATFORM
renderD129 DRM_BUS_PLATFORM
card0 DRM_BUS_PCI
renderD128 DRM_BUS_PCI
controlD64 DRM_BUS_PCI
In drmGetDevices2, after drmProcessPlatformDevice fails for
/dev/dri/card1, we don't process the remaining directory entries.
As such, Vulkan fails to initialize since Mesa uses drmGetDevices2.
To fix this, continue if drmProcessPlatformDevice fails.
Fixes: 7b1f37f474d ("xf86drm: Add platform and host1x bus support")
Reviewed-by: Emil Velikov <emi...@co...>
[Emil: correct the host1x platforms as well]
Signed-off-by: Emil Velikov <emi...@co...>
diff --git a/xf86drm.c b/xf86drm.c
index 879f85b6..f306c9b7 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -3997,7 +3997,7 @@ int drmGetDevices2(uint32_t flags, drmDevicePtr devices[], int max_devices)
ret = drmProcessPlatformDevice(&device, node, node_type, maj, min,
devices != NULL, flags);
if (ret)
- goto free_devices;
+ continue;
break;
@@ -4005,7 +4005,7 @@ int drmGetDevices2(uint32_t flags, drmDevicePtr devices[], int max_devices)
ret = drmProcessHost1xDevice(&device, node, node_type, maj, min,
devices != NULL, flags);
if (ret)
- goto free_devices;
+ continue;
break;
|
|
From: <ag...@ke...> - 2017-08-08 16:18:39
|
amdgpu/amdgpu_bo.c | 57 ++++++++++++++++++++++++-----------------------
amdgpu/amdgpu_internal.h | 24 -------------------
2 files changed, 30 insertions(+), 51 deletions(-)
New commits:
commit 687d250797ff0028fee949cdd66c9f012f69992d
Author: Monk Liu <mon...@am...>
Date: Tue Aug 8 12:09:07 2017 -0400
amdgpu: merge and cleanup amdgpu_bo_free
since bo_reference and bo_internal_free are
all only used by bo_free, so we just merge them
together
Reviewed-by: Christian König <chr...@am...>
Signed-off-by: Monk Liu <mon...@am...>
Signed-off-by: Alex Deucher <ale...@am...>
diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
index 803fe54c..3853fd03 100644
--- a/amdgpu/amdgpu_bo.c
+++ b/amdgpu/amdgpu_bo.c
@@ -53,27 +53,6 @@ static void amdgpu_close_kms_handle(amdgpu_device_handle dev,
drmIoctl(dev->fd, DRM_IOCTL_GEM_CLOSE, &args);
}
-drm_private void amdgpu_bo_free_internal(amdgpu_bo_handle bo)
-{
- /* Remove the buffer from the hash tables. */
- util_hash_table_remove(bo->dev->bo_handles,
- (void*)(uintptr_t)bo->handle);
- if (bo->flink_name) {
- util_hash_table_remove(bo->dev->bo_flink_names,
- (void*)(uintptr_t)bo->flink_name);
- }
-
- /* Release CPU access. */
- if (bo->cpu_map_count > 0) {
- bo->cpu_map_count = 1;
- amdgpu_bo_cpu_unmap(bo);
- }
-
- amdgpu_close_kms_handle(bo->dev, bo->handle);
- pthread_mutex_destroy(&bo->cpu_access_mutex);
- free(bo);
-}
-
int amdgpu_bo_alloc(amdgpu_device_handle dev,
struct amdgpu_bo_alloc_request *alloc_buffer,
amdgpu_bo_handle *buf_handle)
@@ -417,8 +396,35 @@ int amdgpu_bo_import(amdgpu_device_handle dev,
int amdgpu_bo_free(amdgpu_bo_handle buf_handle)
{
- /* Just drop the reference. */
- amdgpu_bo_reference(&buf_handle, NULL);
+ struct amdgpu_device *dev;
+ struct amdgpu_bo *bo = buf_handle;
+
+ assert(bo != NULL);
+ dev = bo->dev;
+ pthread_mutex_lock(&dev->bo_table_mutex);
+
+ if (update_references(&bo->refcount, NULL)) {
+ /* Remove the buffer from the hash tables. */
+ util_hash_table_remove(dev->bo_handles,
+ (void*)(uintptr_t)bo->handle);
+
+ if (bo->flink_name) {
+ util_hash_table_remove(dev->bo_flink_names,
+ (void*)(uintptr_t)bo->flink_name);
+ }
+
+ /* Release CPU access. */
+ if (bo->cpu_map_count > 0) {
+ bo->cpu_map_count = 1;
+ amdgpu_bo_cpu_unmap(bo);
+ }
+
+ amdgpu_close_kms_handle(dev, bo->handle);
+ pthread_mutex_destroy(&bo->cpu_access_mutex);
+ free(bo);
+ }
+
+ pthread_mutex_unlock(&dev->bo_table_mutex);
return 0;
}
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index 28d1f38f..56d15112 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -143,8 +143,6 @@ struct amdgpu_semaphore {
* Functions.
*/
-drm_private void amdgpu_bo_free_internal(amdgpu_bo_handle bo);
-
drm_private void amdgpu_vamgr_init(struct amdgpu_bo_va_mgr *mgr, uint64_t start,
uint64_t max, uint64_t alignment);
@@ -189,35 +187,4 @@ static inline bool update_references(atomic_t *dst, atomic_t *src)
return false;
}
-/**
- * Assignment between two amdgpu_bo pointers with reference counting.
- *
- * Usage:
- * struct amdgpu_bo *dst = ... , *src = ...;
- *
- * dst = src;
- * // No reference counting. Only use this when you need to move
- * // a reference from one pointer to another.
- *
- * amdgpu_bo_reference(&dst, src);
- * // Reference counters are updated. dst is decremented and src is
- * // incremented. dst is freed if its reference counter is 0.
- */
-static inline void amdgpu_bo_reference(struct amdgpu_bo **dst,
- struct amdgpu_bo *src)
-{
- pthread_mutex_t *mlock;
- struct amdgpu_bo* bo = *dst;
-
- assert(bo != NULL);
- mlock = &bo->dev->bo_table_mutex;
- pthread_mutex_lock(mlock);
-
- if (update_references(&bo->refcount, src?&src->refcount:NULL))
- amdgpu_bo_free_internal(bo);
-
- pthread_mutex_unlock(mlock);
- *dst = src;
-}
-
#endif
commit 2a89ae5d7a7d5845226ed85146140ff4c8788d59
Author: Monk Liu <mon...@am...>
Date: Tue Aug 8 15:34:20 2017 +0800
amdgpu: fix race issue between two bo functions(v2)
there is race issue between two threads on amdgpu_bo_reference and
amdgpu_bo_import, this patch tends to fix it by moving the
pthread_mutex_lock out of bo_free_internal and move to bo_reference
to cover the update_reference part.
The mutex_unlock in bo_import should also cover bo refcount
increasement.
Reviewed-by: Christian König <chr...@am...>
Signed-off-by: Monk Liu <mon...@am...>
Signed-off-by: Alex Deucher <ale...@am...>
diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
index d2725da8..803fe54c 100644
--- a/amdgpu/amdgpu_bo.c
+++ b/amdgpu/amdgpu_bo.c
@@ -56,14 +56,12 @@ static void amdgpu_close_kms_handle(amdgpu_device_handle dev,
drm_private void amdgpu_bo_free_internal(amdgpu_bo_handle bo)
{
/* Remove the buffer from the hash tables. */
- pthread_mutex_lock(&bo->dev->bo_table_mutex);
util_hash_table_remove(bo->dev->bo_handles,
(void*)(uintptr_t)bo->handle);
if (bo->flink_name) {
util_hash_table_remove(bo->dev->bo_flink_names,
(void*)(uintptr_t)bo->flink_name);
}
- pthread_mutex_unlock(&bo->dev->bo_table_mutex);
/* Release CPU access. */
if (bo->cpu_map_count > 0) {
@@ -342,10 +340,9 @@ int amdgpu_bo_import(amdgpu_device_handle dev,
}
if (bo) {
- pthread_mutex_unlock(&dev->bo_table_mutex);
-
/* The buffer already exists, just bump the refcount. */
atomic_inc(&bo->refcount);
+ pthread_mutex_unlock(&dev->bo_table_mutex);
output->buf_handle = bo;
output->alloc_size = bo->alloc_size;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index e68246bf..28d1f38f 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -206,8 +206,17 @@ static inline bool update_references(atomic_t *dst, atomic_t *src)
static inline void amdgpu_bo_reference(struct amdgpu_bo **dst,
struct amdgpu_bo *src)
{
- if (update_references(&(*dst)->refcount, &src->refcount))
- amdgpu_bo_free_internal(*dst);
+ pthread_mutex_t *mlock;
+ struct amdgpu_bo* bo = *dst;
+
+ assert(bo != NULL);
+ mlock = &bo->dev->bo_table_mutex;
+ pthread_mutex_lock(mlock);
+
+ if (update_references(&bo->refcount, src?&src->refcount:NULL))
+ amdgpu_bo_free_internal(bo);
+
+ pthread_mutex_unlock(mlock);
*dst = src;
}
|
|
From: <le...@ke...> - 2017-10-06 19:09:35
|
tests/amdgpu/uvd_enc_tests.c | 31 ++++++++++++++++++++++++-------
tests/amdgpu/uve_ib.h | 4 ++--
2 files changed, 26 insertions(+), 9 deletions(-)
New commits:
commit 2ecafcae8a215d9994fb26a122d97bcb5437c5e8
Author: James Zhu <Jam...@am...>
Date: Thu Oct 5 10:57:42 2017 -0400
tests/amdgpu: fix uvd enc data corruption issue
In uvd encode parameter package, parameters input_pic_luma_pitch and
input_pic_chroma_pitch should be picture width align with hardware alignment.
The hardware alignment is 16 for amdgpu family earlier than AMDGPU_FAMILY_AI,
and 256 for later than and including AMDGPU_FAMILY_AI.
Signed-off-by: James Zhu <Jam...@am...>
Reviewed-by: Leo Liu <le...@am...>
diff --git a/tests/amdgpu/uvd_enc_tests.c b/tests/amdgpu/uvd_enc_tests.c
index 75181035..bbda1312 100644
--- a/tests/amdgpu/uvd_enc_tests.c
+++ b/tests/amdgpu/uvd_enc_tests.c
@@ -272,7 +272,7 @@ static void amdgpu_cs_uvd_enc_create(void)
static void check_result(struct amdgpu_uvd_enc *enc)
{
uint64_t sum;
- uint32_t s = 26382;
+ uint32_t s = 175602;
uint32_t *ptr, size;
int i, j, r;
@@ -463,6 +463,8 @@ static void amdgpu_cs_uvd_enc_encode(void)
ib_cpu[len++] = chroma_offset >> 32;
ib_cpu[len++] = chroma_offset;
memcpy((ib_cpu + len), uve_encode_param, sizeof(uve_encode_param));
+ ib_cpu[len] = ALIGN(enc.width, align);
+ ib_cpu[len + 1] = ALIGN(enc.width, align);
len += sizeof(uve_encode_param) / 4;
memcpy((ib_cpu + len), uve_op_speed_enc_mode, sizeof(uve_op_speed_enc_mode));
diff --git a/tests/amdgpu/uve_ib.h b/tests/amdgpu/uve_ib.h
index 9abd4066..cb72be22 100644
--- a/tests/amdgpu/uve_ib.h
+++ b/tests/amdgpu/uve_ib.h
@@ -297,8 +297,8 @@ static const uint32_t uve_slice_header[] = {
};
static const uint32_t uve_encode_param[] = {
- 0x000000a0,
- 0x00000080,
+ 0x00000000,
+ 0x00000000,
0x00000000,
0x00000000,
0xffffffff,
commit 657b09438bf4978c9597368165c56227013625e9
Author: James Zhu <Jam...@am...>
Date: Thu Oct 5 10:56:51 2017 -0400
tests/amdgpu: add new uvd enc support check
Query hardware IP information to find out if there are uvd encode rings
ready for use in kernel driver.
Signed-off-by: James Zhu <Jam...@am...>
Reviewed-by: Leo Liu <le...@am...>
diff --git a/tests/amdgpu/uvd_enc_tests.c b/tests/amdgpu/uvd_enc_tests.c
index 6c19f7b6..75181035 100644
--- a/tests/amdgpu/uvd_enc_tests.c
+++ b/tests/amdgpu/uvd_enc_tests.c
@@ -79,6 +79,8 @@ static void amdgpu_cs_uvd_enc_session_init(void);
static void amdgpu_cs_uvd_enc_encode(void);
static void amdgpu_cs_uvd_enc_destroy(void);
+static bool uvd_enc_support(void);
+
CU_TestInfo uvd_enc_tests[] = {
{ "UVD ENC create", amdgpu_cs_uvd_enc_create },
{ "UVD ENC session init", amdgpu_cs_uvd_enc_session_init },
@@ -98,7 +100,7 @@ int suite_uvd_enc_tests_init(void)
family_id = device_handle->info.family_id;
- if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) {
+ if (!uvd_enc_support()) {
printf("\n\nThe ASIC NOT support UVD ENC, all sub-tests will pass\n");
return CUE_SUCCESS;
}
@@ -121,7 +123,7 @@ int suite_uvd_enc_tests_clean(void)
{
int r;
- if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) {
+ if (!uvd_enc_support()) {
r = amdgpu_device_deinitialize(device_handle);
if (r)
@@ -238,11 +240,24 @@ static void free_resource(struct amdgpu_uvd_enc_bo *uvd_enc_bo)
memset(uvd_enc_bo, 0, sizeof(*uvd_enc_bo));
}
+static bool uvd_enc_support(void)
+{
+ int r;
+ struct drm_amdgpu_info_hw_ip info;
+
+ r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_UVD_ENC, 0, &info);
+
+ if (r)
+ return false;
+ else
+ return (info.available_rings?true:false);
+}
+
static void amdgpu_cs_uvd_enc_create(void)
{
int len, r;
- if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV)
+ if (!uvd_enc_support())
return;
enc.width = 160;
@@ -281,7 +296,7 @@ static void amdgpu_cs_uvd_enc_session_init(void)
{
int len, r;
- if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV)
+ if (!uvd_enc_support())
return;
len = 0;
@@ -339,7 +354,7 @@ static void amdgpu_cs_uvd_enc_encode(void)
vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5;
cpb_size = vbuf_size * 10;
- if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV)
+ if (!uvd_enc_support())
return;
num_resources = 0;
@@ -472,7 +487,7 @@ static void amdgpu_cs_uvd_enc_destroy(void)
struct amdgpu_uvd_enc_bo sw_ctx;
int len, r;
- if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV)
+ if (!uvd_enc_support())
return;
num_resources = 0;
|
|
From: <ro...@ke...> - 2017-10-09 14:27:09
|
Android.common.mk | 2 ++
amdgpu/Android.mk | 2 +-
data/Android.mk | 3 ++-
include/drm/drm_mode.h | 47 +++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 52 insertions(+), 2 deletions(-)
New commits:
commit 965133914b14f571b91109814c393b62f7bc588a
Author: Rob Herring <ro...@ke...>
Date: Fri Oct 6 16:18:57 2017 -0500
headers: sync DRM_MODE_ROTATE/REFLECT defines from kernel v4.14-rc1
Add the new DRM_MODE_ROTATE_* and DRM_MODE_REFLECT_* defines from v4.14-rc1
kernel.
Reviewed-by: Thierry Reding <tr...@nv...>
Reviewed-by: Robert Foss <rob...@co...>
Signed-off-by: Rob Herring <ro...@ke...>
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 08077978..e01f129c 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -119,6 +119,53 @@ extern "C" {
#define DRM_MODE_LINK_STATUS_GOOD 0
#define DRM_MODE_LINK_STATUS_BAD 1
+/*
+ * DRM_MODE_ROTATE_<degrees>
+ *
+ * Signals that a drm plane is been rotated <degrees> degrees in counter
+ * clockwise direction.
+ *
+ * This define is provided as a convenience, looking up the property id
+ * using the name->prop id lookup is the preferred method.
+ */
+#define DRM_MODE_ROTATE_0 (1<<0)
+#define DRM_MODE_ROTATE_90 (1<<1)
+#define DRM_MODE_ROTATE_180 (1<<2)
+#define DRM_MODE_ROTATE_270 (1<<3)
+
+/*
+ * DRM_MODE_ROTATE_MASK
+ *
+ * Bitmask used to look for drm plane rotations.
+ */
+#define DRM_MODE_ROTATE_MASK (\
+ DRM_MODE_ROTATE_0 | \
+ DRM_MODE_ROTATE_90 | \
+ DRM_MODE_ROTATE_180 | \
+ DRM_MODE_ROTATE_270)
+
+/*
+ * DRM_MODE_REFLECT_<axis>
+ *
+ * Signals that the contents of a drm plane is reflected in the <axis> axis,
+ * in the same way as mirroring.
+ *
+ * This define is provided as a convenience, looking up the property id
+ * using the name->prop id lookup is the preferred method.
+ */
+#define DRM_MODE_REFLECT_X (1<<4)
+#define DRM_MODE_REFLECT_Y (1<<5)
+
+/*
+ * DRM_MODE_REFLECT_MASK
+ *
+ * Bitmask used to look for drm plane reflections.
+ */
+#define DRM_MODE_REFLECT_MASK (\
+ DRM_MODE_REFLECT_X | \
+ DRM_MODE_REFLECT_Y)
+
+
struct drm_mode_modeinfo {
__u32 clock;
__u16 hdisplay;
commit 011fd913b445b5e17148c37d169396c39eced3df
Author: Rob Herring <ro...@ke...>
Date: Fri Sep 15 08:45:59 2017 -0500
Android: move libraries to /vendor
As part of Treble project in Android O, all the device specific files have
to be located in a separate vendor partition. This is done by setting
LOCAL_PROPRIETARY_MODULE (the name is misleading). This change will not
break existing platforms without a vendor partition as it will just move
files to /system/vendor.
Signed-off-by: Rob Herring <ro...@ke...>
diff --git a/Android.common.mk b/Android.common.mk
index b45ca10f..d487acb9 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -13,3 +13,5 @@ LOCAL_CFLAGS += \
# Quiet down the build system and remove any .h files from the sources
LOCAL_SRC_FILES := $(patsubst %.h, , $(LOCAL_SRC_FILES))
LOCAL_EXPORT_C_INCLUDE_DIRS += $(LOCAL_PATH)
+
+LOCAL_PROPRIETARY_MODULE := true
diff --git a/amdgpu/Android.mk b/amdgpu/Android.mk
index 88d37651..ce273019 100644
--- a/amdgpu/Android.mk
+++ b/amdgpu/Android.mk
@@ -11,7 +11,7 @@ LOCAL_SHARED_LIBRARIES := libdrm
LOCAL_SRC_FILES := $(LIBDRM_AMDGPU_FILES)
LOCAL_CFLAGS := \
- -DAMDGPU_ASIC_ID_TABLE=\"/system/etc/hwdata/amdgpu.ids\" \
+ -DAMDGPU_ASIC_ID_TABLE=\"/vendor/etc/hwdata/amdgpu.ids\" \
-DAMDGPU_ASIC_ID_TABLE_NUM_ENTRIES=$(shell egrep -ci '^[0-9a-f]{4},.*[0-9a-f]+,' $(LIBDRM_TOP)/data/amdgpu.ids)
LOCAL_REQUIRED_MODULES := amdgpu.ids
diff --git a/data/Android.mk b/data/Android.mk
index 3c1fd7c6..62013f0c 100644
--- a/data/Android.mk
+++ b/data/Android.mk
@@ -4,6 +4,7 @@ include $(CLEAR_VARS)
LOCAL_MODULE := amdgpu.ids
LOCAL_MODULE_TAGS := optional
LOCAL_MODULE_CLASS := ETC
-LOCAL_MODULE_PATH := $(TARGET_OUT_ETC)/hwdata
+LOCAL_PROPRIETARY_MODULE := true
+LOCAL_MODULE_RELATIVE_PATH := hwdata
LOCAL_SRC_FILES := $(LOCAL_MODULE)
include $(BUILD_PREBUILT)
|
|
From: <bni...@ke...> - 2017-10-20 20:00:41
|
amdgpu/amdgpu-symbol-check | 1 +
amdgpu/amdgpu.h | 17 +++++++++++++++--
amdgpu/amdgpu_cs.c | 17 +++++++++++++----
include/drm/amdgpu_drm.h | 31 ++++++++++++++++++++++++++++++-
4 files changed, 59 insertions(+), 7 deletions(-)
New commits:
commit 35bc82cee9aab62d556e2ea6dfe29f71ce13dcb3
Author: Andres Rodriguez <and...@gm...>
Date: Fri Oct 20 10:57:59 2017 -0400
amdgpu: implement context priority for amdgpu_cs_ctx_create2 v3
Add a new context creation function that allows specifying the context
priority.
A high priority context has the potential of starving lower priority
contexts. The current kernel driver implementation allows only apps
that hold CAP_SYS_NICE or DRM_MASTER to acquire a priority above
AMDGPU_CTX_PRIORITY_NORMAL.
v2: corresponding changes for kernel patch v2
v3: Fixed 'make check' symbol error
Signed-off-by: Andres Rodriguez <and...@gm...>
Acked-by: Dave Airlie <ai...@re...>
Reviewed-by: Bas Nieuwenhuizen <ba...@ba...>
diff --git a/amdgpu/amdgpu-symbol-check b/amdgpu/amdgpu-symbol-check
index d9f89ef3..095c3a08 100755
--- a/amdgpu/amdgpu-symbol-check
+++ b/amdgpu/amdgpu-symbol-check
@@ -30,6 +30,7 @@ amdgpu_cs_chunk_fence_to_dep
amdgpu_cs_create_semaphore
amdgpu_cs_create_syncobj
amdgpu_cs_ctx_create
+amdgpu_cs_ctx_create2
amdgpu_cs_ctx_free
amdgpu_cs_destroy_semaphore
amdgpu_cs_destroy_syncobj
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 23cde108..ecc975f1 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -798,8 +798,9 @@ int amdgpu_bo_list_update(amdgpu_bo_list_handle handle,
* context will always be executed in order (first come, first serve).
*
*
- * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
- * \param context - \c [out] GPU Context handle
+ * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
+ * \param priority - \c [in] Context creation flags. See AMDGPU_CTX_PRIORITY_*
+ * \param context - \c [out] GPU Context handle
*
* \return 0 on success\n
* <0 - Negative POSIX Error code
@@ -807,6 +808,18 @@ int amdgpu_bo_list_update(amdgpu_bo_list_handle handle,
* \sa amdgpu_cs_ctx_free()
*
*/
+int amdgpu_cs_ctx_create2(amdgpu_device_handle dev,
+ uint32_t priority,
+ amdgpu_context_handle *context);
+/**
+ * Create GPU execution Context
+ *
+ * Refer to amdgpu_cs_ctx_create2 for full documentation. This call
+ * is missing the priority parameter.
+ *
+ * \sa amdgpu_cs_ctx_create2()
+ *
+*/
int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
amdgpu_context_handle *context);
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
index 9577d5c9..b9fc01e7 100644
--- a/amdgpu/amdgpu_cs.c
+++ b/amdgpu/amdgpu_cs.c
@@ -46,13 +46,14 @@ static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem);
/**
* Create command submission context
*
- * \param dev - \c [in] amdgpu device handle
- * \param context - \c [out] amdgpu context handle
+ * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
+ * \param priority - \c [in] Context creation flags. See AMDGPU_CTX_PRIORITY_*
+ * \param context - \c [out] GPU Context handle
*
* \return 0 on success otherwise POSIX Error code
*/
-int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
- amdgpu_context_handle *context)
+int amdgpu_cs_ctx_create2(amdgpu_device_handle dev, uint32_t priority,
+ amdgpu_context_handle *context)
{
struct amdgpu_context *gpu_context;
union drm_amdgpu_ctx args;
@@ -75,6 +76,8 @@ int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
/* Create the context */
memset(&args, 0, sizeof(args));
args.in.op = AMDGPU_CTX_OP_ALLOC_CTX;
+ args.in.priority = priority;
+
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CTX, &args, sizeof(args));
if (r)
goto error;
@@ -94,6 +97,12 @@ error:
return r;
}
+int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
+ amdgpu_context_handle *context)
+{
+ return amdgpu_cs_ctx_create2(dev, AMDGPU_CTX_PRIORITY_NORMAL, context);
+}
+
/**
* Release command submission context
*
commit bcae7226a1c36bee22ad747dc12960e52a706cfa
Author: Andres Rodriguez <and...@gm...>
Date: Fri Oct 20 10:57:58 2017 -0400
headers: Sync amdgpu_drm.h with drm-next
Generated using make headers_install from:
airlied/drm-next 282dc83 Merge tag 'drm-intel-next-2017-10-12' ...
Signed-off-by: Andres Rodriguez <and...@gm...>
Acked-by: Dave Airlie <ai...@re...>
Acked-by: Bas Nieuwenhuizen <ba...@ba...>
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index 4c6e8c48..ff018182 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -53,6 +53,7 @@ extern "C" {
#define DRM_AMDGPU_WAIT_FENCES 0x12
#define DRM_AMDGPU_VM 0x13
#define DRM_AMDGPU_FENCE_TO_HANDLE 0x14
+#define DRM_AMDGPU_SCHED 0x15
#define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -69,6 +70,7 @@ extern "C" {
#define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences)
#define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_VM, union drm_amdgpu_vm)
#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
+#define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
#define AMDGPU_GEM_DOMAIN_CPU 0x1
#define AMDGPU_GEM_DOMAIN_GTT 0x2
@@ -91,6 +93,8 @@ extern "C" {
#define AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS (1 << 5)
/* Flag that BO is always valid in this VM */
#define AMDGPU_GEM_CREATE_VM_ALWAYS_VALID (1 << 6)
+/* Flag that BO sharing will be explicitly synchronized */
+#define AMDGPU_GEM_CREATE_EXPLICIT_SYNC (1 << 7)
struct drm_amdgpu_gem_create_in {
/** the requested memory size */
@@ -166,13 +170,22 @@ union drm_amdgpu_bo_list {
/* unknown cause */
#define AMDGPU_CTX_UNKNOWN_RESET 3
+/* Context priority level */
+#define AMDGPU_CTX_PRIORITY_UNSET -2048
+#define AMDGPU_CTX_PRIORITY_VERY_LOW -1023
+#define AMDGPU_CTX_PRIORITY_LOW -512
+#define AMDGPU_CTX_PRIORITY_NORMAL 0
+/* Selecting a priority above NORMAL requires CAP_SYS_NICE or DRM_MASTER */
+#define AMDGPU_CTX_PRIORITY_HIGH 512
+#define AMDGPU_CTX_PRIORITY_VERY_HIGH 1023
+
struct drm_amdgpu_ctx_in {
/** AMDGPU_CTX_OP_* */
__u32 op;
/** For future use, no flags defined so far */
__u32 flags;
__u32 ctx_id;
- __u32 _pad;
+ __s32 priority;
};
union drm_amdgpu_ctx_out {
@@ -216,6 +229,21 @@ union drm_amdgpu_vm {
struct drm_amdgpu_vm_out out;
};
+/* sched ioctl */
+#define AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE 1
+
+struct drm_amdgpu_sched_in {
+ /* AMDGPU_SCHED_OP_* */
+ __u32 op;
+ __u32 fd;
+ __s32 priority;
+ __u32 flags;
+};
+
+union drm_amdgpu_sched {
+ struct drm_amdgpu_sched_in in;
+};
+
/*
* This is not a reliable API and you should expect it to fail for any
* number of reasons and have fallback path that do not use userptr to
@@ -629,6 +657,7 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_SENSOR_VDDGFX 0x7
/* Number of VRAM page faults on CPU access. */
#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E
+#define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
|
|
From: <dea...@ke...> - 2017-10-27 16:26:26
|
amdgpu/Makefile.sources | 1
amdgpu/amdgpu-symbol-check | 2
amdgpu/amdgpu.h | 18 +++++
amdgpu/amdgpu_vm.c | 50 ++++++++++++++
tests/amdgpu/Makefile.am | 3
tests/amdgpu/amdgpu_test.c | 7 ++
tests/amdgpu/amdgpu_test.h | 15 ++++
tests/amdgpu/vm_tests.c | 151 +++++++++++++++++++++++++++++++++++++++++++++
8 files changed, 246 insertions(+), 1 deletion(-)
New commits:
commit 33dcc29f7ccc554de1fc42f4b95adf056822eabb
Author: Andrey Grodzovsky <And...@am...>
Date: Fri Oct 27 11:09:11 2017 -0400
amdgpu: Add VMID reservation per GPU context test.
The test will Reserve a VMID, submit a command and
unreserve the VMID.
v2:
Wrappers names were changed.
Signed-off-by: Andrey Grodzovsky <And...@am...>
Reviewed-by: Christian König <chr...@am...>
diff --git a/tests/amdgpu/Makefile.am b/tests/amdgpu/Makefile.am
index 8700c4d4..e79c1bd3 100644
--- a/tests/amdgpu/Makefile.am
+++ b/tests/amdgpu/Makefile.am
@@ -31,4 +31,5 @@ amdgpu_test_SOURCES = \
uvd_enc_tests.c \
vcn_tests.c \
uve_ib.h \
- deadlock_tests.c
+ deadlock_tests.c \
+ vm_tests.c
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index 99255038..a82d9ab1 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -103,6 +103,13 @@ static CU_SuiteInfo suites[] = {
.pCleanupFunc = suite_deadlock_tests_clean,
.pTests = deadlock_tests,
},
+ {
+ .pName = "VM Tests",
+ .pInitFunc = suite_vm_tests_init,
+ .pCleanupFunc = suite_vm_tests_clean,
+ .pTests = vm_tests,
+ },
+
CU_SUITE_INFO_NULL,
};
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index ece93f4c..4fffbc62 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -150,6 +150,21 @@ int suite_deadlock_tests_clean();
extern CU_TestInfo deadlock_tests[];
/**
+ * Initialize vm test suite
+ */
+int suite_vm_tests_init();
+
+/**
+ * Deinitialize deadlock test suite
+ */
+int suite_vm_tests_clean();
+
+/**
+ * Tests in vm test suite
+ */
+extern CU_TestInfo vm_tests[];
+
+/**
* Helper functions
*/
static inline amdgpu_bo_handle gpu_mem_alloc(
diff --git a/tests/amdgpu/vm_tests.c b/tests/amdgpu/vm_tests.c
new file mode 100644
index 00000000..cbfafe97
--- /dev/null
+++ b/tests/amdgpu/vm_tests.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+*/
+
+#include "CUnit/Basic.h"
+
+#include "amdgpu_test.h"
+#include "amdgpu_drm.h"
+
+static amdgpu_device_handle device_handle;
+static uint32_t major_version;
+static uint32_t minor_version;
+
+
+static void amdgpu_vmid_reserve_test(void);
+
+int suite_vm_tests_init(void)
+{
+ struct amdgpu_gpu_info gpu_info = {0};
+ int r;
+
+ r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
+ &minor_version, &device_handle);
+
+ if (r) {
+ if ((r == -EACCES) && (errno == EACCES))
+ printf("\n\nError:%s. "
+ "Hint:Try to run this test program as root.",
+ strerror(errno));
+ return CUE_SINIT_FAILED;
+ }
+
+ return CUE_SUCCESS;
+}
+
+int suite_vm_tests_clean(void)
+{
+ int r = amdgpu_device_deinitialize(device_handle);
+
+ if (r == 0)
+ return CUE_SUCCESS;
+ else
+ return CUE_SCLEAN_FAILED;
+}
+
+
+CU_TestInfo vm_tests[] = {
+ { "resere vmid test", amdgpu_vmid_reserve_test },
+ CU_TEST_INFO_NULL,
+};
+
+static void amdgpu_vmid_reserve_test(void)
+{
+ amdgpu_context_handle context_handle;
+ amdgpu_bo_handle ib_result_handle;
+ void *ib_result_cpu;
+ uint64_t ib_result_mc_address;
+ struct amdgpu_cs_request ibs_request;
+ struct amdgpu_cs_ib_info ib_info;
+ struct amdgpu_cs_fence fence_status;
+ uint32_t expired, flags;
+ int i, r, instance;
+ amdgpu_bo_list_handle bo_list;
+ amdgpu_va_handle va_handle;
+ union drm_amdgpu_vm vm;
+ static uint32_t *ptr;
+
+ r = amdgpu_cs_ctx_create(device_handle, &context_handle);
+ CU_ASSERT_EQUAL(r, 0);
+
+ flags = 0;
+ r = amdgpu_vm_reserve_vmid(context_handle, flags);
+ CU_ASSERT_EQUAL(r, 0);
+
+
+ r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
+ AMDGPU_GEM_DOMAIN_GTT, 0,
+ &ib_result_handle, &ib_result_cpu,
+ &ib_result_mc_address, &va_handle);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_get_bo_list(device_handle, ib_result_handle, NULL,
+ &bo_list);
+ CU_ASSERT_EQUAL(r, 0);
+
+ ptr = ib_result_cpu;
+
+ for (i = 0; i < 16; ++i)
+ ptr[i] = 0xffff1000;
+
+ memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
+ ib_info.ib_mc_address = ib_result_mc_address;
+ ib_info.size = 16;
+
+ memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
+ ibs_request.ip_type = AMDGPU_HW_IP_GFX;
+ ibs_request.ring = 0;
+ ibs_request.number_of_ibs = 1;
+ ibs_request.ibs = &ib_info;
+ ibs_request.resources = bo_list;
+ ibs_request.fence_info.handle = NULL;
+
+ r = amdgpu_cs_submit(context_handle, 0,&ibs_request, 1);
+ CU_ASSERT_EQUAL(r, 0);
+
+
+ memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence));
+ fence_status.context = context_handle;
+ fence_status.ip_type = AMDGPU_HW_IP_GFX;
+ fence_status.ip_instance = 0;
+ fence_status.ring = 0;
+ fence_status.fence = ibs_request.seq_no;
+
+ r = amdgpu_cs_query_fence_status(&fence_status,
+ AMDGPU_TIMEOUT_INFINITE,0, &expired);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_bo_list_destroy(bo_list);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
+ ib_result_mc_address, 4096);
+ CU_ASSERT_EQUAL(r, 0);
+
+ flags = 0;
+ r = amdgpu_vm_unreserve_vmid(context_handle, flags);
+ CU_ASSERT_EQUAL(r, 0);
+
+
+ r = amdgpu_cs_ctx_free(context_handle);
+ CU_ASSERT_EQUAL(r, 0);
+}
commit 9b38ea82fc30ccbf38ebc0c55412b27e5a5afd7b
Author: Andrey Grodzovsky <And...@am...>
Date: Fri Oct 27 11:09:10 2017 -0400
amdgpu: Add wrappers for AMDGPU_VM IOCTL.
v2:
Rename wrappers to match the IOCTL naming, fix
identation and fix make check error.
Signed-off-by: Andrey Grodzovsky <And...@am...>
Reviewed-by: Christian König <chr...@am...>
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index bc3abaa6..498b64cc 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -6,6 +6,7 @@ LIBDRM_AMDGPU_FILES := \
amdgpu_gpu_info.c \
amdgpu_internal.h \
amdgpu_vamgr.c \
+ amdgpu_vm.c \
util_hash.c \
util_hash.h \
util_hash_table.c \
diff --git a/amdgpu/amdgpu-symbol-check b/amdgpu/amdgpu-symbol-check
index 095c3a08..d476038b 100755
--- a/amdgpu/amdgpu-symbol-check
+++ b/amdgpu/amdgpu-symbol-check
@@ -64,6 +64,8 @@ amdgpu_read_mm_registers
amdgpu_va_range_alloc
amdgpu_va_range_free
amdgpu_va_range_query
+amdgpu_vm_reserve_vmid
+amdgpu_vm_unreserve_vmid
EOF
done)
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index ecc975f1..597fc2ba 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1489,6 +1489,24 @@ void amdgpu_cs_chunk_fence_to_dep(struct amdgpu_cs_fence *fence,
void amdgpu_cs_chunk_fence_info_to_data(struct amdgpu_cs_fence_info *fence_info,
struct drm_amdgpu_cs_chunk_data *data);
+/**
+ * Reserve VMID
+ * \param context - \c [in] GPU Context
+ * \param flags - \c [in] TBD
+ *
+ * \return 0 on success otherwise POSIX Error code
+*/
+int amdgpu_vm_reserve_vmid(amdgpu_context_handle context, uint32_t flags);
+
+/**
+ * Free reserved VMID
+ * \param context - \c [in] GPU Context
+ * \param flags - \c [in] TBD
+ *
+ * \return 0 on success otherwise POSIX Error code
+*/
+int amdgpu_vm_unreserve_vmid(amdgpu_context_handle context, uint32_t flags);
+
#ifdef __cplusplus
}
#endif
diff --git a/amdgpu/amdgpu_vm.c b/amdgpu/amdgpu_vm.c
new file mode 100644
index 00000000..8a9a0a15
--- /dev/null
+++ b/amdgpu/amdgpu_vm.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+
+#include "amdgpu.h"
+#include "amdgpu_drm.h"
+#include "xf86drm.h"
+#include "amdgpu_internal.h"
+
+int amdgpu_vm_reserve_vmid(amdgpu_context_handle context, uint32_t flags)
+{
+ union drm_amdgpu_vm vm;
+
+ vm.in.op = AMDGPU_VM_OP_RESERVE_VMID;
+ vm.in.flags = flags;
+
+ return drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_VM,
+ &vm, sizeof(vm));
+}
+
+int amdgpu_vm_unreserve_vmid(amdgpu_context_handle context, uint32_t flags)
+{
+ union drm_amdgpu_vm vm;
+
+ vm.in.op = AMDGPU_VM_OP_UNRESERVE_VMID;
+ vm.in.flags = flags;
+
+ return drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_VM,
+ &vm, sizeof(vm));
+}
|
|
From: <ma...@ke...> - 2017-10-31 14:50:09
|
amdgpu/amdgpu_vm.c | 3 +++
configure.ac | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
New commits:
commit b617f059ad45517bded1f2d8c8e3a52b60e80bd7
Author: Marek Olšák <mar...@am...>
Date: Tue Oct 31 15:49:12 2017 +0100
configure.ac: bump version for release
diff --git a/configure.ac b/configure.ac
index d02a29b3..a300ff3c 100644
--- a/configure.ac
+++ b/configure.ac
@@ -20,7 +20,7 @@
AC_PREREQ([2.63])
AC_INIT([libdrm],
- [2.4.86],
+ [2.4.87],
[https://bugs.freedesktop.org/enter_bug.cgi?product=DRI],
[libdrm])
commit 76c325ee7d8975248d18f2e0b6b16a03abcef4df
Author: Marek Olšák <mar...@am...>
Date: Tue Oct 31 15:48:23 2017 +0100
amdgpu: fix 32-bit build
diff --git a/amdgpu/amdgpu_vm.c b/amdgpu/amdgpu_vm.c
index 8a9a0a15..304b423c 100644
--- a/amdgpu/amdgpu_vm.c
+++ b/amdgpu/amdgpu_vm.c
@@ -21,6 +21,9 @@
*
*/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
#include "amdgpu.h"
#include "amdgpu_drm.h"
|
|
From: <rob...@ke...> - 2017-11-04 21:24:42
|
freedreno/freedreno_drmif.h | 3 +++
freedreno/freedreno_pipe.c | 19 +++++++++++++++++--
freedreno/freedreno_priv.h | 3 ++-
freedreno/kgsl/kgsl_pipe.c | 3 ++-
freedreno/kgsl/kgsl_priv.h | 2 +-
freedreno/msm/msm_drm.h | 40 ++++++++++++++++++++++++++++++++++------
freedreno/msm/msm_pipe.c | 41 ++++++++++++++++++++++++++++++++++++++++-
freedreno/msm/msm_priv.h | 3 ++-
freedreno/msm/msm_ringbuffer.c | 1 +
9 files changed, 102 insertions(+), 13 deletions(-)
New commits:
commit 7064b2eae9c136162e5c7f25571d63f71d066887
Author: Rob Clark <rob...@fr...>
Date: Wed Aug 23 17:08:39 2017 -0400
freedreno: submit-queue context priority
With a new-enough kernel to support prioritized submit-queues, we can
expose priority level support to mesa. Open a submit queue associated
with the fd_pipe and pass it's id back to SUBMIT ioctl.
Signed-off-by: Rob Clark <rob...@fr...>
diff --git a/freedreno/freedreno_drmif.h b/freedreno/freedreno_drmif.h
index 7a8073ff..c3b0d02a 100644
--- a/freedreno/freedreno_drmif.h
+++ b/freedreno/freedreno_drmif.h
@@ -61,6 +61,7 @@ enum fd_param_id {
FD_CHIP_ID,
FD_MAX_FREQ,
FD_TIMESTAMP,
+ FD_NR_RINGS, /* # of rings == # of distinct priority levels */
};
/* bo flags: */
@@ -93,6 +94,7 @@ enum fd_version {
FD_VERSION_MADVISE = 1, /* kernel supports madvise */
FD_VERSION_UNLIMITED_CMDS = 1, /* submits w/ >4 cmd buffers (growable ringbuffer) */
FD_VERSION_FENCE_FD = 2, /* submit command supports in/out fences */
+ FD_VERSION_SUBMIT_QUEUES = 3, /* submit queues and multiple priority levels */
};
enum fd_version fd_device_version(struct fd_device *dev);
@@ -100,6 +102,7 @@ enum fd_version fd_device_version(struct fd_device *dev);
*/
struct fd_pipe * fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id);
+struct fd_pipe * fd_pipe_new2(struct fd_device *dev, enum fd_pipe_id id, uint32_t prio);
void fd_pipe_del(struct fd_pipe *pipe);
int fd_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param,
uint64_t *value);
diff --git a/freedreno/freedreno_pipe.c b/freedreno/freedreno_pipe.c
index e69cb28c..1540474b 100644
--- a/freedreno/freedreno_pipe.c
+++ b/freedreno/freedreno_pipe.c
@@ -33,8 +33,12 @@
#include "freedreno_drmif.h"
#include "freedreno_priv.h"
+/**
+ * priority of zero is highest priority, and higher numeric values are
+ * lower priorities
+ */
struct fd_pipe *
-fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id)
+fd_pipe_new2(struct fd_device *dev, enum fd_pipe_id id, uint32_t prio)
{
struct fd_pipe *pipe;
uint64_t val;
@@ -44,7 +48,12 @@ fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id)
return NULL;
}
- pipe = dev->funcs->pipe_new(dev, id);
+ if ((prio != 1) && (fd_device_version(dev) < FD_VERSION_SUBMIT_QUEUES)) {
+ ERROR_MSG("invalid priority!");
+ return NULL;
+ }
+
+ pipe = dev->funcs->pipe_new(dev, id, prio);
if (!pipe) {
ERROR_MSG("allocation failed");
return NULL;
@@ -59,6 +68,12 @@ fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id)
return pipe;
}
+struct fd_pipe *
+fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id)
+{
+ return fd_pipe_new2(dev, id, 1);
+}
+
void fd_pipe_del(struct fd_pipe *pipe)
{
pipe->funcs->destroy(pipe);
diff --git a/freedreno/freedreno_priv.h b/freedreno/freedreno_priv.h
index 8dd3ee69..27307472 100644
--- a/freedreno/freedreno_priv.h
+++ b/freedreno/freedreno_priv.h
@@ -66,7 +66,8 @@ struct fd_device_funcs {
uint32_t flags, uint32_t *handle);
struct fd_bo * (*bo_from_handle)(struct fd_device *dev,
uint32_t size, uint32_t handle);
- struct fd_pipe * (*pipe_new)(struct fd_device *dev, enum fd_pipe_id id);
+ struct fd_pipe * (*pipe_new)(struct fd_device *dev, enum fd_pipe_id id,
+ unsigned prio);
void (*destroy)(struct fd_device *dev);
};
diff --git a/freedreno/kgsl/kgsl_pipe.c b/freedreno/kgsl/kgsl_pipe.c
index 8a39eb49..80bd1313 100644
--- a/freedreno/kgsl/kgsl_pipe.c
+++ b/freedreno/kgsl/kgsl_pipe.c
@@ -52,6 +52,7 @@ static int kgsl_pipe_get_param(struct fd_pipe *pipe,
return 0;
case FD_MAX_FREQ:
case FD_TIMESTAMP:
+ case FD_NR_RINGS:
/* unsupported on kgsl */
return -1;
default:
@@ -210,7 +211,7 @@ static int getprop(int fd, enum kgsl_property_type type,
drm_private struct fd_pipe * kgsl_pipe_new(struct fd_device *dev,
- enum fd_pipe_id id)
+ enum fd_pipe_id id, uint32_t prio)
{
static const char *paths[] = {
[FD_PIPE_3D] = "/dev/kgsl-3d0",
diff --git a/freedreno/kgsl/kgsl_priv.h b/freedreno/kgsl/kgsl_priv.h
index 6ab64965..41b13920 100644
--- a/freedreno/kgsl/kgsl_priv.h
+++ b/freedreno/kgsl/kgsl_priv.h
@@ -103,7 +103,7 @@ drm_private void kgsl_pipe_post_submit(struct kgsl_pipe *pipe,
drm_private void kgsl_pipe_process_pending(struct kgsl_pipe *pipe,
uint32_t timestamp);
drm_private struct fd_pipe * kgsl_pipe_new(struct fd_device *dev,
- enum fd_pipe_id id);
+ enum fd_pipe_id id, uint32_t prio);
drm_private struct fd_ringbuffer * kgsl_ringbuffer_new(struct fd_pipe *pipe,
uint32_t size);
diff --git a/freedreno/msm/msm_pipe.c b/freedreno/msm/msm_pipe.c
index f872e245..7395e573 100644
--- a/freedreno/msm/msm_pipe.c
+++ b/freedreno/msm/msm_pipe.c
@@ -71,6 +71,8 @@ static int msm_pipe_get_param(struct fd_pipe *pipe,
return query_param(pipe, MSM_PARAM_MAX_FREQ, value);
case FD_TIMESTAMP:
return query_param(pipe, MSM_PARAM_TIMESTAMP, value);
+ case FD_NR_RINGS:
+ return query_param(pipe, MSM_PARAM_NR_RINGS, value);
default:
ERROR_MSG("invalid param id: %d", param);
return -1;
@@ -83,6 +85,7 @@ static int msm_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp,
struct fd_device *dev = pipe->dev;
struct drm_msm_wait_fence req = {
.fence = timestamp,
+ .queueid = to_msm_pipe(pipe)->queue_id,
};
int ret;
@@ -97,9 +100,42 @@ static int msm_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp,
return 0;
}
+static int open_submitqueue(struct fd_device *dev, uint32_t prio,
+ uint32_t *queue_id)
+{
+ struct drm_msm_submitqueue req = {
+ .flags = 0,
+ .prio = prio,
+ };
+ int ret;
+
+ if (fd_device_version(dev) < FD_VERSION_SUBMIT_QUEUES) {
+ *queue_id = 0;
+ return 0;
+ }
+
+ ret = drmCommandWriteRead(dev->fd, DRM_MSM_SUBMITQUEUE_NEW, &req, sizeof(req));
+ if (ret) {
+ ERROR_MSG("could not create submitqueue! %d (%s)", ret, strerror(errno));
+ return ret;
+ }
+
+ *queue_id = req.id;
+ return 0;
+}
+
+static void close_submitqueue(struct fd_device *dev, uint32_t queue_id)
+{
+ if (fd_device_version(dev) < FD_VERSION_SUBMIT_QUEUES)
+ return;
+
+ drmCommandWrite(dev->fd, DRM_MSM_SUBMITQUEUE_CLOSE, &queue_id, sizeof(queue_id));
+}
+
static void msm_pipe_destroy(struct fd_pipe *pipe)
{
struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
+ close_submitqueue(pipe->dev, msm_pipe->queue_id);
free(msm_pipe);
}
@@ -122,7 +158,7 @@ static uint64_t get_param(struct fd_pipe *pipe, uint32_t param)
}
drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev,
- enum fd_pipe_id id)
+ enum fd_pipe_id id, uint32_t prio)
{
static const uint32_t pipe_id[] = {
[FD_PIPE_3D] = MSM_PIPE_3D0,
@@ -157,6 +193,9 @@ drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev,
INFO_MSG(" Chip-id: 0x%08x", msm_pipe->chip_id);
INFO_MSG(" GMEM size: 0x%08x", msm_pipe->gmem);
+ if (open_submitqueue(dev, prio, &msm_pipe->queue_id))
+ goto fail;
+
return pipe;
fail:
if (pipe)
diff --git a/freedreno/msm/msm_priv.h b/freedreno/msm/msm_priv.h
index 6d670aab..88ac3aa4 100644
--- a/freedreno/msm/msm_priv.h
+++ b/freedreno/msm/msm_priv.h
@@ -56,6 +56,7 @@ struct msm_pipe {
uint32_t gpu_id;
uint32_t gmem;
uint32_t chip_id;
+ uint32_t queue_id;
};
static inline struct msm_pipe * to_msm_pipe(struct fd_pipe *x)
@@ -64,7 +65,7 @@ static inline struct msm_pipe * to_msm_pipe(struct fd_pipe *x)
}
drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev,
- enum fd_pipe_id id);
+ enum fd_pipe_id id, uint32_t prio);
drm_private struct fd_ringbuffer * msm_ringbuffer_new(struct fd_pipe *pipe,
uint32_t size);
diff --git a/freedreno/msm/msm_ringbuffer.c b/freedreno/msm/msm_ringbuffer.c
index 5b28feaa..c75bb169 100644
--- a/freedreno/msm/msm_ringbuffer.c
+++ b/freedreno/msm/msm_ringbuffer.c
@@ -401,6 +401,7 @@ static int msm_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct drm_msm_gem_submit req = {
.flags = to_msm_pipe(ring->pipe)->pipe,
+ .queueid = to_msm_pipe(ring->pipe)->queue_id,
};
uint32_t i;
int ret;
commit 62e0767b816cb52b35226d439090ef580bd60b01
Author: Rob Clark <rob...@fr...>
Date: Wed Aug 23 15:00:12 2017 -0400
freedreno: sync uapi header (driver version 1.3.0)
Signed-off-by: Rob Clark <rob...@fr...>
diff --git a/freedreno/msm/msm_drm.h b/freedreno/msm/msm_drm.h
index ed4c8d47..dac49e59 100644
--- a/freedreno/msm/msm_drm.h
+++ b/freedreno/msm/msm_drm.h
@@ -73,6 +73,8 @@ struct drm_msm_timespec {
#define MSM_PARAM_CHIP_ID 0x03
#define MSM_PARAM_MAX_FREQ 0x04
#define MSM_PARAM_TIMESTAMP 0x05
+#define MSM_PARAM_GMEM_BASE 0x06
+#define MSM_PARAM_NR_RINGS 0x07
struct drm_msm_param {
__u32 pipe; /* in, MSM_PIPE_x */
@@ -104,10 +106,14 @@ struct drm_msm_gem_new {
__u32 handle; /* out */
};
+#define MSM_INFO_IOVA 0x01
+
+#define MSM_INFO_FLAGS (MSM_INFO_IOVA)
+
struct drm_msm_gem_info {
__u32 handle; /* in */
- __u32 pad;
- __u64 offset; /* out, offset to pass to mmap() */
+ __u32 flags; /* in - combination of MSM_INFO_* flags */
+ __u64 offset; /* out, mmap() offset or iova */
};
#define MSM_PREP_READ 0x01
@@ -167,7 +173,7 @@ struct drm_msm_gem_submit_cmd {
__u32 size; /* in, cmdstream size */
__u32 pad;
__u32 nr_relocs; /* in, number of submit_reloc's */
- __u64 __user relocs; /* in, ptr to array of submit_reloc's */
+ __u64 relocs; /* in, ptr to array of submit_reloc's */
};
/* Each buffer referenced elsewhere in the cmdstream submit (ie. the
@@ -211,9 +217,10 @@ struct drm_msm_gem_submit {
__u32 fence; /* out */
__u32 nr_bos; /* in, number of submit_bo's */
__u32 nr_cmds; /* in, number of submit_cmd's */
- __u64 __user bos; /* in, ptr to array of submit_bo's */
- __u64 __user cmds; /* in, ptr to array of submit_cmd's */
+ __u64 bos; /* in, ptr to array of submit_bo's */
+ __u64 cmds; /* in, ptr to array of submit_cmd's */
__s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
+ __u32 queueid; /* in, submitqueue id */
};
/* The normal way to synchronize with the GPU is just to CPU_PREP on
@@ -227,6 +234,7 @@ struct drm_msm_wait_fence {
__u32 fence; /* in */
__u32 pad;
struct drm_msm_timespec timeout; /* in */
+ __u32 queueid; /* in, submitqueue id */
};
/* madvise provides a way to tell the kernel in case a buffers contents
@@ -250,6 +258,20 @@ struct drm_msm_gem_madvise {
__u32 retained; /* out, whether backing store still exists */
};
+/*
+ * Draw queues allow the user to set specific submission parameter. Command
+ * submissions specify a specific submitqueue to use. ID 0 is reserved for
+ * backwards compatibility as a "default" submitqueue
+ */
+
+#define MSM_SUBMITQUEUE_FLAGS (0)
+
+struct drm_msm_submitqueue {
+ __u32 flags; /* in, MSM_SUBMITQUEUE_x */
+ __u32 prio; /* in, Priority level */
+ __u32 id; /* out, identifier */
+};
+
#define DRM_MSM_GET_PARAM 0x00
/* placeholder:
#define DRM_MSM_SET_PARAM 0x01
@@ -261,7 +283,11 @@ struct drm_msm_gem_madvise {
#define DRM_MSM_GEM_SUBMIT 0x06
#define DRM_MSM_WAIT_FENCE 0x07
#define DRM_MSM_GEM_MADVISE 0x08
-#define DRM_MSM_NUM_IOCTLS 0x09
+/* placeholder:
+#define DRM_MSM_GEM_SVM_NEW 0x09
+ */
+#define DRM_MSM_SUBMITQUEUE_NEW 0x0A
+#define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B
#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
@@ -271,6 +297,8 @@ struct drm_msm_gem_madvise {
#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
#define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise)
+#define DRM_IOCTL_MSM_SUBMITQUEUE_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue)
+#define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
#if defined(__cplusplus)
}
|
|
From: <eve...@ke...> - 2017-11-07 11:32:46
|
exynos/exynos_fimg2d.c | 21 +++++++++++++++++----
exynos/exynos_fimg2d.h | 21 +++++++++++++++++----
exynos/fimg2d_reg.h | 21 +++++++++++++++++----
freedreno/freedreno-symbol-check | 1 +
libkms/exynos.c | 22 ++++++++++++++++++----
tests/exynos/exynos_fimg2d_event.c | 27 +++++++++++++++++----------
tests/exynos/exynos_fimg2d_perf.c | 27 +++++++++++++++++----------
tests/exynos/exynos_fimg2d_test.c | 21 +++++++++++++++++----
8 files changed, 121 insertions(+), 40 deletions(-)
New commits:
commit cfe0ae53556261250a08b625e020a7e0712bc59e
Author: Emil Velikov <emi...@gm...>
Date: Tue Nov 7 11:21:32 2017 +0000
freedreno: add the API fd_pipe_new2 to the symbol test
As kindly spotted by `make check'
Signed-off-by: Emil Velikov <emi...@gm...>
diff --git a/freedreno/freedreno-symbol-check b/freedreno/freedreno-symbol-check
index 42f2c439..6b81040c 100755
--- a/freedreno/freedreno-symbol-check
+++ b/freedreno/freedreno-symbol-check
@@ -33,6 +33,7 @@ fd_device_version
fd_pipe_del
fd_pipe_get_param
fd_pipe_new
+fd_pipe_new2
fd_pipe_wait
fd_pipe_wait_timeout
fd_ringbuffer_cmd_count
commit be40710f063a5218f62da61f5a854c69836f91e7
Author: Inki Dae <ink...@sa...>
Date: Thu Aug 10 13:52:38 2017 +0900
exynos: change the license to X11/MIT
Change GPL license of Exynos related code to X11/MIT.
I'd like to keep a consistent license across all Exynos code
because License checker notices two more licenses exist
in libdrm.
For the license change I need to get your agree - all committers.
So please give me Acked-by if you agree with me.
Signed-off-by: Inki Dae <ink...@sa...>
Acked-by: Hyungwon Hwang <hum...@sa...>
Acked-by: SooChan Lim <sc...@sa...>
Acked-by: Sangjin LEE <ls...@sa...>
Acked-by: Boram Park <bor...@sa...>
Acked-by: Seung-Woo Kim <sw0...@sa...>
Acked-by: Joonyoung Shim <jy0...@sa...>
Acked-by: Emil Velikov <emi...@gm...>
Acked-by: Tobias Jakobi <tj...@ma...>
Acked-by: Jan Vesely <jan...@ru...>
diff --git a/exynos/exynos_fimg2d.c b/exynos/exynos_fimg2d.c
index 61340c36..5658a48e 100644
--- a/exynos/exynos_fimg2d.c
+++ b/exynos/exynos_fimg2d.c
@@ -3,11 +3,24 @@
* Authors:
* Inki Dae <ink...@sa...>
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
*
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
diff --git a/exynos/exynos_fimg2d.h b/exynos/exynos_fimg2d.h
index a825c683..a4dfbe73 100644
--- a/exynos/exynos_fimg2d.h
+++ b/exynos/exynos_fimg2d.h
@@ -3,11 +3,24 @@
* Authors:
* Inki Dae <ink...@sa...>
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
*
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _FIMG2D_H_
diff --git a/exynos/fimg2d_reg.h b/exynos/fimg2d_reg.h
index 07dd6349..d42296d4 100644
--- a/exynos/fimg2d_reg.h
+++ b/exynos/fimg2d_reg.h
@@ -3,11 +3,24 @@
* Authors:
* Inki Dae <ink...@sa...>
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
*
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _FIMG2D_REG_H_
diff --git a/libkms/exynos.c b/libkms/exynos.c
index 0e97fb51..c20b6b05 100644
--- a/libkms/exynos.c
+++ b/libkms/exynos.c
@@ -5,10 +5,24 @@
* SooChan Lim <sc...@sa...>
* Sangjin LEE <ls...@sa...>
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
diff --git a/tests/exynos/exynos_fimg2d_event.c b/tests/exynos/exynos_fimg2d_event.c
index 9ed5a307..353e087b 100644
--- a/tests/exynos/exynos_fimg2d_event.c
+++ b/tests/exynos/exynos_fimg2d_event.c
@@ -1,17 +1,24 @@
/*
* Copyright (C) 2015 - Tobias Jakobi
*
- * This is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published
- * by the Free Software Foundation, either version 2 of the License,
- * or (at your option) any later version.
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
*
- * It is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- * You should have received a copy of the GNU General Public License
- * along with it. If not, see <http://www.gnu.org/licenses/>.
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
#include <unistd.h>
diff --git a/tests/exynos/exynos_fimg2d_perf.c b/tests/exynos/exynos_fimg2d_perf.c
index 1699bba7..a2d5c192 100644
--- a/tests/exynos/exynos_fimg2d_perf.c
+++ b/tests/exynos/exynos_fimg2d_perf.c
@@ -1,17 +1,24 @@
/*
* Copyright (C) 2015 - Tobias Jakobi
*
- * This is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published
- * by the Free Software Foundation, either version 2 of the License,
- * or (at your option) any later version.
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
*
- * It is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- * You should have received a copy of the GNU General Public License
- * along with it. If not, see <http://www.gnu.org/licenses/>.
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h>
diff --git a/tests/exynos/exynos_fimg2d_test.c b/tests/exynos/exynos_fimg2d_test.c
index ab1028e8..b71cf593 100644
--- a/tests/exynos/exynos_fimg2d_test.c
+++ b/tests/exynos/exynos_fimg2d_test.c
@@ -3,11 +3,24 @@
* Authors:
* Inki Dae <ink...@sa...>
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
*
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
|
|
From: <dea...@ke...> - 2017-11-09 09:36:56
|
amdgpu/amdgpu_device.c | 11 +++--------
include/drm/amdgpu_drm.h | 4 ----
2 files changed, 3 insertions(+), 12 deletions(-)
New commits:
commit 931f01964a2f2a75e8563feccc70ac2eb0296d99
Author: Christian König <chr...@am...>
Date: Thu Nov 9 10:36:05 2017 +0100
Revert "amdgpu: fix 32bit VA manager max address"
This reverts commit 944f6665de36b6a6c36263f23b7b9d1730e544fa.
Accidentially pushed an imcomplete patch.
Signed-off-by: Christian König <chr...@am...>
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index fa4ab0e7..344e87ed 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -271,7 +271,7 @@ int amdgpu_device_initialize(int fd,
}
start = dev->dev_info.virtual_address_offset;
- max = MIN2(dev->dev_info.virtual_address_max, 0x100000000ULL);
+ max = MIN2(dev->dev_info.virtual_address_max, 0xffffffff);
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
commit 0c2481edf7a2ce674beaf9ea61a6b19dea2f210b
Author: Christian König <chr...@am...>
Date: Thu Nov 9 10:35:24 2017 +0100
Revert "amdgpu: use the high VA range if possible"
This reverts commit 6c0ea4b0c5452bfc1e67b74ce723696ef3c80b25.
Accidentially pushed an incomplete patch.
Signed-off-by: Christian König <chr...@am...>
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index e04424d3..fa4ab0e7 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -275,13 +275,8 @@ int amdgpu_device_initialize(int fd,
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
- if (dev->dev_info.high_va_offset && dev->dev_info.high_va_max) {
- start = dev->dev_info.high_va_offset;
- max = dev->dev_info.high_va_max;
- } else {
- start = MAX2(dev->dev_info.virtual_address_offset, 0x100000000ULL);
- max = MAX2(dev->dev_info.virtual_address_max, 0x100000000ULL);
- }
+ start = MAX2(dev->dev_info.virtual_address_offset, 0x100000000ULL);
+ max = MAX2(dev->dev_info.virtual_address_max, 0x100000000ULL);
amdgpu_vamgr_init(&dev->vamgr, start, max,
dev->dev_info.virtual_address_alignment);
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index a023b476..919248fb 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -869,10 +869,6 @@ struct drm_amdgpu_info_device {
__u32 _pad1;
/* always on cu bitmap */
__u32 cu_ao_bitmap[4][4];
- /** Starting high virtual address for UMDs. */
- __u64 high_va_offset;
- /** The maximum high virtual address */
- __u64 high_va_max;
};
struct drm_amdgpu_info_hw_ip {
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