[Doxygen-users] VHDL: how to include elements of a record (and the associated comment)?
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dimitri
From: Fontaine, F. <Fil...@nl...> - 2015-04-23 09:43:56
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Hi all, I just started using Doxygen for documentation of a VHDL project. I'm having a bit of a struggle documenting type definitions that consist of a record. Here's an example of my VHDL-code (in a package): ---------------------------------------------------- --! @file --! @brief Just a brief description of the file library IEEE; use IEEE.std_logic_1164.all; --! @brief Here a brief description of the package --! @details A more detailed description of the package package pkg_test is --! description of just a type (no record) type just_a_type is (FIRST,SECOND); --! description for a type, which actually is a record type my_record_1 is record element_11 : std_logic; --! comment for first element of my_record_1 element_12 : std_logic; --! comment for second element of my_record_1 end record; --! Another type description, also a record type my_record_2 is record element_21 : std_logic; --! comment for first element of my_record_2 element_22 : std_logic; --! comment for second element of my_record_2 end record; end package; ---------------------------------------------------- The individual element of the records are not included in Doxygen's output and the comments associated with these elements seem to end up in the output in places where you don't expect it (comment and code seems to get 'out of sync'). Is there anything wrong or missing in my comment-lines, or should I change some configuration settings to get this right? Thanks in advance, Filip P.S. I'm using Doxygen version 1.8.9.1 on Windows 7 (64-bit, Service Pack 1). |