Makefile woes (mysterious missing separator)

[Nobody/Anonymous]

I'm writing a 'magic' Makefile that handles all my build needs for any project. Part of this makefile involves defining a build template for one executable, and then generating targets for all exe's using that template, by means of a foreach. That portion looks something like this:

----snip----
define build
$1: $(OBJ) exe/$1.o
@echo "Linking $1..."
@$(LD) $(LDFLAGS) -o $1 $(OBJ) exe/$1.o
endef

$(foreach dest,$(DESTS), $(eval $(call build,$(dest))))
---unsnip---

This works wonderfully well in Linux. But when I try running the same thing in windows, using make.exe that comes with the latest Dev-C++ (GNU make version 3.80), it gives me a 'missing separator' error for the (empty) line just above the foreach. Is this a bug in make, or am I overlooking something? Is foreach not meant to be used this way or something? It's based on an example I found in a make manual....

Thanks!

[radkuky]

Well, I solved my own problem! There was a space between the comma and the eval statement, which I guess offset the generated targets. That answers that!

[radkuky]

err just updating my post, since tabs were mangled:

There were tabs before the @echo and the @$(LD) of course.