[Csp-commits] svn:csp r1341 - in trunk/CSP/SimData: . Include/SimData SimData/Tests Source Tools/TaggedRecordCompiler

[<sv...@ww...>]

Author: mkrose
Date: 2004-12-03 00:54:56 -0800 (Fri, 03 Dec 2004)
New Revision: 1341

Added:
   trunk/CSP/SimData/Include/SimData/Endian.h
   trunk/CSP/SimData/Source/Config.cpp
Modified:
   trunk/CSP/SimData/CHANGES.current
   trunk/CSP/SimData/Include/SimData/Archive.h
   trunk/CSP/SimData/Include/SimData/TaggedRecord.h
   trunk/CSP/SimData/Include/SimData/Uniform.h
   trunk/CSP/SimData/SimData/Tests/ArchiveTests.py
   trunk/CSP/SimData/Source/DataArchive.cpp
   trunk/CSP/SimData/Source/SConscript
   trunk/CSP/SimData/Tools/TaggedRecordCompiler/trc_lex.py
Log:
* Refactored the Reader and Writer classes, and their subclasses.  Most
of the logic is now in non-virtual base class methods, with a virtual
interface for reading/writing raw byte strings implemented by the
subclass.  Also added support for serializing int64 and uint64, and
made length codes variable-width.

* Added a configuration program to generate a header file with machine
and compiler specific definitions.

=> WINDOWS users need to set up a custom build rule to first build
Source/Config.cpp as a standalone binary, and then run it to
generate Include/SimData/Config.h.  This header must be created
before the rest of SimData is built.  Note that the Config binary
writes the header text to stdout, so that must be redirected to
the appropriate file path.

* Added an endian conversion header based on GLib.  Converted the
Reader and Writer classes to be endian independent (all values are
stored as little-endian, regardless of the machine architecture).

Browse at: https://www.zerobar.net/viewcvs/viewcvs.cgi?view=rev&rev=1341

Diff omitted (59021 bytes).