<?xml version="1.0" encoding="utf-8"?>
<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Recent changes to Home</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>Recent changes to Home</description><atom:link href="https://sourceforge.net/p/controlix/wiki/Home/feed" rel="self"/><language>en</language><lastBuildDate>Wed, 28 Aug 2019 11:33:30 -0000</lastBuildDate><atom:link href="https://sourceforge.net/p/controlix/wiki/Home/feed" rel="self" type="application/rss+xml"/><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v113
+++ v114
@@ -2,7 +2,7 @@

 Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS code, the code will be capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

-[External Links]
+[External links]
 [FAQ]

 [[project_admins]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Wed, 28 Aug 2019 11:33:30 -0000</pubDate><guid>https://sourceforge.net72c2a5737921566c6384a98f70dddeb8446edc1c</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v112
+++ v113
@@ -2,6 +2,8 @@

 Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS code, the code will be capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

-[[External Links]]
+[External Links]
+[FAQ]
+
 [[project_admins]]
 [[download_button]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Wed, 28 Aug 2019 11:32:47 -0000</pubDate><guid>https://sourceforge.net8e0dab5eb81fb21f6ea862491939601ae37d4bb9</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v111
+++ v112
@@ -2,5 +2,6 @@

 Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS code, the code will be capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

+[[External Links]]
 [[project_admins]]
 [[download_button]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Wed, 28 Aug 2019 11:32:16 -0000</pubDate><guid>https://sourceforge.nete999905aa25517a965410c619995f31259826578</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v110
+++ v111
@@ -1,6 +1,6 @@
 Welcome to Controlix!

-Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-[virtual circuit]-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS and VC code, the code will be capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.
+Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS code, the code will be capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

 [[project_admins]]
 [[download_button]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Sun, 07 Jul 2019 22:25:30 -0000</pubDate><guid>https://sourceforge.net3c0cf667d75093449213c0ef33f0e63db19ec4a0</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v109
+++ v110
@@ -1,6 +1,6 @@
 Welcome to Controlix!

-Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-[virtual circuit]-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS, C/C++ libraries and the SystemC simulation library, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.
+Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-[virtual circuit]-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS and VC code, the code will be capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

 [[project_admins]]
 [[download_button]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Mon, 29 Apr 2019 15:30:16 -0000</pubDate><guid>https://sourceforge.net5428181324027a55ecc3e5ddf7ee93ec48f64770</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v108
+++ v109
@@ -1,6 +1,6 @@
 Welcome to Controlix!

-Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-[Virtual Circuit]-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS, C/C++ libraries and the SystemC simulation library, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.
+Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-[virtual circuit]-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS, C/C++ libraries and the SystemC simulation library, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

 [[project_admins]]
 [[download_button]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Sun, 28 Apr 2019 01:14:30 -0000</pubDate><guid>https://sourceforge.netc8ff3ef2cd8f2a42ad69af53ccaf5ea2d2d6cc9a</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v107
+++ v108
@@ -1,6 +1,6 @@
 Welcome to Controlix!

-Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-[Virtual-Circuit]-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS, C/C++ libraries and the SystemC simulation library, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.
+Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-[Virtual Circuit]-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS, C/C++ libraries and the SystemC simulation library, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

 [[project_admins]]
 [[download_button]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Sun, 28 Apr 2019 01:13:50 -0000</pubDate><guid>https://sourceforge.net5f5ded5171f108c5c21bc3e11dd79f6e2dd4dfe1</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v106
+++ v107
@@ -1,6 +1,6 @@
 Welcome to Controlix!

-Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-Virtual-Cirtcuit-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS, C/C++ libraries and the SystemC simulation library, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.
+Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-[Virtual-Circuit]-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS, C/C++ libraries and the SystemC simulation library, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

 [[project_admins]]
 [[download_button]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Sun, 28 Apr 2019 01:12:57 -0000</pubDate><guid>https://sourceforge.netdc432555b17a5d9132ff49091fa0914f0c2d35c0</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v105
+++ v106
@@ -1,18 +1,6 @@
 Welcome to Controlix!

-Controlix is a virtual circuit based operating system kernel based on hardware design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls and the interconnect bus written in VHDL, and a software layout of the new RTL-on-RTOS based design which builds but is untested.
-
-Controlix is written in the &lt;a href="../"&gt;SystemC language&lt;/a&gt; - a combination of the traditional C/C++ language used for systems programming everywhere and a set of dataflow abstractions.  SystemC allows systems designers to retain their existing skillsets in C/C++ programming, while simultaneously transitioning into abstract dataflow-parallel programming.  It will allow for an operating system which is testably secure, transparently and implicitly multithreaded, and backwards-compatible with the existing base of C-language systems code in the field today.
-
-While the basic element of the OS are written in SystemC, by leveraging the capabilities of the &lt;a href="../"&gt;Icarus compiler&lt;/a&gt; any Icarus-supported RTL should be capable (in principle at least) of being compilable to SystemC and therefore runnable and integratable with the basic controlix OS infrastructure.  Controlix will be released out of alpha stage development with a runtime-pluggable Icarus extension module which will provide a transcompiling back-end which will output SystemC code, allowing any of the Icarus front-end supported languages (currently SystemVerilog and VHDL) to integrate with the core SystemC code of the controlix OS system.
-
-Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for some small trampoline code in a set of native binary objects, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction, and, if run with the RTOS system target, the overall broadside exposed to bug exploitation should decrease to almost nothing compared to any type of OS design out there.
-
-Links with more detail:
-
-[FAQ]
-
-[External links]
+Controlix is an &lt;a href="../"&gt;RTL&lt;/a&gt;-on-Virtual-Cirtcuit-based operating system kernel based on integrated circuit design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls written in VHDL, and a software layout of the new simulator-on-RTOS based design.  Being based on RTL and simulation, Controlix will make extensive use of testbenching and formal verification.  Except for the underlying RTOS, C/C++ libraries and the SystemC simulation library, the code is capable of being fully testbenched "through" at the bit-and-cycle level of abstraction and the overall broadside exposed to bug exploitation should decrease quite a bit compared to almost any current type of OS design.

 [[project_admins]]
 [[download_button]]
&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Sat, 27 Apr 2019 19:47:55 -0000</pubDate><guid>https://sourceforge.nete3d19ac76c2923dc25b3ae9cf5c7aa054e1577d9</guid></item><item><title>Home modified by Jon Taylor</title><link>https://sourceforge.net/p/controlix/wiki/Home/</link><description>&lt;div class="markdown_content"&gt;&lt;pre&gt;--- v104
+++ v105
@@ -1,6 +1,6 @@
 Welcome to Controlix!

-Controlix is a virtual circuit based operating system kernel based on hardware design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls and the interconnect bus written in VHDL, and a software layout of the new SpecC-on-RTOS based design which builds but is untested.
+Controlix is a virtual circuit based operating system kernel based on hardware design principles.  The project as a whole is in pre-alpha stage and much of it is still based in design rather than implementation, but there is a small proof-of-concept implementation of controls and the interconnect bus written in VHDL, and a software layout of the new RTL-on-RTOS based design which builds but is untested.

 Controlix is written in the &lt;a href="../"&gt;SystemC language&lt;/a&gt; - a combination of the traditional C/C++ language used for systems programming everywhere and a set of dataflow abstractions.  SystemC allows systems designers to retain their existing skillsets in C/C++ programming, while simultaneously transitioning into abstract dataflow-parallel programming.  It will allow for an operating system which is testably secure, transparently and implicitly multithreaded, and backwards-compatible with the existing base of C-language systems code in the field today.

&lt;/pre&gt;
&lt;/div&gt;</description><dc:creator xmlns:dc="http://purl.org/dc/elements/1.1/">Jon Taylor</dc:creator><pubDate>Thu, 28 Mar 2019 22:28:25 -0000</pubDate><guid>https://sourceforge.net2e20495aedf36263fab6b59188fd2414da08ea11</guid></item></channel></rss>