Update of /cvsroot/com0com/com0com/sys
In directory sc8-pr-cvs4.sourceforge.net:/tmp/cvs-serv8459/sys
Modified Files:
handflow.c io.c ioctl.c
Log Message:
Replaces C0CE_INSERT_ENABLE_LSR_NBI (insertion on BREAK OFF)
by C0CE_INSERT_ENABLE_LSR_BI (insertion on BREAK change)
Index: io.c
===================================================================
RCS file: /cvsroot/com0com/com0com/sys/io.c,v
retrieving revision 1.38
retrieving revision 1.39
diff -C2 -d -r1.38 -r1.39
*** io.c 26 Jun 2008 13:37:10 -0000 1.38
--- io.c 19 Aug 2008 12:40:58 -0000 1.39
***************
*** 20,23 ****
--- 20,27 ----
*
* $Log$
+ * Revision 1.39 2008/08/19 12:40:58 vfrolov
+ * Replaces C0CE_INSERT_ENABLE_LSR_NBI (insertion on BREAK OFF)
+ * by C0CE_INSERT_ENABLE_LSR_BI (insertion on BREAK change)
+ *
* Revision 1.38 2008/06/26 13:37:10 vfrolov
* Implemented noise emulation
***************
*** 1398,1402 ****
WaitComplete(pIoPortRead, pQueueToComplete);
! if (pIoPortRead->escapeChar && (pIoPortRead->insertMask & C0CE_INSERT_ENABLE_LSR)) {
UCHAR lsr = 0x10; /* break interrupt indicator */
--- 1402,1408 ----
WaitComplete(pIoPortRead, pQueueToComplete);
! if (pIoPortRead->escapeChar &&
! (pIoPortRead->insertMask & (C0CE_INSERT_ENABLE_LSR|C0CE_INSERT_ENABLE_LSR_BI)))
! {
UCHAR lsr = 0x10; /* break interrupt indicator */
Index: handflow.c
===================================================================
RCS file: /cvsroot/com0com/com0com/sys/handflow.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -C2 -d -r1.9 -r1.10
*** handflow.c 11 Jul 2008 10:38:00 -0000 1.9
--- handflow.c 19 Aug 2008 12:40:58 -0000 1.10
***************
*** 20,23 ****
--- 20,27 ----
*
* $Log$
+ * Revision 1.10 2008/08/19 12:40:58 vfrolov
+ * Replaces C0CE_INSERT_ENABLE_LSR_NBI (insertion on BREAK OFF)
+ * by C0CE_INSERT_ENABLE_LSR_BI (insertion on BREAK change)
+ *
* Revision 1.9 2008/07/11 10:38:00 vfrolov
* Added nonstandard ability to enable LSR insertion on BREAK OFF
***************
*** 405,409 ****
pIoPortRead = pIoPort->pIoPortRemote;
! if (pIoPortRead->escapeChar && (pIoPortRead->insertMask & C0CE_INSERT_ENABLE_LSR_NBI)) {
UCHAR lsr = 0;
--- 409,413 ----
pIoPortRead = pIoPort->pIoPortRemote;
! if (pIoPortRead->escapeChar && (pIoPortRead->insertMask & C0CE_INSERT_ENABLE_LSR_BI)) {
UCHAR lsr = 0;
Index: ioctl.c
===================================================================
RCS file: /cvsroot/com0com/com0com/sys/ioctl.c,v
retrieving revision 1.37
retrieving revision 1.38
diff -C2 -d -r1.37 -r1.38
*** ioctl.c 11 Jul 2008 10:38:00 -0000 1.37
--- ioctl.c 19 Aug 2008 12:40:58 -0000 1.38
***************
*** 20,23 ****
--- 20,27 ----
*
* $Log$
+ * Revision 1.38 2008/08/19 12:40:58 vfrolov
+ * Replaces C0CE_INSERT_ENABLE_LSR_NBI (insertion on BREAK OFF)
+ * by C0CE_INSERT_ENABLE_LSR_BI (insertion on BREAK change)
+ *
* Revision 1.37 2008/07/11 10:38:00 vfrolov
* Added nonstandard ability to enable LSR insertion on BREAK OFF
***************
*** 636,640 ****
C0CE_INSERT_ENABLE_RBR| \
C0CE_INSERT_ENABLE_RLC| \
! C0CE_INSERT_ENABLE_LSR_NBI)
#define C0CE_INSERT_CAPS (C0CE_INSERT_OPTS|C0CE_INSERT_BITS)
--- 640,644 ----
C0CE_INSERT_ENABLE_RBR| \
C0CE_INSERT_ENABLE_RLC| \
! C0CE_INSERT_ENABLE_LSR_BI)
#define C0CE_INSERT_CAPS (C0CE_INSERT_OPTS|C0CE_INSERT_BITS)
***************
*** 659,663 ****
if (optsAndBits & C0CE_INSERT_IOCTL_GET) {
! if (optsAndBits & (C0CE_INSERT_ENABLE_LSR|C0CE_INSERT_ENABLE_LSR_NBI))
Information += sizeof(UCHAR)*2 + sizeof(UCHAR);
if (optsAndBits & C0CE_INSERT_ENABLE_MST)
--- 663,667 ----
if (optsAndBits & C0CE_INSERT_IOCTL_GET) {
! if (optsAndBits & (C0CE_INSERT_ENABLE_LSR|C0CE_INSERT_ENABLE_LSR_BI))
Information += sizeof(UCHAR)*2 + sizeof(UCHAR);
if (optsAndBits & C0CE_INSERT_ENABLE_MST)
***************
*** 701,705 ****
if (optsAndBits & C0CE_INSERT_IOCTL_GET) {
! if (optsAndBits & (C0CE_INSERT_ENABLE_LSR|C0CE_INSERT_ENABLE_LSR_NBI)) {
UCHAR lsr = 0;
--- 705,709 ----
if (optsAndBits & C0CE_INSERT_IOCTL_GET) {
! if (optsAndBits & (C0CE_INSERT_ENABLE_LSR|C0CE_INSERT_ENABLE_LSR_BI)) {
UCHAR lsr = 0;
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