Re: [coLinux-users] 0.7.2 less reliable on dual core?

[Henry N. <Hen...@Ar...>]

Henry Nestler wrote:
> baldyeti wrote:
>>> What is exactly the cpu model? "cat /proc/cpuinfo"
>> processor       : 0
>> vendor_id       : GenuineIntel
>> cpu family      : 6
>> model           : 15
>> model name      : Intel(R) Pentium(R) Dual  CPU  E2180  @ 2.00GHz
>> stepping        : 13
>> cpu MHz         : 2000.000
>> cache size      : 1024 KB
>> fdiv_bug        : no
>> hlt_bug         : no
>> f00f_bug        : no
>> coma_bug        : no
>> fpu             : yes
>> fpu_exception   : yes
>> cpuid level     : 10
>> wp              : yes
>> flags           : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca 
>> cmov pat
>> pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc 
>> pni mon
>> itor ds_cpl est tm2 ssse3 cx16 xtpr lahf_lm
>> bogomips        : 4731.69
>> clflush size    : 64
>>
>> There is no overclocking applied, all default BIOS settings.
>> The machine has been very stable so far under XP.
> 
> Yes, of curse. But, perhaps windows does some special workarrounts to
> fix the buggy cache on your cpu?
> 
> Intel P4 and Xeon was old candidate for problems with caching long time
> ago. Has Intel a new buggy chipset now? An idea only.
> 
> I found inside Linux kernel:
> arch/i386/kernel/cpu/intel.c:31
> void __cpuinit early_intel_workaround(struct cpuinfo_x86 *c)
> {
>         if (c->x86_vendor != X86_VENDOR_INTEL)
>                 return;
>         /* Netburst reports 64 bytes clflush size, but does IO in 128
> bytes */
>         if (c->x86 == 15 && c->x86_cache_alignment == 64)
>                 c->x86_cache_alignment = 128;
> }
> 
> This is exactly your CPU, I'm afraid. You have model: 15 and clflush
> size 64. But, I not know how it is interesting for coLinux.

Sorry, you have not that cpu. Yours is
cpu family      : 6	<=== c->x86
model           : 15	<=== c->x86_model
stepping        : 13	<=== c->x86_mask

Inside the current kernel 2.6.25-rc3 found this
arch/i386/kernel/cpu/intel.c:33
void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
{
        /* Netburst reports 64 bytes clflush size, but does IO in 128
bytes */
        if (c->x86 == 15 && c->x86_cache_alignment == 64)
                c->x86_cache_alignment = 128;
        if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
                (c->x86 == 0x6 && c->x86_model >= 0x0e))
                set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
}

If I read this, only TSC will be change for your cpu. But should no
depend on the memory bug you found.

-- 
Henry N.