Toves is a new project that is intended to replace Logisim. A working first version - version 0.0.1 - is now available. It is not yet very capable (just AND, OR, and NOT gates, without even being able to save to a file). But I invite any Logisim users who are interested to participate over the coming months and years as Toves will hopefully develop into a worthy successor. Toves has a blog http://sourceforge.net/p/toves/blog where you can follow along with its progress and contribute your thoughts on its design. (I won't post more about Toves in the Logisim project until Toves is at a stage that it actually competes with Logisim.)
Toves should hopefully overcome several limitations to Logisim that are deeply embedded in the system but prevent it from maturing to "the next level." Here are a few of the features that are hoped from Toves, but which aren't in Logisim:
- Diagonal wires [This is in Toves today: Horizontal/vertical is the default, but alt-drag creates a diagonal wire.]
- Canvas extends infinitely in all directions (rather than having a fixed upper left corner) [This is in Toves today.]
- Z-ordering of components preserved
- Drawing arbitrary shapes like rectangles or lines in a layout
- Modules of varying types - usually a layout (the only Logisim option), but a module might also be a memory, a truth table, or a state machine - and hopefully one day source code (perhaps written in Verilog)
- No delay in sending signals into a subcircuit (Logisim introduced a one-step delay when sending a signal into or out of a subcircuit)
- Bidirectional connections into subcircuits
- Eight-valued logic, allowing weakly-driven 1's and 0's - particularly useful for open-collector circuits
- An oscilloscope for viewing how signals change over time
- Components that must be "closed" once the simulation becomes inactive - particularly file and network I/O
- Components that "time out" after a period, like a monoflop.
- Tablet support under iOS and Android.
The Toves Web page is at http://www.toves.org/.