The course named CS 3410 (Computer System Organization and Programming) at Cornell University uses Logisim.
We developed a "test vector" functionality that allows the user to specify a test file with input and output values for pins. Logisim sets the input pins to the values specified and checks that the output values match the expected values.
I am attaching a set of patches that apply to SVN revision 246 of the Logisim repository (this corresponds to Bazaar revision 233, or tag 2.7.1). You can check out this functionality in "Simulate->Test Vector...". The format of a test vector file matches that of a log file created by Logisim.
There are a few limitations of this functionality:
1. It only works for combinational logic, not sequential.
2. It completely fails to work if any Probe component is present in the circuit being tested, or any subcircuit thereof.
I tried my best to fix the second problem, but I could not. Any advice on how to do so would be greatly appreciated. And if you should deem it suitable, it would be great to see this functionality upstream.
Patches against 2.7.1 source for test vectors