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[Cegcc-svn] SF.net SVN: cegcc: [1150] trunk/cegcc/src/gcc-4.3.0
|
From: <dan...@us...> - 2008-03-22 14:29:42
|
Revision: 1150
http://cegcc.svn.sourceforge.net/cegcc/?rev=1150&view=rev
Author: dannybackx
Date: 2008-03-22 07:29:39 -0700 (Sat, 22 Mar 2008)
Log Message:
-----------
Import gcc-4.3.0 (already done, I blocked the really big SVN commit messages).
Merge stuff from our older gcc tree.
Right now this appears to work for C, but not yet for C++.
Modified Paths:
--------------
trunk/cegcc/src/gcc-4.3.0/config.sub
trunk/cegcc/src/gcc-4.3.0/configure
trunk/cegcc/src/gcc-4.3.0/configure.ac
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm-protos.h
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.c
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.h
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.opt
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/ieee754-df.S
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/ieee754-sf.S
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/lib1funcs.asm
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/pe.c
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/pe.h
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/pe.opt
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/t-pe
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/t-wince-pe
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/wince-pe.h
trunk/cegcc/src/gcc-4.3.0/gcc/config.gcc
trunk/cegcc/src/gcc-4.3.0/gcc/config.in
trunk/cegcc/src/gcc-4.3.0/gcc/gthr-win32.h
trunk/cegcc/src/gcc-4.3.0/libgcc/config.host
Added Paths:
-----------
trunk/cegcc/src/gcc-4.3.0/ChangeLog.ce
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc.opt
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc1.c
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cygming.opt
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/gthr-win32.c
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/mingw32.h
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/pe-cxx.c
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/pe-stubs.c
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/t-cygming
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/t-gthr-win32
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/t-mingw32
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/t-wince-cegcc
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/wince-cegcc.h
trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/xm-mingw32.h
Added: trunk/cegcc/src/gcc-4.3.0/ChangeLog.ce
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/ChangeLog.ce (rev 0)
+++ trunk/cegcc/src/gcc-4.3.0/ChangeLog.ce 2008-03-22 14:29:39 UTC (rev 1150)
@@ -0,0 +1,23 @@
+2008-03-22 Danny Backx <dan...@us...>
+
+ * Import gcc-4.3.0 source tree.
+ * ChangeLog.ce: Add.
+ * configure.ac, gcc/config.gcc, libgcc/config.host, gcc/config.in,
+ config.sub: Merge configuration for cegcc/mingw32ce into gcc-4.3.0
+ source tree.
+ * gcc/config/arm/cygming.opt, gcc/config/arm/mingw32.h,
+ gcc/config/arm/t-mingw32, gcc/config/arm/pe-cxx.c,
+ gcc/config/arm/t-wince-cegcc, gcc/config/arm/pe-stubs.c,
+ gcc/config/arm/cegcc1.c, gcc/config/arm/t-cygming,
+ gcc/config/arm/xm-mingw32.h, gcc/config/arm/t-gthr-win32,
+ gcc/config/arm/gthr-win32.c, gcc/config/arm/wince-cegcc.h,
+ gcc/config/arm/cegcc.opt: Copy from older cegcc tree into gcc-4.3.0.
+ * gcc/config/arm/ieee754-sf.S, gcc/config/arm/pe.c,
+ gcc/config/arm/ieee754-df.S, gcc/config/arm/t-pe,
+ gcc/config/arm/pe.h, gcc/config/arm/arm-protos.h,
+ gcc/config/arm/arm.h, gcc/config/arm/arm.opt,
+ gcc/config/arm/arm.c, gcc/config/arm/wince-pe.h,
+ gcc/config/arm/t-wince-pe, gcc/config/arm/pe.opt,
+ gcc/config/arm/lib1funcs.asm, gcc/gthr-win32.h: Merge gcc-4.3.0 and
+ our older cegcc tree.
+ * gcc/configure: Regenerate.
Modified: trunk/cegcc/src/gcc-4.3.0/config.sub
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/config.sub 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/config.sub 2008-03-22 14:29:39 UTC (rev 1150)
@@ -703,6 +703,10 @@
basic_machine=i386-pc
os=-mingw32
;;
+ cegcc)
+ basic_machine=arm-unknown
+ os=-cegcc
+ ;;
mingw32ce)
basic_machine=arm-unknown
os=-mingw32ce
@@ -1249,7 +1253,7 @@
| -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
| -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
| -chorusos* | -chorusrdb* \
- | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
+ | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* | -cegcc* \
| -mingw32* | -linux-gnu* | -linux-newlib* | -linux-uclibc* \
| -uxpv* | -beos* | -mpeix* | -udk* \
| -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \
Modified: trunk/cegcc/src/gcc-4.3.0/configure
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/configure 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/configure 2008-03-22 14:29:39 UTC (rev 1150)
@@ -2220,15 +2220,15 @@
sh-*-linux*)
noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
;;
- sh*-*-pe|mips*-*-pe|*arm-wince-pe)
+ sh*-*-pe|mips*-*-pe|*arm-wince-pe|*arm*-*-mingw*ce|*arm*-*-cegcc*)
noconfigdirs="$noconfigdirs ${libgcj}"
noconfigdirs="$noconfigdirs target-examples"
noconfigdirs="$noconfigdirs target-libiberty texinfo send-pr"
noconfigdirs="$noconfigdirs tcl tk itcl libgui sim"
noconfigdirs="$noconfigdirs expect dejagnu"
# the C++ libraries don't build on top of CE's C libraries
- noconfigdirs="$noconfigdirs target-libstdc++-v3"
- noconfigdirs="$noconfigdirs target-newlib"
+ # noconfigdirs="$noconfigdirs target-libstdc++-v3"
+ # noconfigdirs="$noconfigdirs target-newlib"
case "${host}" in
*-*-cygwin*) ;; # keep gdb and readline
*) noconfigdirs="$noconfigdirs gdb readline"
Modified: trunk/cegcc/src/gcc-4.3.0/configure.ac
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/configure.ac 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/configure.ac 2008-03-22 14:29:39 UTC (rev 1150)
@@ -497,15 +497,15 @@
sh-*-linux*)
noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
;;
- sh*-*-pe|mips*-*-pe|*arm-wince-pe)
+ sh*-*-pe|mips*-*-pe|*arm-wince-pe|*arm*-*-mingw*ce|*arm*-*-cegcc*)
noconfigdirs="$noconfigdirs ${libgcj}"
noconfigdirs="$noconfigdirs target-examples"
noconfigdirs="$noconfigdirs target-libiberty texinfo send-pr"
noconfigdirs="$noconfigdirs tcl tk itcl libgui sim"
noconfigdirs="$noconfigdirs expect dejagnu"
# the C++ libraries don't build on top of CE's C libraries
- noconfigdirs="$noconfigdirs target-libstdc++-v3"
- noconfigdirs="$noconfigdirs target-newlib"
+ # noconfigdirs="$noconfigdirs target-libstdc++-v3"
+ # noconfigdirs="$noconfigdirs target-newlib"
case "${host}" in
*-*-cygwin*) ;; # keep gdb and readline
*) noconfigdirs="$noconfigdirs gdb readline"
Modified: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm-protos.h
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm-protos.h 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm-protos.h 2008-03-22 14:29:39 UTC (rev 1150)
@@ -1,4 +1,5 @@
-/* Prototypes for exported functions defined in arm.c and pe.c
+/* Prototypes for exported functions defined in arm.c, pe.c,
+ pe-cxx.c and pe-stubs.c.
Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rea...@ar...)
@@ -40,8 +41,11 @@
unsigned int);
extern unsigned int arm_dbx_register_number (unsigned int);
extern void arm_output_fn_unwind (FILE *, bool);
-
+extern void arm_file_end (void);
+int arm_major_arch (void);
+bool arm_thumb_arch_p (void);
+
#ifdef TREE_CODE
extern int arm_return_in_memory (const_tree);
#endif
@@ -191,9 +195,27 @@
#endif
/* Defined in pe.c. */
-extern int arm_dllexport_name_p (const char *);
-extern int arm_dllimport_name_p (const char *);
+extern void arm_pe_asm_named_section (const char *, unsigned int, tree);
+extern unsigned int arm_pe_section_type_flags (tree, const char *, int);
+// extern const char *arm_pe_strip_name_encoding (const char *);
+// extern void arm_pe_output_labelref (FILE *, const char *);
+extern int arm_pe_dllexport_name_p (const char *);
+extern int arm_pe_dllimport_name_p (const char *);
+extern void arm_pe_record_external_function (tree, const char *);
+extern void arm_pe_declare_function_type (FILE *, const char *, int);
+extern void arm_pe_record_exported_symbol (const char *, int);
+extern void arm_pe_file_end (void);
+extern int arm_pe_dllexport_name_p (const char *);
+extern int arm_pe_dllimport_name_p (const char *);
+extern bool arm_pe_valid_dllimport_attribute_p (tree);
+extern tree arm_pe_handle_selectany_attribute (tree *, tree, tree, int, bool *);
+extern tree arm_pe_handle_shared_attribute (tree *, tree, tree, int, bool *);
+/* In pe-cxx.c and pe-stubs.c */
+extern void arm_pe_adjust_class_at_definition (tree);
+extern bool arm_pe_type_dllimport_p (tree);
+extern bool arm_pe_type_dllexport_p (tree);
+
#ifdef TREE_CODE
extern void arm_pe_unique_section (tree, int);
extern void arm_pe_encode_section_info (tree, rtx, int);
@@ -207,6 +229,14 @@
extern void arm_pr_no_long_calls (struct cpp_reader *);
extern void arm_pr_long_calls_off (struct cpp_reader *);
+tree arm_pe_handle_exception_handler_attribute (tree *node,
+ tree name,
+ tree args,
+ int ARG_UNUSED (flags),
+ bool *no_add_attrs);
+const char *
+arm_pe_exception_handler (FILE *fp, char *name, tree decl);
+
extern void arm_lang_object_attributes_init(void);
extern const char *arm_mangle_type (const_tree);
Modified: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.c
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.c 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.c 2008-03-22 14:29:39 UTC (rev 1150)
@@ -155,7 +155,6 @@
static void arm_encode_section_info (tree, rtx, int);
#endif
-static void arm_file_end (void);
static void arm_file_start (void);
static void arm_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
@@ -189,6 +188,8 @@
static bool arm_cannot_copy_insn_p (rtx);
static bool arm_tls_symbol_p (rtx x);
static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
+static tree arm_handle_struct_attribute (tree *, tree, tree, int, bool *);
+static bool arm_ms_bitfield_layout_p (tree record_type);
/* Initialize the GCC target structure. */
@@ -197,19 +198,25 @@
#define TARGET_MERGE_DECL_ATTRIBUTES merge_dllimport_decl_attributes
#endif
-#undef TARGET_ATTRIBUTE_TABLE
-#define TARGET_ATTRIBUTE_TABLE arm_attribute_table
-
#undef TARGET_ASM_FILE_START
#define TARGET_ASM_FILE_START arm_file_start
-#undef TARGET_ASM_FILE_END
-#define TARGET_ASM_FILE_END arm_file_end
#undef TARGET_ASM_ALIGNED_SI_OP
#define TARGET_ASM_ALIGNED_SI_OP NULL
#undef TARGET_ASM_INTEGER
#define TARGET_ASM_INTEGER arm_assemble_integer
+#ifdef ARM_PE
+#undef TARGET_ASM_UNALIGNED_HI_OP
+#define TARGET_ASM_UNALIGNED_HI_OP "\t.2byte\t"
+#undef TARGET_ASM_UNALIGNED_SI_OP
+#define TARGET_ASM_UNALIGNED_SI_OP "\t.4byte\t"
+#undef TARGET_ASM_UNALIGNED_DI_OP
+#define TARGET_ASM_UNALIGNED_DI_OP "\t.8byte\t"
+#undef TARGET_ASM_UNALIGNED_TI_OP
+#define TARGET_ASM_UNALIGNED_TI_OP NULL
+#endif
+
#undef TARGET_ASM_FUNCTION_PROLOGUE
#define TARGET_ASM_FUNCTION_PROLOGUE arm_output_function_prologue
@@ -218,6 +225,7 @@
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
+
#undef TARGET_HANDLE_OPTION
#define TARGET_HANDLE_OPTION arm_handle_option
#undef TARGET_HELP
@@ -232,16 +240,6 @@
#undef TARGET_SCHED_ADJUST_COST
#define TARGET_SCHED_ADJUST_COST arm_adjust_cost
-#undef TARGET_ENCODE_SECTION_INFO
-#ifdef ARM_PE
-#define TARGET_ENCODE_SECTION_INFO arm_pe_encode_section_info
-#else
-#define TARGET_ENCODE_SECTION_INFO arm_encode_section_info
-#endif
-
-#undef TARGET_STRIP_NAME_ENCODING
-#define TARGET_STRIP_NAME_ENCODING arm_strip_name_encoding
-
#undef TARGET_ASM_INTERNAL_LABEL
#define TARGET_ASM_INTERNAL_LABEL arm_internal_label
@@ -355,6 +353,9 @@
#define TARGET_HAVE_TLS true
#endif
+#undef TARGET_MS_BITFIELD_LAYOUT_P
+#define TARGET_MS_BITFIELD_LAYOUT_P arm_ms_bitfield_layout_p
+
#undef TARGET_CANNOT_FORCE_CONST_MEM
#define TARGET_CANNOT_FORCE_CONST_MEM arm_cannot_force_const_mem
@@ -2757,9 +2758,11 @@
return (size < 0 || size > UNITS_PER_WORD);
}
- /* For the arm-wince targets we choose to be compatible with Microsoft's
- ARM and Thumb compilers, which always return aggregates in memory. */
-#ifndef ARM_WINCE
+ if (TARGET_RETURN_AGGREGATES_IN_MEMORY
+ && (TREE_CODE (type) == RECORD_TYPE
+ || TREE_CODE (type) == UNION_TYPE))
+ return 1;
+
/* All structures/unions bigger than one word are returned in memory.
Also catch the case where int_size_in_bytes returns -1. In this case
the aggregate is either huge or of variable size, and in either case
@@ -2836,7 +2839,6 @@
return 0;
}
-#endif /* not ARM_WINCE */
/* Return all other types in memory. */
return 1;
@@ -3031,28 +3033,29 @@
/* Whereas these functions are always known to reside within the 26 bit
addressing range. */
{ "short_call", 0, 0, false, true, true, NULL },
+ /* Cdecl attribute says the callee is a normal C declaration
+ this is the default */
+ { "cdecl", 0, 0, false, true, true, NULL },
/* Interrupt Service Routines have special prologue and epilogue requirements. */
{ "isr", 0, 1, false, false, false, arm_handle_isr_attribute },
{ "interrupt", 0, 1, false, false, false, arm_handle_isr_attribute },
{ "naked", 0, 0, true, false, false, arm_handle_fndecl_attribute },
-#ifdef ARM_PE
- /* ARM/PE has three new attributes:
- interfacearm - ?
- dllexport - for exporting a function/variable that will live in a dll
- dllimport - for importing a function/variable from a dll
-
- Microsoft allows multiple declspecs in one __declspec, separating
+ { "interfacearm", 0, 0, true, false, false, arm_handle_fndecl_attribute },
+#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
+ /* Microsoft allows multiple declspecs in one __declspec, separating
them with spaces. We do NOT support this. Instead, use __declspec
multiple times.
*/
- { "dllimport", 0, 0, true, false, false, NULL },
- { "dllexport", 0, 0, true, false, false, NULL },
- { "interfacearm", 0, 0, true, false, false, arm_handle_fndecl_attribute },
-#elif TARGET_DLLIMPORT_DECL_ATTRIBUTES
{ "dllimport", 0, 0, false, false, false, handle_dll_attribute },
{ "dllexport", 0, 0, false, false, false, handle_dll_attribute },
{ "notshared", 0, 0, false, true, false, arm_handle_notshared_attribute },
+ { "shared", 0, 0, true, false, false, arm_pe_handle_shared_attribute },
#endif
+ { "ms_struct", 0, 0, false, false, false, arm_handle_struct_attribute },
+ { "gcc_struct", 0, 0, false, false, false, arm_handle_struct_attribute },
+#ifdef SUBTARGET_ATTRIBUTE_TABLE
+ SUBTARGET_ATTRIBUTE_TABLE,
+#endif
{ NULL, 0, 0, false, false, false, NULL }
};
@@ -3335,6 +3338,12 @@
if (IS_STACKALIGN (func_type))
return false;
+#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
+ /* Dllimport'd functions are also called indirectly. */
+ if (decl && DECL_DLLIMPORT_P (decl))
+ return false;
+#endif
+
/* Everything else is ok. */
return true;
}
@@ -13148,6 +13157,7 @@
return default_assemble_integer (x, size, aligned_p);
}
+#ifdef OBJECT_FORMAT_ELF
static void
arm_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor)
{
@@ -13197,6 +13207,7 @@
{
arm_elf_asm_cdtor (symbol, priority, /*is_ctor=*/false);
}
+#endif
/* A finite state machine takes care of noticing whether or not instructions
can be conditionally executed, and thus decrease execution time and code
@@ -16929,8 +16940,8 @@
fprintf (f, "\t.code\t16\n");
#ifdef ARM_PE
- if (arm_dllexport_name_p (name))
- name = arm_strip_name_encoding (name);
+ if (arm_pe_dllexport_name_p (name))
+ name = arm_strip_name_encoding (name);
#endif
asm_fprintf (f, "\t.globl %s%U%s\n", STUB_NAME, name);
fprintf (f, "\t.thumb_func\n");
@@ -17552,7 +17563,7 @@
default_file_start();
}
-static void
+void
arm_file_end (void)
{
int regno;
@@ -18714,4 +18725,175 @@
return NULL;
}
+/* Handle a "ms_struct" or "gcc_struct" attribute; arguments as in
+ struct attribute_spec.handler. */
+static tree
+arm_handle_struct_attribute (tree *node,
+ tree name,
+ tree args ATTRIBUTE_UNUSED,
+ int flags ATTRIBUTE_UNUSED,
+ bool *no_add_attrs)
+{
+ tree *type = NULL;
+ if (DECL_P (*node))
+ {
+ if (TREE_CODE (*node) == TYPE_DECL)
+ type = &TREE_TYPE (*node);
+ }
+ else
+ type = node;
+
+ if (!(type && (TREE_CODE (*type) == RECORD_TYPE
+ || TREE_CODE (*type) == UNION_TYPE)))
+ {
+ warning (OPT_Wattributes, "%qs attribute ignored",
+ IDENTIFIER_POINTER (name));
+ *no_add_attrs = true;
+ }
+
+ else if ((is_attribute_p ("ms_struct", name)
+ && lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (*type)))
+ || ((is_attribute_p ("gcc_struct", name)
+ && lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (*type)))))
+ {
+ warning (OPT_Wattributes, "%qs incompatible attribute ignored",
+ IDENTIFIER_POINTER (name));
+ *no_add_attrs = true;
+ }
+
+ return NULL_TREE;
+}
+
+static bool
+arm_ms_bitfield_layout_p (tree record_type)
+{
+ return (TARGET_MS_BITFIELD_LAYOUT &&
+ !lookup_attribute ("gcc_struct", TYPE_ATTRIBUTES (record_type)))
+ || lookup_attribute ("ms_struct", TYPE_ATTRIBUTES (record_type));
+}
+
+int
+arm_major_arch (void)
+{
+ if ((insn_flags & FL_FOR_ARCH6) == FL_FOR_ARCH6)
+ return 6;
+ else if ((insn_flags & FL_FOR_ARCH5) == FL_FOR_ARCH5)
+ return 5;
+ else if ((insn_flags & FL_FOR_ARCH4) == FL_FOR_ARCH4)
+ return 4;
+ else if ((insn_flags & FL_FOR_ARCH3) == FL_FOR_ARCH3)
+ return 3;
+ else if ((insn_flags & FL_FOR_ARCH2) == FL_FOR_ARCH2)
+ return 2;
+
+ /* This should gives us a nice ICE somewhere. */
+ return -1;
+}
+
+bool
+arm_thumb_arch_p (void)
+{
+ return (insn_flags & FL_THUMB) == FL_THUMB;
+}
+
+/* Called from ASM_DECLARE_FUNCTION_NAME in gcc/config/arm/wince-pe.h */
+const char *
+arm_pe_exception_handler (FILE * ARG_UNUSED (fp), char *name, tree decl)
+{
+ tree attr, a2;
+
+ attr = DECL_ATTRIBUTES (decl);
+ {
+// tree format_num_expr = TREE_VALUE (TREE_CHAIN (attr));
+// tree format_num_expr = TREE_VALUE (attr);
+// tree format_num_expr = (attr);
+
+// deze doet iets zinnig :
+// tree format_num_expr = TREE_VALUE(decl);
+// exarg.c: In function 'handler':
+// exarg.c:13: internal compiler error: tree check: expected tree_list, have function_decl in arm_pe_exception_handler, at config/arm/arm.c:15568
+//
+
+// a2 = lookup_attribute ("__exception_handler__", decl);
+// tree format_num_expr = TREE_VALUE(a2);
+
+// tree format_num_expr = TREE_VALUE(TREE_CHAIN(decl));
+// tree format_num_expr = TREE_VALUE(decl);
+ tree format_num_expr = decl;
+
+#if 0
+ fprintf(stderr, "Yow arm_pe_exception_handler %p\n", format_num_expr);
+ if (TREE_CODE(format_num_expr) == STRING_CST) {
+ fprintf(stderr, "arm_pe_exception_handler : string\n");
+ } else if (TREE_CODE(format_num_expr) == INTEGER_CST) {
+ fprintf(stderr, "arm_pe_exception_handler : integer\n");
+ } else {
+ fprintf(stderr, "arm_pe_exception_handler : unknown\n");
+ }
+#endif
+ }
+ if (! attr)
+ return NULL;
+ a2 = lookup_attribute ("__exception_handler__", attr);
+ if (a2)
+ return IDENTIFIER_POINTER (TREE_VALUE (TREE_VALUE (a2)));
+
+// warning (0, "exception handler information not found for function %s", name);
+ return NULL;
+}
+
+/* Handle a "exception_handler" attribute.
+
+ One argument is required : the name of a function to call in case of exceptions.
+ Example syntax :
+
+ int main(int argc, char *argv[])
+ __attribute__((__exception_handler__(handler))); */
+
+tree
+arm_pe_handle_exception_handler_attribute (tree *node, tree name,
+ tree args,
+ int ARG_UNUSED (flags),
+ bool *no_add_attrs)
+{
+ if (TREE_CODE (*node) == FUNCTION_DECL)
+ {
+ tree a;
+
+ /* We need to pass the name of the exception handler. The
+ right code then gets generated from config/arm/wince-pe.h
+ or similar, the assembler and linker will do the hard work.
+
+ FIX ME We don't support passing data to the exception handler.
+
+ This should be possible though, by using an additional argument
+ which needs to fit in the dword (e.g. a pointer) and storing that
+ in the right field as we do with the exception handler. */
+ tree attr = NULL_TREE;
+
+// fprintf(stderr, "arm_pe_handle_exception_handler_attribute: arg %p no_add_attrs %d\n",
+// flags, *no_add_attrs);
+
+ tree format_num_expr = TREE_VALUE (TREE_CHAIN (args));
+#if 0
+ if (TREE_CODE(format_num_expr) == STRING_CST) {
+ fprintf(stderr, "arm_pe_handle_exception_handler_attribute : string\n");
+ } else if (TREE_CODE(format_num_expr) == INTEGER_CST) {
+ fprintf(stderr, "arm_pe_handle_exception_handler_attribute : integer\n");
+ } else {
+ fprintf(stderr, "arm_pe_handle_exception_handler_attribute : unknown\n");
+ }
+#endif
+ attr = tree_cons (get_identifier ("exception_handler"), args, attr);
+ }
+ else
+ {
+ warning (OPT_Wattributes, "%qs attribute ignored", IDENTIFIER_POINTER (name));
+ *no_add_attrs = true;
+ }
+
+ return NULL_TREE;
+}
+
+
#include "gt-arm.h"
Modified: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.h
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.h 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.h 2008-03-22 14:29:39 UTC (rev 1150)
@@ -2416,6 +2416,11 @@
} \
while (0)
+#define TARGET_ASM_FILE_END arm_file_end
+#define TARGET_ATTRIBUTE_TABLE arm_attribute_table
+#define TARGET_ENCODE_SECTION_INFO arm_encode_section_info
+#define TARGET_STRIP_NAME_ENCODING arm_strip_name_encoding
+
#ifdef HAVE_GAS_MAX_SKIP_P2ALIGN
/* To support -falign-* switches we need to use .p2align so
that alignment directives in code sections will be padded
Modified: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.opt
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.opt 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/arm.opt 2008-03-22 14:29:39 UTC (rev 1150)
@@ -156,3 +156,7 @@
mvectorize-with-neon-quad
Target Report Mask(NEON_VECTORIZE_QUAD)
Use Neon quad-word (rather than double-word) registers for vectorization
+
+mreturn-aggregates-in-memory
+Target Report Mask(RETURN_AGGREGATES_IN_MEMORY)
+Return aggregates in memory
Added: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc.opt
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc.opt (rev 0)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc.opt 2008-03-22 14:29:39 UTC (rev 1150)
@@ -0,0 +1,39 @@
+; cegcc specific options.
+
+; Copyright (C) 2006 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING. If not, write to the Free
+; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
+; 02110-1301, USA.
+
+mcegcc
+Target
+Use the Cegcc interface
+
+mdll
+Target RejectNegative
+Generate code for a DLL
+
+mnop-fun-dllimport
+Ignore dllimport for functions
+
+mthreads
+Target RejectNegative
+Use Cegcc-specific thread support
+
+mwin32
+Target
+Set Windows defines
Added: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc1.c
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc1.c (rev 0)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc1.c 2008-03-22 14:29:39 UTC (rev 1150)
@@ -0,0 +1,5 @@
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include <string.h>
Property changes on: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cegcc1.c
___________________________________________________________________
Name: svn:eol-style
+ native
Added: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cygming.opt
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cygming.opt (rev 0)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/cygming.opt 2008-03-22 14:29:39 UTC (rev 1150)
@@ -0,0 +1,37 @@
+; Cygwin- and MinGW-specific options.
+
+; Copyright (C) 2005 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING. If not, write to the Free
+; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
+; 02110-1301, USA.
+
+mcygwin
+Target
+Use the Cygwin interface
+
+; ### TODO make this work.
+; mnop-fun-dllimport
+; Target Report Var(TARGET_NOP_FUN_DLLIMPORT)
+; Ignore dllimport for functions
+
+mthreads
+Target RejectNegative
+Use Mingw-specific thread support
+
+mwin32
+Target
+Set Windows defines
Added: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/gthr-win32.c
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/gthr-win32.c (rev 0)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/gthr-win32.c 2008-03-22 14:29:39 UTC (rev 1150)
@@ -0,0 +1,263 @@
+/* Implementation of W32-specific threads compatibility routines for
+ libgcc2. */
+
+/* Copyright (C) 1999, 2000, 2002, 2004, 2006 Free Software Foundation, Inc.
+ Contributed by Mumit Khan <kh...@xr...>.
+ Modified and moved to separate file by Danny Smith
+ <dan...@us...>.
+
+ Copied from config/i386 and adapted to wince
+ <ped...@po...>.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
+02110-1301, USA. */
+
+/* As a special exception, if you link this library with other files,
+ some of which are compiled with GCC, to produce an executable,
+ this library does not by itself cause the resulting executable
+ to be covered by the GNU General Public License.
+ This exception does not however invalidate any other reasons why
+ the executable file might be covered by the GNU General Public License. */
+
+#if defined __MINGW32__
+#include <_mingw.h>
+#endif
+
+#include <windows.h>
+
+#ifndef __GTHREAD_HIDE_WIN32API
+# define __GTHREAD_HIDE_WIN32API 1
+#endif
+#undef __GTHREAD_I486_INLINE_LOCK_PRIMITIVES
+#ifdef __i386__
+#define __GTHREAD_I486_INLINE_LOCK_PRIMITIVES
+#endif
+#include <gthr-win32.h>
+
+/* Windows32 threads specific definitions. The windows32 threading model
+ does not map well into pthread-inspired gcc's threading model, and so
+ there are caveats one needs to be aware of.
+
+ 1. The destructor supplied to __gthread_key_create is ignored for
+ generic x86-win32 ports. This will certainly cause memory leaks
+ due to unreclaimed eh contexts (sizeof (eh_context) is at least
+ 24 bytes for x86 currently).
+
+ This memory leak may be significant for long-running applications
+ that make heavy use of C++ EH.
+
+ However, Mingw runtime (version 0.3 or newer) provides a mechanism
+ to emulate pthreads key dtors; the runtime provides a special DLL,
+ linked in if -mthreads option is specified, that runs the dtors in
+ the reverse order of registration when each thread exits. If
+ -mthreads option is not given, a stub is linked in instead of the
+ DLL, which results in memory leak. Other x86-win32 ports can use
+ the same technique of course to avoid the leak.
+
+ 2. The error codes returned are non-POSIX like, and cast into ints.
+ This may cause incorrect error return due to truncation values on
+ hw where sizeof (DWORD) > sizeof (int).
+
+ 3. We are currently using a special mutex instead of the Critical
+ Sections, since Win9x does not support TryEnterCriticalSection
+ (while NT does).
+
+ The basic framework should work well enough. In the long term, GCC
+ needs to use Structured Exception Handling on Windows32. */
+
+int
+__gthr_win32_once (__gthread_once_t *once, void (*func) (void))
+{
+ if (once == NULL || func == NULL)
+ return -1;
+
+ if (! once->done)
+ {
+ if (InterlockedIncrement (&(once->started)) == 0)
+ {
+ (*func) ();
+ once->done = TRUE;
+ }
+ else
+ {
+ /* Another thread is currently executing the code, so wait for it
+ to finish; yield the CPU in the meantime. If performance
+ does become an issue, the solution is to use an Event that
+ we wait on here (and set above), but that implies a place to
+ create the event before this routine is called. */
+ while (! once->done)
+ Sleep (0);
+ }
+ }
+ return 0;
+}
+
+/* Windows32 thread local keys don't support destructors; this leads to
+ leaks, especially in threaded applications making extensive use of
+ C++ EH. Mingw uses a thread-support DLL to work-around this problem. */
+
+int
+__gthr_win32_key_create (__gthread_key_t *key, void (*dtor) (void *))
+{
+ int status = 0;
+ DWORD tls_index = TlsAlloc ();
+ if (tls_index != 0xFFFFFFFF)
+ {
+ *key = tls_index;
+#ifdef MINGW32_SUPPORTS_MT_EH
+ /* Mingw runtime will run the dtors in reverse order for each thread
+ when the thread exits. */
+ status = __mingwthr_key_dtor (*key, dtor);
+#endif
+ }
+ else
+ status = (int) GetLastError ();
+ return status;
+}
+
+int
+__gthr_win32_key_delete (__gthread_key_t key)
+{
+ return (TlsFree (key) != 0) ? 0 : (int) GetLastError ();
+}
+
+void *
+__gthr_win32_getspecific (__gthread_key_t key)
+{
+ DWORD lasterror;
+ void *ptr;
+ lasterror = GetLastError();
+ ptr = TlsGetValue(key);
+ SetLastError( lasterror );
+ return ptr;
+}
+
+int
+__gthr_win32_setspecific (__gthread_key_t key, const void *ptr)
+{
+ return (TlsSetValue (key, (void*) ptr) != 0) ? 0 : (int) GetLastError ();
+}
+
+void
+__gthr_win32_mutex_init_function (__gthread_mutex_t *mutex)
+{
+ mutex->counter = -1;
+ mutex->sema = CreateSemaphore (NULL, 0, 65535, NULL);
+}
+
+int
+__gthr_win32_mutex_lock (__gthread_mutex_t *mutex)
+{
+ if (InterlockedIncrement (&mutex->counter) == 0 ||
+ WaitForSingleObject (mutex->sema, INFINITE) == WAIT_OBJECT_0)
+ return 0;
+ else
+ {
+ /* WaitForSingleObject returns WAIT_FAILED, and we can only do
+ some best-effort cleanup here. */
+ InterlockedDecrement (&mutex->counter);
+ return 1;
+ }
+}
+
+int
+__gthr_win32_mutex_trylock (__gthread_mutex_t *mutex)
+{
+ if (__GTHR_W32_InterlockedCompareExchange (&mutex->counter, 0, -1) < 0)
+ return 0;
+ else
+ return 1;
+}
+
+int
+__gthr_win32_mutex_unlock (__gthread_mutex_t *mutex)
+{
+ if (InterlockedDecrement (&mutex->counter) >= 0)
+ return ReleaseSemaphore (mutex->sema, 1, NULL) ? 0 : 1;
+ else
+ return 0;
+}
+
+void
+__gthr_win32_recursive_mutex_init_function (__gthread_recursive_mutex_t *mutex)
+{
+ mutex->counter = -1;
+ mutex->depth = 0;
+ mutex->owner = 0;
+ mutex->sema = CreateSemaphore (NULL, 0, 65535, NULL);
+}
+
+int
+__gthr_win32_recursive_mutex_lock (__gthread_recursive_mutex_t *mutex)
+{
+ DWORD me = GetCurrentThreadId();
+ if (InterlockedIncrement (&mutex->counter) == 0)
+ {
+ mutex->depth = 1;
+ mutex->owner = me;
+ }
+ else if (mutex->owner == me)
+ {
+ InterlockedDecrement (&mutex->counter);
+ ++(mutex->depth);
+ }
+ else if (WaitForSingleObject (mutex->sema, INFINITE) == WAIT_OBJECT_0)
+ {
+ mutex->depth = 1;
+ mutex->owner = me;
+ }
+ else
+ {
+ /* WaitForSingleObject returns WAIT_FAILED, and we can only do
+ some best-effort cleanup here. */
+ InterlockedDecrement (&mutex->counter);
+ return 1;
+ }
+ return 0;
+}
+
+int
+__gthr_win32_recursive_mutex_trylock (__gthread_recursive_mutex_t *mutex)
+{
+ DWORD me = GetCurrentThreadId();
+ if (__GTHR_W32_InterlockedCompareExchange (&mutex->counter, 0, -1) < 0)
+ {
+ mutex->depth = 1;
+ mutex->owner = me;
+ }
+ else if (mutex->owner == me)
+ ++(mutex->depth);
+ else
+ return 1;
+
+ return 0;
+}
+
+int
+__gthr_win32_recursive_mutex_unlock (__gthread_recursive_mutex_t *mutex)
+{
+ --(mutex->depth);
+ if (mutex->depth == 0)
+ {
+ mutex->owner = 0;
+
+ if (InterlockedDecrement (&mutex->counter) >= 0)
+ return ReleaseSemaphore (mutex->sema, 1, NULL) ? 0 : 1;
+ }
+
+ return 0;
+}
Property changes on: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/gthr-win32.c
___________________________________________________________________
Name: svn:eol-style
+ native
Modified: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/ieee754-df.S
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/ieee754-df.S 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/ieee754-df.S 2008-03-22 14:29:39 UTC (rev 1150)
@@ -101,7 +101,7 @@
COND(orr,s,ne) ip, r5, yl
COND(mvn,s,ne) ip, r4, asr #21
COND(mvn,s,ne) ip, r5, asr #21
- beq LSYM(Lad_s)
+ beq LSYM(ad_s)
@ Compute exponent difference. Make largest exponent in r4,
@ corresponding arg in xh-xl, and positive exponent difference in r5.
@@ -154,8 +154,8 @@
@ If exponent == difference, one or both args were denormalized.
@ Since this is not common case, rescale them off line.
teq r4, r5
- beq LSYM(Lad_d)
-LSYM(Lad_x):
+ beq LSYM(ad_d)
+LSYM(ad_x):
@ Compensate for the exponent overlapping the mantissa MSB added later
sub r4, r4, #1
@@ -181,7 +181,7 @@
@ We now have a result in xh-xl-ip.
@ Keep absolute value in xh-xl-ip, sign in r5 (the n bit was set above)
and r5, xh, #0x80000000
- bpl LSYM(Lad_p)
+ bpl LSYM(ad_p)
#if defined(__thumb2__)
mov lr, #0
negs ip, ip
@@ -194,11 +194,11 @@
#endif
@ Determine how to normalize the result.
-LSYM(Lad_p):
+LSYM(ad_p):
cmp xh, #0x00100000
- bcc LSYM(Lad_a)
+ bcc LSYM(ad_a)
cmp xh, #0x00200000
- bcc LSYM(Lad_e)
+ bcc LSYM(ad_e)
@ Result needs to be shifted right.
movs xh, xh, lsr #1
@@ -209,13 +209,13 @@
@ Make sure we did not bust our exponent.
mov r2, r4, lsl #21
cmn r2, #(2 << 21)
- bcs LSYM(Lad_o)
+ bcs LSYM(ad_o)
@ Our result is now properly aligned into xh-xl, remaining bits in ip.
@ Round with MSB of ip. If halfway between two numbers, round towards
@ LSB of xl = 0.
@ Pack final result together.
-LSYM(Lad_e):
+LSYM(ad_e):
cmp ip, #0x80000000
do_it eq
COND(mov,s,eq) ip, xl, lsr #1
@@ -225,16 +225,16 @@
RETLDM "r4, r5"
@ Result must be shifted left and exponent adjusted.
-LSYM(Lad_a):
+LSYM(ad_a):
movs ip, ip, lsl #1
adcs xl, xl, xl
adc xh, xh, xh
tst xh, #0x00100000
sub r4, r4, #1
- bne LSYM(Lad_e)
+ bne LSYM(ad_e)
@ No rounding necessary since ip will always be 0 at this point.
-LSYM(Lad_l):
+LSYM(ad_l):
#if __ARM_ARCH__ < 5
@@ -341,21 +341,21 @@
@ Adjust exponents for denormalized arguments.
@ Note that r4 must not remain equal to 0.
-LSYM(Lad_d):
+LSYM(ad_d):
teq r4, #0
eor yh, yh, #0x00100000
do_it eq, te
eoreq xh, xh, #0x00100000
addeq r4, r4, #1
subne r5, r5, #1
- b LSYM(Lad_x)
+ b LSYM(ad_x)
-LSYM(Lad_s):
+LSYM(ad_s):
mvns ip, r4, asr #21
do_it ne
COND(mvn,s,ne) ip, r5, asr #21
- beq LSYM(Lad_i)
+ beq LSYM(ad_i)
teq r4, r5
do_it eq
@@ -392,7 +392,7 @@
and r5, xh, #0x80000000
@ Overflow: return INF.
-LSYM(Lad_o):
+LSYM(ad_o):
orr xh, r5, #0x7f000000
orr xh, xh, #0x00f00000
mov xl, #0
@@ -404,7 +404,7 @@
@ if either is NAN: return NAN
@ if opposite sign: return NAN
@ otherwise return xh-xl (which is INF or -INF)
-LSYM(Lad_i):
+LSYM(ad_i):
mvns ip, r4, asr #21
do_it ne, te
movne xh, yh
@@ -440,7 +440,7 @@
mov xl, r0
.endif
mov xh, #0
- b LSYM(Lad_l)
+ b LSYM(ad_l)
FUNC_END aeabi_ui2d
FUNC_END floatunsidf
@@ -462,7 +462,7 @@
mov xl, r0
.endif
mov xh, #0
- b LSYM(Lad_l)
+ b LSYM(ad_l)
FUNC_END aeabi_i2d
FUNC_END floatsidf
@@ -490,7 +490,7 @@
mov r4, #0x380 @ setup corresponding exponent
and r5, xh, #0x80000000 @ move sign bit in r5
bic xh, xh, #0x80000000
- b LSYM(Lad_l)
+ b LSYM(ad_l)
FUNC_END aeabi_f2d
FUNC_END extendsfdf2
@@ -565,7 +565,7 @@
.endif
movs ip, xh, lsr #22
- beq LSYM(Lad_p)
+ beq LSYM(ad_p)
@ The value is too big. Scale it down a bit...
mov r2, #3
@@ -583,7 +583,7 @@
shiftop orr xl xl xh lsl r3 lr
shift1 lsr, xh, xh, r2
add r4, r4, r2
- b LSYM(Lad_p)
+ b LSYM(ad_p)
#if !defined (__VFP_FP__) && !defined(__SOFTFP__)
@@ -617,7 +617,7 @@
COND(and,s,ne) r5, ip, yh, lsr #20
teqne r4, ip
teqne r5, ip
- bleq LSYM(Lml_s)
+ bleq LSYM(ml_s)
@ Add exponents together
add r4, r4, r5
@@ -634,7 +634,7 @@
COND(orr,s,ne) r5, yl, yh, lsl #12
orr xh, xh, #0x00100000
orr yh, yh, #0x00100000
- beq LSYM(Lml_1)
+ beq LSYM(ml_1)
#if __ARM_ARCH__ < 4
@@ -735,7 +735,7 @@
subs ip, r4, #(254 - 1)
do_it hi
cmphi ip, #0x700
- bhi LSYM(Lml_u)
+ bhi LSYM(ml_u)
@ Round the result, merge final exponent.
cmp lr, #0x80000000
@@ -746,7 +746,7 @@
RETLDM "r4, r5, r6"
@ Multiplication by 0x1p*: let''s shortcut a lot of code.
-LSYM(Lml_1):
+LSYM(ml_1):
and r6, r6, #0x80000000
orr xh, r6, xh
orr xl, xl, yl
@@ -762,9 +762,9 @@
mov lr, #0
subs r4, r4, #1
-LSYM(Lml_u):
+LSYM(ml_u):
@ Overflow?
- bgt LSYM(Lml_o)
+ bgt LSYM(ml_o)
@ Check if denormalized result is possible, otherwise return signed 0.
cmn r4, #(53 + 1)
@@ -827,7 +827,7 @@
@ One or both arguments are denormalized.
@ Scale them leftwards and preserve sign bit.
-LSYM(Lml_d):
+LSYM(ml_d):
teq r4, #0
bne 2f
and r6, xh, #0x80000000
@@ -851,7 +851,7 @@
orr yh, yh, r6
mov pc, lr
-LSYM(Lml_s):
+LSYM(ml_s):
@ Isolate the INF and NAN cases away
teq r4, ip
and r5, ip, yh, lsr #20
@@ -863,10 +863,10 @@
orrs r6, xl, xh, lsl #1
do_it ne
COND(orr,s,ne) r6, yl, yh, lsl #1
- bne LSYM(Lml_d)
+ bne LSYM(ml_d)
@ Result is 0, but determine sign anyway.
-LSYM(Lml_z):
+LSYM(ml_z):
eor xh, xh, yh
and xh, xh, #0x80000000
mov xl, #0
@@ -878,25 +878,25 @@
moveq xl, yl
moveq xh, yh
COND(orr,s,ne) r6, yl, yh, lsl #1
- beq LSYM(Lml_n) @ 0 * INF or INF * 0 -> NAN
+ beq LSYM(ml_n) @ 0 * INF or INF * 0 -> NAN
teq r4, ip
bne 1f
orrs r6, xl, xh, lsl #12
- bne LSYM(Lml_n) @ NAN * <anything> -> NAN
+ bne LSYM(ml_n) @ NAN * <anything> -> NAN
1: teq r5, ip
- bne LSYM(Lml_i)
+ bne LSYM(ml_i)
orrs r6, yl, yh, lsl #12
do_it ne, t
movne xl, yl
movne xh, yh
- bne LSYM(Lml_n) @ <anything> * NAN -> NAN
+ bne LSYM(ml_n) @ <anything> * NAN -> NAN
@ Result is INF, but we need to determine its sign.
-LSYM(Lml_i):
+LSYM(ml_i):
eor xh, xh, yh
@ Overflow: return INF (sign already in xh).
-LSYM(Lml_o):
+LSYM(ml_o):
and xh, xh, #0x80000000
orr xh, xh, #0x7f000000
orr xh, xh, #0x00f00000
@@ -904,7 +904,7 @@
RETLDM "r4, r5, r6"
@ Return a quiet NAN.
-LSYM(Lml_n):
+LSYM(ml_n):
orr xh, xh, #0x7f000000
orr xh, xh, #0x00f80000
RETLDM "r4, r5, r6"
@@ -925,7 +925,7 @@
COND(and,s,ne) r5, ip, yh, lsr #20
teqne r4, ip
teqne r5, ip
- bleq LSYM(Ldv_s)
+ bleq LSYM(dv_s)
@ Substract divisor exponent from dividend''s.
sub r4, r4, r5
@@ -937,7 +937,7 @@
@ Dividend -> r5-r6, divisor -> yh-yl.
orrs r5, yl, yh, lsl #12
mov xh, xh, lsl #12
- beq LSYM(Ldv_1)
+ beq LSYM(dv_1)
mov yh, yh, lsl #12
mov r5, #0x10000000
orr yh, r5, yh, lsr #4
@@ -1031,7 +1031,7 @@
subs ip, r4, #(254 - 1)
do_it hi
cmphi ip, #0x700
- bhi LSYM(Lml_u)
+ bhi LSYM(ml_u)
@ Round the result, merge final exponent.
subs ip, r5, yh
@@ -1043,7 +1043,7 @@
RETLDM "r4, r5, r6"
@ Division by 0x1p*: shortcut a lot of code.
-LSYM(Ldv_1):
+LSYM(dv_1):
and lr, lr, #0x80000000
orr xh, lr, xh, lsr #12
adds r4, r4, ip, lsr #1
@@ -1055,48 +1055,48 @@
orr xh, xh, #0x00100000
mov lr, #0
subs r4, r4, #1
- b LSYM(Lml_u)
+ b LSYM(ml_u)
@ Result mightt need to be denormalized: put remainder bits
@ in lr for rounding considerations.
-LSYM(Ldv_u):
+LSYM(dv_u):
orr lr, r5, r6
- b LSYM(Lml_u)
+ b LSYM(ml_u)
@ One or both arguments is either INF, NAN or zero.
-LSYM(Ldv_s):
+LSYM(dv_s):
and r5, ip, yh, lsr #20
teq r4, ip
do_it eq
teqeq r5, ip
- beq LSYM(Lml_n) @ INF/NAN / INF/NAN -> NAN
+ beq LSYM(ml_n) @ INF/NAN / INF/NAN -> NAN
teq r4, ip
bne 1f
orrs r4, xl, xh, lsl #12
- bne LSYM(Lml_n) @ NAN / <anything> -> NAN
+ bne LSYM(ml_n) @ NAN / <anything> -> NAN
teq r5, ip
- bne LSYM(Lml_i) @ INF / <anything> -> INF
+ bne LSYM(ml_i) @ INF / <anything> -> INF
mov xl, yl
mov xh, yh
- b LSYM(Lml_n) @ INF / (INF or NAN) -> NAN
+ b LSYM(ml_n) @ INF / (INF or NAN) -> NAN
1: teq r5, ip
bne 2f
orrs r5, yl, yh, lsl #12
- beq LSYM(Lml_z) @ <anything> / INF -> 0
+ beq LSYM(ml_z) @ <anything> / INF -> 0
mov xl, yl
mov xh, yh
- b LSYM(Lml_n) @ <anything> / NAN -> NAN
+ b LSYM(ml_n) @ <anything> / NAN -> NAN
2: @ If both are nonzero, we need to normalize and resume above.
orrs r6, xl, xh, lsl #1
do_it ne
COND(orr,s,ne) r6, yl, yh, lsl #1
- bne LSYM(Lml_d)
+ bne LSYM(ml_d)
@ One or both arguments are 0.
orrs r4, xl, xh, lsl #1
- bne LSYM(Lml_i) @ <non_zero> / 0 -> INF
+ bne LSYM(ml_i) @ <non_zero> / 0 -> INF
orrs r5, yl, yh, lsl #1
- bne LSYM(Lml_z) @ 0 / <non_zero> -> 0
- b LSYM(Lml_n) @ 0 / 0 -> NAN
+ bne LSYM(ml_z) @ 0 / <non_zero> -> 0
+ b LSYM(ml_n) @ 0 / 0 -> NAN
FUNC_END aeabi_ddiv
FUNC_END divdf3
Modified: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/ieee754-sf.S
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/ieee754-sf.S 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/ieee754-sf.S 2008-03-22 14:29:39 UTC (rev 1150)
@@ -76,7 +76,7 @@
teqne r2, r3
COND(mvn,s,ne) ip, r2, asr #24
COND(mvn,s,ne) ip, r3, asr #24
- beq LSYM(Lad_s)
+ beq LSYM(ad_s)
@ Compute exponent difference. Make largest exponent in r2,
@ corresponding arg in r0, and positive exponent difference in r3.
@@ -112,8 +112,8 @@
@ If exponent == difference, one or both args were denormalized.
@ Since this is not common case, rescale them off line.
teq r2, r3
- beq LSYM(Lad_d)
-LSYM(Lad_x):
+ beq LSYM(ad_d)
+LSYM(ad_x):
@ Compensate for the exponent overlapping the mantissa MSB added later
sub r2, r2, #1
@@ -126,7 +126,7 @@
@ Keep absolute value in r0-r1, sign in r3 (the n bit was set above)
and r3, r0, #0x80000000
- bpl LSYM(Lad_p)
+ bpl LSYM(ad_p)
#if defined(__thumb2__)
negs r1, r1
sbc r0, r0, r0, lsl #1
@@ -136,11 +136,11 @@
#endif
@ Determine how to normalize the result.
-LSYM(Lad_p):
+LSYM(ad_p):
cmp r0, #0x00800000
- bcc LSYM(Lad_a)
+ bcc LSYM(ad_a)
cmp r0, #0x01000000
- bcc LSYM(Lad_e)
+ bcc LSYM(ad_e)
@ Result needs to be shifted right.
movs r0, r0, lsr #1
@@ -149,13 +149,13 @@
@ Make sure we did not bust our exponent.
cmp r2, #254
- bhs LSYM(Lad_o)
+ bhs LSYM(ad_o)
@ Our result is now properly aligned into r0, remaining bits in r1.
@ Pack final result together.
@ Round with MSB of r1. If halfway between two numbers, round towards
@ LSB of r0 = 0.
-LSYM(Lad_e):
+LSYM(ad_e):
cmp r1, #0x80000000
adc r0, r0, r2, lsl #23
do_it eq
@@ -164,15 +164,15 @@
RET
@ Result must be shifted left and exponent adjusted.
-LSYM(Lad_a):
+LSYM(ad_a):
movs r1, r1, lsl #1
adc r0, r0, r0
tst r0, #0x00800000
sub r2, r2, #1
- bne LSYM(Lad_e)
+ bne LSYM(ad_e)
@ No rounding necessary since r1 will always be 0 at this point.
-LSYM(Lad_l):
+LSYM(ad_l):
#if __ARM_ARCH__ < 5
@@ -218,22 +218,22 @@
@ Fixup and adjust bit position for denormalized arguments.
@ Note that r2 must not remain equal to 0.
-LSYM(Lad_d):
+LSYM(ad_d):
teq r2, #0
eor r1, r1, #0x00800000
do_it eq, te
eoreq r0, r0, #0x00800000
addeq r2, r2, #1
subne r3, r3, #1
- b LSYM(Lad_x)
+ b LSYM(ad_x)
-LSYM(Lad_s):
+LSYM(ad_s):
mov r3, r1, lsl #1
mvns ip, r2, asr #24
do_it ne
COND(mvn,s,ne) ip, r3, asr #24
- beq LSYM(Lad_i)
+ beq LSYM(ad_i)
teq r2, r3
beq 1f
@@ -265,7 +265,7 @@
and r3, r0, #0x80000000
@ Overflow: return INF.
-LSYM(Lad_o):
+LSYM(ad_o):
orr r0, r3, #0x7f000000
orr r0, r0, #0x00800000
RET
@@ -276,7 +276,7 @@
@ if r0 or r1 is NAN: return NAN
@ if opposite sign: return NAN
@ otherwise return r0 (which is INF or -INF)
-LSYM(Lad_i):
+LSYM(ad_i):
mvns r2, r2, asr #24
do_it ne, et
movne r0, r1
@@ -460,8 +460,8 @@
COND(and,s,ne) r3, ip, r1, lsr #23
teqne r2, ip
teqne r3, ip
- beq LSYM(Lml_s)
-LSYM(Lml_x):
+ beq LSYM(ml_s)
+LSYM(ml_x):
@ Add exponents together
add r2, r2, r3
@@ -475,7 +475,7 @@
movs r0, r0, lsl #9
do_it ne
COND(mov,s,ne) r1, r1, lsl #9
- beq LSYM(Lml_1)
+ beq LSYM(ml_1)
mov r3, #0x08000000
orr r0, r3, r0, lsr #5
orr r1, r3, r1, lsr #5
@@ -522,7 +522,7 @@
@ Apply exponent bias, check for under/overflow.
sbc r2, r2, #127
cmp r2, #(254 - 1)
- bhi LSYM(Lml_u)
+ bhi LSYM(ml_u)
@ Round the result, merge final exponent.
cmp r3, #0x80000000
@@ -532,7 +532,7 @@
RET
@ Multiplication by 0x1p*: let''s shortcut a lot of code.
-LSYM(Lml_1):
+LSYM(ml_1):
teq r0, #0
and ip, ip, #0x80000000
do_it eq
@@ -550,9 +550,9 @@
mov r3, #0
subs r2, r2, #1
-LSYM(Lml_u):
+LSYM(ml_u):
@ Overflow?
- bgt LSYM(Lml_o)
+ bgt LSYM(ml_o)
@ Check if denormalized result is possible, otherwise return signed 0.
cmn r2, #(24 + 1)
@@ -575,7 +575,7 @@
@ One or both arguments are denormalized.
@ Scale them leftwards and preserve sign bit.
-LSYM(Lml_d):
+LSYM(ml_d):
teq r2, #0
and ip, r0, #0x80000000
1: do_it eq, tt
@@ -592,9 +592,9 @@
subeq r3, r3, #1
beq 2b
orr r1, r1, ip
- b LSYM(Lml_x)
+ b LSYM(ml_x)
-LSYM(Lml_s):
+LSYM(ml_s):
@ Isolate the INF and NAN cases away
and r3, ip, r1, lsr #23
teq r2, ip
@@ -606,10 +606,10 @@
bics ip, r0, #0x80000000
do_it ne
COND(bic,s,ne) ip, r1, #0x80000000
- bne LSYM(Lml_d)
+ bne LSYM(ml_d)
@ Result is 0, but determine sign anyway.
-LSYM(Lml_z):
+LSYM(ml_z):
eor r0, r0, r1
bic r0, r0, #0x7fffffff
RET
@@ -621,31 +621,31 @@
moveq r0, r1
teqne r1, #0x0
teqne r1, #0x80000000
- beq LSYM(Lml_n) @ 0 * INF or INF * 0 -> NAN
+ beq LSYM(ml_n) @ 0 * INF or INF * 0 -> NAN
teq r2, ip
bne 1f
movs r2, r0, lsl #9
- bne LSYM(Lml_n) @ NAN * <anything> -> NAN
+ bne LSYM(ml_n) @ NAN * <anything> -> NAN
1: teq r3, ip
- bne LSYM(Lml_i)
+ bne LSYM(ml_i)
movs r3, r1, lsl #9
do_it ne
movne r0, r1
- bne LSYM(Lml_n) @ <anything> * NAN -> NAN
+ bne LSYM(ml_n) @ <anything> * NAN -> NAN
@ Result is INF, but we need to determine its sign.
-LSYM(Lml_i):
+LSYM(ml_i):
eor r0, r0, r1
@ Overflow: return INF (sign already in r0).
-LSYM(Lml_o):
+LSYM(ml_o):
and r0, r0, #0x80000000
orr r0, r0, #0x7f000000
orr r0, r0, #0x00800000
RET
@ Return a quiet NAN.
-LSYM(Lml_n):
+LSYM(ml_n):
orr r0, r0, #0x7f000000
orr r0, r0, #0x00c00000
RET
@@ -663,8 +663,8 @@
COND(and,s,ne) r3, ip, r1, lsr #23
teqne r2, ip
teqne r3, ip
- beq LSYM(Ldv_s)
-LSYM(Ldv_x):
+ beq LSYM(dv_s)
+LSYM(dv_x):
@ Substract divisor exponent from dividend''s
sub r2, r2, r3
@@ -676,7 +676,7 @@
@ Dividend -> r3, divisor -> r1.
movs r1, r1, lsl #9
mov r0, r0, lsl #9
- beq LSYM(Ldv_1)
+ beq LSYM(dv_1)
mov r3, #0x10000000
orr r1, r3, r1, lsr #4
orr r3, r3, r0, lsr #4
@@ -716,7 +716,7 @@
@ Check exponent for under/overflow.
cmp r2, #(254 - 1)
- bhi LSYM(Lml_u)
+ bhi LSYM(ml_u)
@ Round the result, merge final exponent.
cmp r3, r1
@@ -726,7 +726,7 @@
RET
@ Division by 0x1p*: let''s shortcut a lot of code.
-LSYM(Ldv_1):
+LSYM(dv_1):
and ip, ip, #0x80000000
orr r0, ip, r0, lsr #9
adds r2, r2, #127
@@ -738,11 +738,11 @@
orr r0, r0, #0x00800000
mov r3, #0
subs r2, r2, #1
- b LSYM(Lml_u)
+ b LSYM(ml_u)
@ One or both arguments are denormalized.
@ Scale them leftwards and preserve sign bit.
-LSYM(Ldv_d):
+LSYM(dv_d):
teq r2, #0
and ip, r0, #0x80000000
1: do_it eq, tt
@@ -759,36 +759,36 @@
subeq r3, r3, #1
beq 2b
orr r1, r1, ip
- b LSYM(Ldv_x)
+ b LSYM(dv_x)
@ One or both arguments are either INF, NAN, zero or denormalized.
-LSYM(Ldv_s):
+LSYM(dv_s):
and r3, ip, r1, lsr #23
teq r2, ip
bne 1f
movs r2, r0, lsl #9
- bne LSYM(Lml_n) @ NAN / <anything> -> NAN
+ bne LSYM(ml_n) @ NAN / <anything> -> NAN
teq r3, ip
- bne LSYM(Lml_i) @ INF / <anything> -> INF
+ bne LSYM(ml_i) @ INF / <anything> -> INF
mov r0, r1
- b LSYM(Lml_n) @ INF / (INF or NAN) -> NAN
+ b LSYM(ml_n) @ INF / (INF or NAN) -> NAN
1: teq r3, ip
bne 2f
movs r3, r1, lsl #9
- beq LSYM(Lml_z) @ <anything> / INF -> 0
+ beq LSYM(ml_z) @ <anything> / INF -> 0
mov r0, r1
- b LSYM(Lml_n) @ <anything> / NAN -> NAN
+ b LSYM(ml_n) @ <anything> / NAN -> NAN
2: @ If both are nonzero, we need to normalize and resume above.
bics ip, r0, #0x80000000
do_it ne
COND(bic,s,ne) ip, r1, #0x80000000
- bne LSYM(Ldv_d)
+ bne LSYM(dv_d)
@ One or both arguments are zero.
bics r2, r0, #0x80000000
- bne LSYM(Lml_i) @ <non_zero> / 0 -> INF
+ bne LSYM(ml_i) @ <non_zero> / 0 -> INF
bics r3, r1, #0x80000000
- bne LSYM(Lml_z) @ 0 / <non_zero> -> 0
- b LSYM(Lml_n) @ 0 / 0 -> NAN
+ bne LSYM(ml_z) @ 0 / <non_zero> -> 0
+ b LSYM(ml_n) @ 0 / 0 -> NAN
FUNC_END aeabi_fdiv
FUNC_END divsf3
Modified: trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/lib1funcs.asm
===================================================================
--- trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/lib1funcs.asm 2008-03-22 09:04:58 UTC (rev 1149)
+++ trunk/cegcc/src/gcc-4.3.0/gcc/config/arm/lib1funcs.asm 2008-03-22 14:29:39 UTC (rev 1150)
@@ -52,22 +52,22 @@
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
#ifdef __ELF__
-#ifdef __thumb__
-#define __PLT__ /* Not supported in Thumb assembler (for now). */
-#elif defined __vxworks && !defined __PIC__
-#define __PLT__ /* Not supported by the kernel loader. */
+# ifdef __thumb__
+# define __PLT__ /* Not supported in Thumb assembler (for now). */
+# elif defined __vxworks && !defined __PIC__
+# define __PLT__ /* Not supported by the kernel loader. */
+# else
+# define __PLT__ (PLT)
+# endif
+# define TYPE(x) .type SYM(x),function
+# define SIZE(x) .size SYM(x), . - SYM(x)
+# define LSYM(x) .x
#else
-#define __PLT__ (PLT)
+# define __PLT__
+# define TYPE(x) .def SYM(x); .scl 2; .type 32; .endef
+# define SIZE(x)
+# define LSYM(x) CONCAT1 (__LPREFIX__, x)
#endif
-#define TYPE(x) .type SYM(x),function
-#define SIZE(x) .size SYM(x), . - SYM(x)
-#define LSYM(x) .x
-#else
-#define __PLT__
-#define TYPE(x)
-#define SIZE(x)
-#define LSYM(x) x
-#endif
/* Function end macros. Variants for interworking. */
@@ -162,9 +162,9 @@
.macro cfi_start start_label, end_label
#ifdef __ELF__
.pushsection .debug_frame
-LSYM(Lstart_frame):
- .4byte LSYM(Lend_cie) - LSYM(Lstart_cie) @ Length of CIE
-LSYM(Lstart_cie):
+LSYM(start_frame):
+ .4byte LSYM(end_cie) - LSYM(start_cie) @ Length of CIE
+LSYM(start_cie):
.4byte 0xffffffff @ CIE Identifier Tag
.byte 0x1 @ CIE Version
.ascii "\0" @ CIE Augmentation
@@ -176,10 +176,10 @@
.uleb128 0x0
.align 2
-LSYM(Lend_cie):
- .4byte LSYM(Lend_fde)-LSYM(Lstart_fde) @ FDE Length
-LSYM(Lstart_fde):
- .4byte LSYM(Lstart_frame) @ FDE CIE offset
+LSYM(end_cie):
+ .4byte LSYM(end_fde)-LSYM(start_fde) @ FDE Length
+LSYM(start_fde):
+ .4byte LSYM(start_frame) @ FDE CIE offset
.4byte \start_label @ FDE initial location
.4byte \end_label-\start_label @ FDE address range
.popsection
@@ -189,7 +189,7 @@
#ifdef __ELF__
.pushsection .debug_frame
.align 2
-LSYM(Lend_fde):
+LSYM(end_fde):
.popsection
\end_label:
#endif
@@ -287,14 +287,14 @@
.endm
.macro DIV_FUNC_END name
- cfi_start __\name, LSYM(Lend_div0)
-LSYM(Ldiv0):
+ cfi_start __\name, LSYM(end_div0)
+LSYM(div0):
#ifdef __thumb__
THUMB_LDIV0 \name
#else
ARM_LDIV0 \name
#endif
- cfi_end LSYM(Lend_div0)
+ cfi_end LSYM(end_div0)
FUNC_END \name
.endm
@@ -384,6 +384,7 @@
.macro FUNC_ALIAS new old
.globl SYM (__\new)
+ TYPE (__\new)
#if defined (__thumb__)
.thumb_set SYM (__\new), SYM (__\old)
#else
@@ -393,6 +394,7 @@
.macro ARM_FUNC_ALIAS new old
.globl SYM (__\new)
+ TYPE (__\new)
EQUIV SYM (__\new), SYM (__\old)
#if defined(__INTERWORKING_STUBS__)
.set SYM (_L__\new), SYM (_L__\old)
@@ -628,32 +630,32 @@
@ Load the constant 0x10000000 into our work register.
mov work, #1
lsl work, #28
-LSYM(Loop1):
+LSYM(oop1):
@ Unless the divisor is very big, shift it up in multiples of
@ four bits, since this is the amount of unwinding in the main
@ division loop. Continue shifting until the divisor is
@ larger than the dividend.
cmp divisor, work
- bhs LSYM(Lbignum)
+ bhs LSYM(bignum)
cmp divisor, dividend
- bhs LSYM(Lbignum)
+ bhs LSYM(bignum)
lsl divisor, #4
lsl curbit, #4
- b LSYM(Loop1)
-LSYM(Lbignum):
+ b LSYM(oop1)
+LSYM(bignum):
@ Set work to 0x80000000
lsl work, #3
-LSYM(Loop2):
+LSYM(oop2):
@ For very big divisors, we must shift it a bit at a time, or
@ we will be in danger of overflowing.
cmp divisor, work
- bhs LSYM(Loop3)
+ bhs LSYM(oop3)
cmp divisor, dividend
- bhs LSYM(Loop3)
+ bhs LSYM(oop3)
lsl divisor, #1
lsl curbit, #1
- b LSYM(Loop2)
-LSYM(Loop3):
+ b LSYM(oop2)
+LSYM(oop3):
@ Test for possible subtractions ...
.if \modulo
@ ... On the final pass, this may subtract too much from the dividend,
@@ -661,79 +663,79 @@
@ afterwards.
mov overdone, #0
cmp dividend, divisor
- blo LSYM(Lover1)
+ blo LSYM(over1)
sub dividend, dividend, divisor
-LSYM(Lover1):
+LSYM(over1):
lsr work, divisor, #1
cmp dividend, work
- blo LSYM(Lover2)
+ blo LSYM(over2)
sub dividend, dividend, work
mov ip, curbit
mov work, #1
ror curbit, work
orr overdone, curbit
mov curbit, ip
-LSYM(Lover2):
+LSYM(over2):
lsr work, divisor, #2
cmp dividend, work
- blo LSYM(Lover3)
+ blo LSYM(over3)
sub dividend, dividend, work
mov ip, curbit
mov work, #2
ror curbit, work
orr overdone, curbit
mov curbit, ip
-LSYM(Lover3):
+LSYM(over3):
lsr work, divisor, #3
cmp dividend, work
- blo LSYM(Lover4)
+ blo LSYM(over4)
sub dividend, dividend, work
mov ip, curbit
mov work, #3
ror curbit, work
orr overdone, curbit
mov curbit, ip
-LSYM(Lover4):
+LSYM(over4):
mov ip, curbit
.else
@ ... and note which bits are done in the result. On the final pass,
@ this may subtract too much from the dividend, but the result will be ok,
@ since the "bit" will have been shifted out at the bottom.
cmp dividend, divisor
- blo LSYM(Lover1)
+ blo LSYM(over1)
sub dividend, dividend, divisor
orr result, result, curbit
-LSYM(Lover1):
+LSYM(over1):
lsr work, divisor, #1
cmp dividend, work
- blo LSYM(Lover2)
+ blo LSYM(over2)
sub dividend, dividend, work
lsr work, curbit, #1
orr result, work
-LSYM(Lover2):
+LSYM(over2):
lsr work, divisor, #2
cmp dividend, work
- blo LSYM(Lover3)
+ blo LSYM(over3)
sub dividend, dividend, work
lsr work, curbit, #2
orr result, work
-LSYM(Lover3):
+LSYM(over3):
lsr work, divisor, #3
cmp dividend, work
- blo LSYM(Lover4)
+ blo LSYM(over4)
sub dividend, dividend, work
lsr work, curbit, #3
orr result, work
-LSYM(Lover4):
+LSYM(over4):
.endif
cmp dividend, #0 @ Early termination?
- beq LSYM(Lover5)
+ beq LSYM(over5)
lsr curbit, #4 @ No, any more bits to do?
- beq LSYM(Lover5)
+ beq LSYM(over5)
lsr divisor, #4
- b LSYM(Loop3)
-LSYM(Lover5):
+ b LSYM(oop3)
+LSYM(over5):
.if \modulo
@ Any subtractions that we should not have done will be recorded in
@ the top three bits of "overdone". Exactly which were not needed
@@ -741,7 +743,7 @@
mov work, #0xe
lsl work, #28
and overdone, work
- beq LSYM(Lgot_result)
+ beq LSYM(got_result)
@ If we terminated early, because dividend became zero, then the
@ bit in ip will not be in the bottom nibble, and we should not
@@ -752,33 +754,33 @@
mov curbit, ip
mov work, #0x7
tst curbit, work
- beq LSYM(Lgot_result)
+ beq LSYM(got_result)
mov curbit, ip
mov work, #3
ror curbit, work
tst overdone, curbit
- beq LSYM(Lover6)
+ beq LSYM(over6)
lsr work, divisor, #3
add dividend, work
-LSYM(Lover6):
+LSYM(over6):
mov curbit, ip
mov work, #2
ror curbit, work
tst overdone, curbit
- beq LSYM(Lover7)
+ beq LSYM(over7)
lsr work, divisor, #2
add dividend, work
-LSYM(Lover7):
+LSYM(over7):
mov curbit, ip
mov work, #1
ror curbit, work
tst overdone, curbit
- beq LSYM(Lgot_result)
+ beq LSYM(got_result)
lsr work, divisor, #1
add dividend, work
.endif
-LSYM(Lgot_result):
+LSYM(got_result):
.endm
/* ------------------------------------------------------------------------ */
/* Start of the Real Functions */
@@ -791,13 +793,13 @@
#ifdef __thumb__
cmp divisor, #0
- beq LSYM(Ldiv0)
+ beq LSYM(div0)
mov curbit, #1
mov result, #0
push { work }
cmp dividend, divisor
- blo LSYM(Lgot_result)
+ blo LSYM(got_result)
THUMB_DIV_MOD_BODY 0
@@ -809,7 +811,7 @@
subs r2, r1, #1
RETc(eq)
- bcc LSYM(Ldiv0)
+ bcc LSYM(div0)
cmp r0, r1
bls 11f
tst r1, r2
@@ -860,13 +862,13 @@
#ifdef __thumb__
cmp divisor, #0
- beq LSYM(Ldiv0)
+ beq LSYM(div0)
mov curbit, #1
cmp dividend, divisor
- bhs LSYM(Lover10)
+ bhs LSYM(over10)
RET
-LSYM(Lover10):
+LSYM(over10):
push { work }
THUMB_DIV_MOD_BODY 1
@@ -877,7 +879,7 @@
#else /* ARM version. */
subs r2, r1, #1 @ compare divisor with 1
- bcc LSYM(Ldiv0)
+ bcc LSYM(div0)
cmpne r0, r1 @ compare dividend with divisor
moveq r0, #0
tsthi r1, r2 @ see if divisor is power of 2
@@ -901,7 +903,7 @@
#ifdef __thumb__
cmp divisor, #0
- beq LSYM(Ldiv0)
+ beq LSYM(div0)
push { work }
mov work, dividend
@@ -910,24 +912,24 @@
mov curbit, #1
mov result, #0
cmp divisor, #0
- bpl LSYM(Lover10)
+ bpl LSYM(over10)
neg divisor, divisor @ Loops below use unsigned.
-LSYM(Lover10):
+LSYM(over10):
cmp dividend, #0
- bpl LSYM(Lover11)
+ bpl LSYM(over11)
neg dividend, dividend
-LSYM(Lover11):
+LSYM(over11):
cmp dividend, divisor
- blo LSYM(Lgot_result)
+ blo LSYM(got_result)
THUMB_DIV_MOD_BODY 0
mov r0, result
mov work, ip
cmp work, #0
- bpl LSYM(Lover12)
+ bpl LSYM(over12)
neg r0, r0
-LSYM(Lover12):
+LSYM(over12):
pop { work }
RET
@@ -935,7 +937,7 @@
cmp r1, #0
eor ip, r0, r1 @ save th...
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