[Capstone-users] Wrong detailed instruction info for ARM BL

[Der R. <der...@ya...>]

Hi,
this is the first time I'm using a mailing list, please forgive me when I'm doing something wrong.
I noticed when disassembling an ARM mode "BL <label>" instr, the detailed instr info in cs_insn->detailis wrong.cs_insn->detail->regs_read_count is 0x01 and regs_read[0] is 0x0c, which is ARM_REG_SP in enum arm_reg defined in arm.h.However, the expected result should be like this I guess:cs_insn->detail->regs_read_count should be 0x01   and regs_read[0] should be ARM_REG_PC (which is 0x0B in the arm_reg enum)."BL" is branch with link. Which means SP (= stack pointer) isn't involved at all.In addition, regs_write_count is 0x01, but it should be 0x02. ARM_REG_PC is missing in regs_write (ofc the program counter gets updated on jumps).

I wonder why nobody has noticed this bug... you even have it on your website! In the tutorials, e.g. http://www.capstone-engine.org/lang_c.html
0x1000:	bl	#-0x4c			// insn-name: BL
		Implicit registers read:  sp
Capstone is pretty new to me, I'm "using" it since today now... Thus, I don't know where to look in the source code to find and patch this bug.
Regards,-derrek