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[Can-svn] SF.net SVN: can: [853] trunk/firmware/arm
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From: <ak...@us...> - 2008-02-17 21:22:58
|
Revision: 853
http://can.svn.sourceforge.net/can/?rev=853&view=rev
Author: akhe
Date: 2008-02-17 13:22:52 -0800 (Sun, 17 Feb 2008)
Log Message:
-----------
Fixed IAR CANTEST sample that compiled with 5.11
Modified Paths:
--------------
trunk/firmware/arm/str/cantest_str73x_gcc/project/Makefile
trunk/firmware/arm/str/cantest_str73x_gcc/project/cantest.pnproj
trunk/firmware/arm/str/cantest_str73x_gcc/project/main.c
trunk/firmware/arm/str/cantest_str73x_iar/73x_conf.h
trunk/firmware/arm/str/cantest_str73x_iar/73x_it.c
trunk/firmware/arm/str/cantest_str73x_iar/Readme.txt
trunk/firmware/arm/str/cantest_str73x_iar/Startup/73x_init.s
trunk/firmware/arm/str/cantest_str73x_iar/Startup/73x_vect.s
trunk/firmware/arm/str/cantest_str73x_iar/cantest.dep
trunk/firmware/arm/str/cantest_str73x_iar/cantest.ewd
trunk/firmware/arm/str/cantest_str73x_iar/cantest.ewp
trunk/firmware/arm/str/cantest_str73x_iar/main.c
trunk/firmware/arm/str/cantest_str75x_gcc/project/main.c
trunk/firmware/arm/str/common/73x_lcd.c
trunk/firmware/arm/str/common/delay.c
trunk/firmware/arm/str/common/delay.h
trunk/firmware/arm/str/common/sysTime73x.c
trunk/firmware/arm/str/vscp_node_str73x_gcc/project/Makefile
trunk/firmware/arm/str/vscp_node_str73x_gcc/project/main.c
trunk/firmware/arm/str/vscp_node_str73x_gcc/project/vscpnode.pnproj
Added Paths:
-----------
trunk/firmware/arm/lpc/Template/
trunk/firmware/arm/lpc/Template/LPC210x.h
trunk/firmware/arm/lpc/Template/Linkerscript
trunk/firmware/arm/lpc/Template/Makefile
trunk/firmware/arm/lpc/Template/Project.ppr
trunk/firmware/arm/lpc/Template/crt0.s
trunk/firmware/arm/lpc/Template/main.cpp
trunk/firmware/arm/lpc/common/
trunk/firmware/arm/lpc/common/include/
trunk/firmware/arm/lpc/common/include/LPC210x.h
trunk/firmware/arm/lpc/common/include/LPC213x.h
trunk/firmware/arm/lpc/common/include/LPC21xx.h
trunk/firmware/arm/lpc/common/include/LPC22xx.h
trunk/firmware/arm/lpc/common/include/armVIC.c
trunk/firmware/arm/lpc/common/include/armVIC.h
trunk/firmware/arm/lpc/common/include/lpcADC.h
trunk/firmware/arm/lpc/common/include/lpcEMC.h
trunk/firmware/arm/lpc/common/include/lpcGPIO.h
trunk/firmware/arm/lpc/common/include/lpcI2C.h
trunk/firmware/arm/lpc/common/include/lpcPIN.h
trunk/firmware/arm/lpc/common/include/lpcRTC.h
trunk/firmware/arm/lpc/common/include/lpcSCB.h
trunk/firmware/arm/lpc/common/include/lpcSPI.h
trunk/firmware/arm/lpc/common/include/lpcTMR.h
trunk/firmware/arm/lpc/common/include/lpcUART.h
trunk/firmware/arm/lpc/common/include/lpcVIC.h
trunk/firmware/arm/lpc/common/include/lpcWD.h
trunk/firmware/arm/str/cantest_str73x_iar/73x_lcd.c
trunk/firmware/arm/str/cantest_str73x_iar/73x_lcd.h
trunk/firmware/arm/str/cantest_str73x_iar/linker/STR73x_FLASH.icf
trunk/firmware/arm/str/cantest_str73x_iar/linker/STR73x_RAM.icf
trunk/firmware/arm/str/common/sysTime.h
Removed Paths:
-------------
trunk/firmware/arm/common/LPC21xx.h
trunk/firmware/arm/common/Template/
trunk/firmware/arm/common/include/philips/
trunk/firmware/arm/str/cantest_str73x_iar/linker/lnkarm_flash.xcl
trunk/firmware/arm/str/cantest_str73x_iar/linker/lnkarm_ram.xcl
trunk/firmware/arm/str/common/sysTime73x.h
trunk/firmware/arm/str/common/sysTime75x.h
Property Changed:
----------------
trunk/firmware/arm/str/cantest_str73x_gcc/project/
trunk/firmware/arm/str/cantest_str75x_gcc/project/
trunk/firmware/arm/str/vscp_node_str73x_gcc/project/
Deleted: trunk/firmware/arm/common/LPC21xx.h
===================================================================
--- trunk/firmware/arm/common/LPC21xx.h 2008-02-17 16:44:13 UTC (rev 852)
+++ trunk/firmware/arm/common/LPC21xx.h 2008-02-17 21:22:52 UTC (rev 853)
@@ -1,244 +0,0 @@
-#ifndef _LPC21XX_H_
-#define _LPC21XX_H_
-
-//-- Flash accelerator
-#define rMAMCR (*(volatile unsigned int *) 0xE01FC000)
-#define rMAMTIM (*(volatile unsigned int *) 0xE01FC004)
-
-
-//-- Watchdog Timer (32 bit data bus)
-#define rWDMOD (*(volatile unsigned int *) 0xE0000000)
-#define rWDTC (*(volatile unsigned int *) 0xE0000004)
-#define rWDFEED (*(volatile unsigned int *) 0xE0000008)
-#define rWDTV (*(volatile unsigned int *) 0xE000000C)
-
-//-- Timer 0 (32 bit data bus)
-#define rTIMER0_IR (*(volatile unsigned int *) 0xE0004000) // intr reg
-#define rTIMER0_TCR (*(volatile unsigned int *) 0xE0004004) // ctrl
-#define rTIMER0_TC (*(volatile unsigned int *) 0xE0004008) // counter
-#define rTIMER0_PR (*(volatile unsigned int *) 0xE000400C) // prescale reg
-#define rTIMER0_PC (*(volatile unsigned int *) 0xE0004010) // prescale cnt
-#define rTIMER0_MCR (*(volatile unsigned int *) 0xE0004014) // match ctrl
-#define rTIMER0_MR0 (*(volatile unsigned int *) 0xE0004018) // match reg0
-#define rTIMER0_MR1 (*(volatile unsigned int *) 0xE000401C) // match reg1
-#define rTIMER0_MR2 (*(volatile unsigned int *) 0xE0004020) // match reg2
-#define rTIMER0_MR3 (*(volatile unsigned int *) 0xE0004024) // match reg3
-#define rTIMER0_CCR (*(volatile unsigned int *) 0xE0004028) // capt ctrl
-#define rTIMER0_CR0 (*(volatile unsigned int *) 0xE000402C) // capt reg0
-#define rTIMER0_CR1 (*(volatile unsigned int *) 0xE0004030) // capt reg1
-#define rTIMER0_CR2 (*(volatile unsigned int *) 0xE0004034) // capt reg2
-#define rTIMER0_CR3 (*(volatile unsigned int *) 0xE0004038) // capt reg3
-#define rTIMER0_EMR (*(volatile unsigned int *) 0xE000403C) // ext match reg
-
-//-- Timer 1 (32 bit data bus)
-#define rTIMER1_IR (*(volatile unsigned int *) 0xE0008000) // Interrupt register
-#define rTIMER1_TCR (*(volatile unsigned int *) 0xE0008004) // Timer Control register
-#define rTIMER1_TC (*(volatile unsigned int *) 0xE0008008) // Timer Counter
-#define rTIMER1_PR (*(volatile unsigned int *) 0xE000800C) // Prescale register
-#define rTIMER1_PC (*(volatile unsigned int *) 0xE0008010) // Prescale Counter
-#define rTIMER1_MCR (*(volatile unsigned int *) 0xE0008014) // Match Control register
-#define rTIMER1_MR0 (*(volatile unsigned int *) 0xE0008018) // Match reg0
-#define rTIMER1_MR1 (*(volatile unsigned int *) 0xE000801C) // Match reg1
-#define rTIMER1_MR2 (*(volatile unsigned int *) 0xE0008020) // Match reg2
-#define rTIMER1_MR3 (*(volatile unsigned int *) 0xE0008024) // Match reg3
-#define rTIMER1_CCR (*(volatile unsigned int *) 0xE0008028) // Capture Control register
-#define rTIMER1_CR0 (*(volatile unsigned int *) 0xE000802C) // Capt reg0
-#define rTIMER1_CR1 (*(volatile unsigned int *) 0xE0008030) // Capt reg1
-#define rTIMER1_CR2 (*(volatile unsigned int *) 0xE0008034) // Capt reg2
-#define rTIMER1_CR3 (*(volatile unsigned int *) 0xE0008038) // Capt reg3
-#define rTIMER1_EMR (*(volatile unsigned int *) 0xE000803C) // External Match register
-
-//-- UART0 (8 bit data bus)
-#define rUART0_RBR (*(volatile unsigned int *) 0xE000C000) // receive buffer-RO
-#define rUART0_THR (*(volatile unsigned int *) 0xE000C000) // transmit hold buffer-WO
-#define rUART0_IER (*(volatile unsigned int *) 0xE000C004) // interrupt enable
-#define rUART0_IIR (*(volatile unsigned int *) 0xE000C008) // interrupt id-RO
-#define rUART0_FCR (*(volatile unsigned int *) 0xE000C008) // fifo control-WO
-#define rUART0_LCR (*(volatile unsigned int *) 0xE000C00C) // line control
-#define rUART0_LSR (*(volatile unsigned int *) 0xE000C014) // line status-RO
-#define rUART0_SCR (*(volatile unsigned int *) 0xE000C01C) // scratchpad
-#define rUART0_DLL (*(volatile unsigned int *) 0xE000C000) // divisor latch LSB
-#define rUART0_DLM (*(volatile unsigned int *) 0xE000C004) // divisor latch MSB
-
-//-- UART1 (8 bit data bus)
-#define rUART1_RBR (*(volatile unsigned int *) 0xE0010000) // receive buffer-RO
-#define rUART1_THR (*(volatile unsigned int *) 0xE0010000) // transmit hold buffer-WO
-#define rUART1_IER (*(volatile unsigned int *) 0xE0010004) // interrupt enable
-#define rUART1_IIR (*(volatile unsigned int *) 0xE0010008) // interrupt id-RO
-#define rUART1_FCR (*(volatile unsigned int *) 0xE0010008) // fifo control-WO
-#define rUART1_LCR (*(volatile unsigned int *) 0xE001000C) // line control
-#define rUART1_MCR (*(volatile unsigned int *) 0xE0010010) // modem control
-#define rUART1_LSR (*(volatile unsigned int *) 0xE0010014) // line status-RO
-#define rUART1_MSR (*(volatile unsigned int *) 0xE0010018) // modem status-RO
-#define rUART1_SCR (*(volatile unsigned int *) 0xE001001C) // scratchpad
-#define rUART1_DLL (*(volatile unsigned int *) 0xE0010000) // divisor latch LSB
-#define rUART1_DLM (*(volatile unsigned int *) 0xE0010004) // divisor latch MSB
-
-//-- PWM0 (32 bit data bus)
-#define rPWM0_IR (*(volatile unsigned int *) 0xE0014000) // intr reg
-#define rPWM0_TCR (*(volatile unsigned int *) 0xE0014004) // timer ctrl
-#define rPWM0_TC (*(volatile unsigned int *) 0xE0014008) // timer counter
-#define rPWM0_PR (*(volatile unsigned int *) 0xE001400C) // prescale reg
-#define rPWM0_PC (*(volatile unsigned int *) 0xE0014010) // prescale count
-#define rPWM0_MCR (*(volatile unsigned int *) 0xE0014014) // match ctrl reg
-#define rPWM0_MR0 (*(volatile unsigned int *) 0xE0014018) // match reg0
-#define rPWM0_MR1 (*(volatile unsigned int *) 0xE001401C) // match reg1
-#define rPWM0_MR2 (*(volatile unsigned int *) 0xE0014020) // match reg2
-#define rPWM0_MR3 (*(volatile unsigned int *) 0xE0014024) // match reg3
-#define rPWM0_CCR (*(volatile unsigned int *) 0xE0014028) // capt ctrl
-#define rPWM0_CR0 (*(volatile unsigned int *) 0xE001402C) // capt reg0
-#define rPWM0_CR1 (*(volatile unsigned int *) 0xE0014030) // capt reg1
-#define rPWM0_CR2 (*(volatile unsigned int *) 0xE0014034) // capt reg2
-#define rPWM0_CR3 (*(volatile unsigned int *) 0xE0014038) // capt reg3
-#define rPWM0_EMR (*(volatile unsigned int *) 0xE001403C) // ext match reg
-#define rPWM0_MR4 (*(volatile unsigned int *) 0xE0014040) // match reg4
-#define rPWM0_MR5 (*(volatile unsigned int *) 0xE0014044) // match reg5
-#define rPWM0_MR6 (*(volatile unsigned int *) 0xE0014048) // match reg6
-#define rPWM0_PCR (*(volatile unsigned int *) 0xE001404C) // pwm ctrl reg
-#define rPWM0_LER (*(volatile unsigned int *) 0xE0014050) // latch enable reg
-
-//-- PWM1 (32 bit data bus) -- addresses reserved
-//-- from base + 0x18000 to 0xE00018050
-//-- I2C (8/16 bit data bus)
-
-#define rI2C_I2CONSET (*(volatile unsigned int *) 0xE001C000) // ctrl set reg
-#define rI2C_I2STAT (*(volatile unsigned int *) 0xE001C004) // status reg-RO
-#define rI2C_I2DAT (*(volatile unsigned int *) 0xE001C008) // data reg
-#define rI2C_I2ADR (*(volatile unsigned int *) 0xE001C00C) // addr reg
-#define rI2C_I2SCLH (*(volatile unsigned int *) 0xE001C010) // scl dutycycle hi
-#define rI2C_I2SCLL (*(volatile unsigned int *) 0xE001C014) // scl dutycycle lo
-#define rI2C_I2CONCLR (*(volatile unsigned int *) 0xE001C018) // ctrl clr reg
-
-//-- SPI (8 bit data bus) (spec shows 0xE0020000 - 0xE0023FFF)
-#define rSPI_SPCR (*(volatile unsigned int *) 0xE0020000) // Control Register
-#define rSPI_SPSR (*(volatile unsigned int *) 0xE0020004) // Status Register
-#define rSPI_SPDR (*(volatile unsigned int *) 0xE0020008) // Data Register
-#define rSPI_SPCCR (*(volatile unsigned int *) 0xE002000C) // Clock Counter Register
-#define rSPI_SPTCR (*(volatile unsigned int *) 0xE0020010) // Test Control Register
-#define rSPI_SPTSR (*(volatile unsigned int *) 0xE0020014) // Test Status Register
-#define rSPI_SPTOR (*(volatile unsigned int *) 0xE0020018) // Test Observe Register
-#define rSPI_SPINT (*(volatile unsigned int *) 0xE002001C) // SPI interrupt flag
-
-//-- RTC (32 bit data bus)
-#define rRTC_ILR (*(volatile unsigned int *) 0xE0024000) // Interrupt Location Register
-#define rRTC_CTC (*(volatile unsigned int *) 0xE0024004) // Clock Tick Counter
-#define rRTC_CCR (*(volatile unsigned int *) 0xE0024008) // Clock Register
-#define rRTC_CIIR (*(volatile unsigned int *) 0xE002400C) // Clock Increment Interrupt Register
-#define rRTC_AMR (*(volatile unsigned int *) 0xE0024010) // Alarm Mask Register
-#define rRTC_CTIME0 (*(volatile unsigned int *) 0xE0024014) // Consolidated Timer Register 0
-#define rRTC_CTIME1 (*(volatile unsigned int *) 0xE0024018) // Consolidated Timer Register 1
-#define rRTC_CTIME2 (*(volatile unsigned int *) 0xE002401C) // Consolidated Timer Register 2
-#define rRTC_SEC (*(volatile unsigned int *) 0xE0024020) // Seconds value
-#define rRTC_MIN (*(volatile unsigned int *) 0xE0024024) // Minutes value
-#define rRTC_HOUR (*(volatile unsigned int *) 0xE0024028) // Hours value
-#define rRTC_DAY_OF_MONTH (*(volatile unsigned int *) 0xE002402C) // Day of month value
-#define rRTC_DAY_OF_WEEK (*(volatile unsigned int *) 0xE0024030) // Day of week value
-#define rRTC_DAY_OF_YEAR (*(volatile unsigned int *) 0xE0024034) // Day of year value
-#define rRTC_MONTH (*(volatile unsigned int *) 0xE0024038) // Month value
-#define rRTC_YEAR (*(volatile unsigned int *) 0xE002403C) // Year value
-#define rRTC_ALSEC (*(volatile unsigned int *) 0xE0024060) // Alarm value for seconds
-#define rRTC_ALMIN (*(volatile unsigned int *) 0xE0024064) // Alarm value for minutes
-#define rRTC_ALHOUR (*(volatile unsigned int *) 0xE0024068) // Alarm value for hours
-#define rRTC_ALDOM (*(volatile unsigned int *) 0xE002406C) // Alarm value for day of month
-#define rRTC_ALDOW (*(volatile unsigned int *) 0xE0024070) // Alarm value for day of week
-#define rRTC_ALDOY (*(volatile unsigned int *) 0xE0024074) // Alarm value for day of year
-#define rRTC_ALMON (*(volatile unsigned int *) 0xE0024078) // Alarm value for months
-#define rRTC_ALYEAR (*(volatile unsigned int *) 0xE002407C) // Alarm value for years
-#define rRTC_PREINT (*(volatile unsigned int *) 0xE0024080) // Prescale value, integer portion
-#define rRTC_PREFRAC (*(volatile unsigned int *) 0xE0024084) // Prescale value, fractional portion
-
-
-//-- General Pupupose IO (GPIO) (32 bit data bus)
-#define rGPIO_IOPIN (*(volatile unsigned int *) 0xE0028000) // GPIO Pin value reg
-#define rGPIO_IOSET (*(volatile unsigned int *) 0xE0028004) // GPIO Output set reg
-#define rGPIO_IODIR (*(volatile unsigned int *) 0xE0028008) // GPIO Direction cntrl reg
-#define rGPIO_IOCLR (*(volatile unsigned int *) 0xE002800C) // GPIO Output clear reg
-
-//-- Pin Connect Block (PCB) (32 bit data bus)
-#define rPCB_PINSEL0 (*(volatile unsigned int *) 0xE002C000) // pin function sel reg 0
-#define rPCB_PINSEL1 (*(volatile unsigned int *) 0xE002C004) // pin function sel reg 1
-
-//-- System Control Block (32 bit data bus)
-#define rSYSCON_EXTINT (*(volatile unsigned int *) 0xE01FC140)
-#define rSYSCON_EXTWAKE (*(volatile unsigned int *) 0xE01FC144)
-#define rSYSCON_MEMMAP (*(volatile unsigned int *) 0xE01FC040)
-#define rSYSCON_PLLCON (*(volatile unsigned int *) 0xE01FC080)
-#define rSYSCON_PLLCFG (*(volatile unsigned int *) 0xE01FC084)
-#define rSYSCON_PLLSTAT (*(volatile unsigned int *) 0xE01FC088)
-#define rSYSCON_PLLFEED (*(volatile unsigned int *) 0xE01FC08C)
-#define rSYSCON_PCON (*(volatile unsigned int *) 0xE01FC0C0)
-#define rSYSCON_PCONP (*(volatile unsigned int *) 0xE01FC0C4)
-#define rSYSCON_VPBDIV (*(volatile unsigned int *) 0xE01FC100)
-
-//-- PERIPHERAL SLOTS #11 thru #125 are unimplemented
-
-
-//-- FLASHIF (32 bit data bus)
-
-
-//------- VIC REGISTERS ----------
-
-#define VICIRQStatus (*(volatile unsigned int *) 0xFFFFF000)
-#define VICFIQStatus (*(volatile unsigned int *) 0xFFFFF004)
-#define VICRawIntr (*(volatile unsigned int *) 0xFFFFF008)
-#define VICIntSelect (*(volatile unsigned int *) 0xFFFFF00C)
-#define VICIntEnable (*(volatile unsigned int *) 0xFFFFF010)
-#define VICIntEnClear (*(volatile unsigned int *) 0xFFFFF014)
-#define VICSoftInt (*(volatile unsigned int *) 0xFFFFF018)
-#define VICSoftIntClear (*(volatile unsigned int *) 0xFFFFF01C)
-#define VICProtection (*(volatile unsigned int *) 0xFFFFF020)
-#define VICVectAddr (*(volatile unsigned int *) 0xFFFFF030)
-#define VICDefVectAddr (*(volatile unsigned int *) 0xFFFFF034)
-
-#define VICVectAddr0 (*(volatile unsigned int *) 0xFFFFF100)
-#define VICVectAddr1 (*(volatile unsigned int *) 0xFFFFF104)
-#define VICVectAddr2 (*(volatile unsigned int *) 0xFFFFF108)
-#define VICVectAddr3 (*(volatile unsigned int *) 0xFFFFF10C)
-#define VICVectAddr4 (*(volatile unsigned int *) 0xFFFFF110)
-#define VICVectAddr5 (*(volatile unsigned int *) 0xFFFFF114)
-#define VICVectAddr6 (*(volatile unsigned int *) 0xFFFFF118)
-#define VICVectAddr7 (*(volatile unsigned int *) 0xFFFFF11C)
-#define VICVectAddr8 (*(volatile unsigned int *) 0xFFFFF120)
-#define VICVectAddr9 (*(volatile unsigned int *) 0xFFFFF124)
-#define VICVectAddr10 (*(volatile unsigned int *) 0xFFFFF128)
-#define VICVectAddr11 (*(volatile unsigned int *) 0xFFFFF12C)
-#define VICVectAddr12 (*(volatile unsigned int *) 0xFFFFF130)
-#define VICVectAddr13 (*(volatile unsigned int *) 0xFFFFF134)
-#define VICVectAddr14 (*(volatile unsigned int *) 0xFFFFF138)
-#define VICVectAddr15 (*(volatile unsigned int *) 0xFFFFF13C)
-
-#define VICVectCntl0 (*(volatile unsigned int *) 0xFFFFF200)
-#define VICVectCntl1 (*(volatile unsigned int *) 0xFFFFF204)
-#define VICVectCntl2 (*(volatile unsigned int *) 0xFFFFF208)
-#define VICVectCntl3 (*(volatile unsigned int *) 0xFFFFF20C)
-#define VICVectCntl4 (*(volatile unsigned int *) 0xFFFFF210)
-#define VICVectCntl5 (*(volatile unsigned int *) 0xFFFFF214)
-#define VICVectCntl6 (*(volatile unsigned int *) 0xFFFFF218)
-#define VICVectCntl7 (*(volatile unsigned int *) 0xFFFFF21C)
-#define VICVectCntl8 (*(volatile unsigned int *) 0xFFFFF220)
-#define VICVectCntl9 (*(volatile unsigned int *) 0xFFFFF224)
-#define VICVectCntl10 (*(volatile unsigned int *) 0xFFFFF228)
-#define VICVectCntl11 (*(volatile unsigned int *) 0xFFFFF22C)
-#define VICVectCntl12 (*(volatile unsigned int *) 0xFFFFF230)
-#define VICVectCntl13 (*(volatile unsigned int *) 0xFFFFF234)
-#define VICVectCntl14 (*(volatile unsigned int *) 0xFFFFF238)
-#define VICVectCntl15 (*(volatile unsigned int *) 0xFFFFF23C)
-
-
-#define VICITCR (*(volatile unsigned int *) 0xFFFFF300)
-#define VICITIP1 (*(volatile unsigned int *) 0xFFFFF304)
-#define VICITIP2 (*(volatile unsigned int *) 0xFFFFF308)
-#define VICITOP1 (*(volatile unsigned int *) 0xFFFFF30C)
-#define VICITOP2 (*(volatile unsigned int *) 0xFFFFF310)
-
-#define VICPeriphID0 (*(volatile unsigned int *) 0xFFFFFFE0)
-#define VICPeriphID1 (*(volatile unsigned int *) 0xFFFFFFE4)
-#define VICPeriphID2 (*(volatile unsigned int *) 0xFFFFFFE8)
-#define VICPeriphID3 (*(volatile unsigned int *) 0xFFFFFFEC)
-
-#define VICPCellID0 (*(volatile unsigned int *) 0xFFFFFFF0)
-#define VICPCellID1 (*(volatile unsigned int *) 0xFFFFFFF4)
-#define VICPCellID2 (*(volatile unsigned int *) 0xFFFFFFF8)
-#define VICPCellID3 (*(volatile unsigned int *) 0xFFFFFFFC)
-
-#endif
Added: trunk/firmware/arm/lpc/Template/LPC210x.h
===================================================================
--- trunk/firmware/arm/lpc/Template/LPC210x.h (rev 0)
+++ trunk/firmware/arm/lpc/Template/LPC210x.h 2008-02-17 21:22:52 UTC (rev 853)
@@ -0,0 +1,230 @@
+/***********************************************************************/
+/* This file is not part of the uVision/ARM development tools anymore */
+/* so screw that Copyright KEIL ELEKTRONIK GmbH 2002-2004 */
+/***********************************************************************/
+/* */
+/* LPC210X.H: Header file for Philips LPC2104 / LPC2105 / LPC2106 */
+/* */
+/***********************************************************************/
+
+#ifndef __LPC210x_H
+#define __LPC210x_H
+
+/* Vectored Interrupt Controller (VIC) */
+#define VICIRQStatus (*((volatile unsigned long *) 0xFFFFF000))
+#define VICFIQStatus (*((volatile unsigned long *) 0xFFFFF004))
+#define VICRawIntr (*((volatile unsigned long *) 0xFFFFF008))
+#define VICIntSelect (*((volatile unsigned long *) 0xFFFFF00C))
+#define VICIntEnable (*((volatile unsigned long *) 0xFFFFF010))
+#define VICIntEnClr (*((volatile unsigned long *) 0xFFFFF014))
+#define VICSoftInt (*((volatile unsigned long *) 0xFFFFF018))
+#define VICSoftIntClr (*((volatile unsigned long *) 0xFFFFF01C))
+#define VICProtection (*((volatile unsigned long *) 0xFFFFF020))
+#define VICVectAddr (*((volatile unsigned long *) 0xFFFFF030))
+#define VICDefVectAddr (*((volatile unsigned long *) 0xFFFFF034))
+#define VICVectAddr0 (*((volatile unsigned long *) 0xFFFFF100))
+#define VICVectAddr1 (*((volatile unsigned long *) 0xFFFFF104))
+#define VICVectAddr2 (*((volatile unsigned long *) 0xFFFFF108))
+#define VICVectAddr3 (*((volatile unsigned long *) 0xFFFFF10C))
+#define VICVectAddr4 (*((volatile unsigned long *) 0xFFFFF110))
+#define VICVectAddr5 (*((volatile unsigned long *) 0xFFFFF114))
+#define VICVectAddr6 (*((volatile unsigned long *) 0xFFFFF118))
+#define VICVectAddr7 (*((volatile unsigned long *) 0xFFFFF11C))
+#define VICVectAddr8 (*((volatile unsigned long *) 0xFFFFF120))
+#define VICVectAddr9 (*((volatile unsigned long *) 0xFFFFF124))
+#define VICVectAddr10 (*((volatile unsigned long *) 0xFFFFF128))
+#define VICVectAddr11 (*((volatile unsigned long *) 0xFFFFF12C))
+#define VICVectAddr12 (*((volatile unsigned long *) 0xFFFFF130))
+#define VICVectAddr13 (*((volatile unsigned long *) 0xFFFFF134))
+#define VICVectAddr14 (*((volatile unsigned long *) 0xFFFFF138))
+#define VICVectAddr15 (*((volatile unsigned long *) 0xFFFFF13C))
+#define VICVectCntl0 (*((volatile unsigned long *) 0xFFFFF200))
+#define VICVectCntl1 (*((volatile unsigned long *) 0xFFFFF204))
+#define VICVectCntl2 (*((volatile unsigned long *) 0xFFFFF208))
+#define VICVectCntl3 (*((volatile unsigned long *) 0xFFFFF20C))
+#define VICVectCntl4 (*((volatile unsigned long *) 0xFFFFF210))
+#define VICVectCntl5 (*((volatile unsigned long *) 0xFFFFF214))
+#define VICVectCntl6 (*((volatile unsigned long *) 0xFFFFF218))
+#define VICVectCntl7 (*((volatile unsigned long *) 0xFFFFF21C))
+#define VICVectCntl8 (*((volatile unsigned long *) 0xFFFFF220))
+#define VICVectCntl9 (*((volatile unsigned long *) 0xFFFFF224))
+#define VICVectCntl10 (*((volatile unsigned long *) 0xFFFFF228))
+#define VICVectCntl11 (*((volatile unsigned long *) 0xFFFFF22C))
+#define VICVectCntl12 (*((volatile unsigned long *) 0xFFFFF230))
+#define VICVectCntl13 (*((volatile unsigned long *) 0xFFFFF234))
+#define VICVectCntl14 (*((volatile unsigned long *) 0xFFFFF238))
+#define VICVectCntl15 (*((volatile unsigned long *) 0xFFFFF23C))
+
+/* Pin Connect Block */
+#define PINSEL0 (*((volatile unsigned long *) 0xE002C000))
+#define PINSEL1 (*((volatile unsigned long *) 0xE002C004))
+
+/* General Purpose Input/Output (GPIO) */
+#define IOPIN (*((volatile unsigned long *) 0xE0028000))
+#define IOSET (*((volatile unsigned long *) 0xE0028004))
+#define IODIR (*((volatile unsigned long *) 0xE0028008))
+#define IOCLR (*((volatile unsigned long *) 0xE002800C))
+
+/* Memory Accelerator Module (MAM) */
+#define MAMCR (*((volatile unsigned char *) 0xE01FC000))
+#define MAMTIM (*((volatile unsigned char *) 0xE01FC004))
+#define MEMMAP (*((volatile unsigned char *) 0xE01FC040))
+
+/* Phase Locked Loop (PLL) */
+#define PLLCON (*((volatile unsigned char *) 0xE01FC080))
+#define PLLCFG (*((volatile unsigned char *) 0xE01FC084))
+#define PLLSTAT (*((volatile unsigned short*) 0xE01FC088))
+#define PLLFEED (*((volatile unsigned char *) 0xE01FC08C))
+
+/* VPB Divider */
+#define VPBDIV (*((volatile unsigned char *) 0xE01FC100))
+
+/* Power Control */
+#define PCON (*((volatile unsigned char *) 0xE01FC0C0))
+#define PCONP (*((volatile unsigned long *) 0xE01FC0C4))
+
+/* External Interrupts */
+#define EXTINT (*((volatile unsigned char *) 0xE01FC140))
+#define EXTWAKE (*((volatile unsigned char *) 0xE01FC144))
+
+/* Timer 0 */
+#define T0IR (*((volatile unsigned long *) 0xE0004000))
+#define T0TCR (*((volatile unsigned long *) 0xE0004004))
+#define T0TC (*((volatile unsigned long *) 0xE0004008))
+#define T0PR (*((volatile unsigned long *) 0xE000400C))
+#define T0PC (*((volatile unsigned long *) 0xE0004010))
+#define T0MCR (*((volatile unsigned long *) 0xE0004014))
+#define T0MR0 (*((volatile unsigned long *) 0xE0004018))
+#define T0MR1 (*((volatile unsigned long *) 0xE000401C))
+#define T0MR2 (*((volatile unsigned long *) 0xE0004020))
+#define T0MR3 (*((volatile unsigned long *) 0xE0004024))
+#define T0CCR (*((volatile unsigned long *) 0xE0004028))
+#define T0CR0 (*((volatile unsigned long *) 0xE000402C))
+#define T0CR1 (*((volatile unsigned long *) 0xE0004030))
+#define T0CR2 (*((volatile unsigned long *) 0xE0004034))
+#define T0CR3 (*((volatile unsigned long *) 0xE0004038))
+#define T0EMR (*((volatile unsigned long *) 0xE000403C))
+
+/* Timer 1 */
+#define T1IR (*((volatile unsigned long *) 0xE0008000))
+#define T1TCR (*((volatile unsigned long *) 0xE0008004))
+#define T1TC (*((volatile unsigned long *) 0xE0008008))
+#define T1PR (*((volatile unsigned long *) 0xE000800C))
+#define T1PC (*((volatile unsigned long *) 0xE0008010))
+#define T1MCR (*((volatile unsigned long *) 0xE0008014))
+#define T1MR0 (*((volatile unsigned long *) 0xE0008018))
+#define T1MR1 (*((volatile unsigned long *) 0xE000801C))
+#define T1MR2 (*((volatile unsigned long *) 0xE0008020))
+#define T1MR3 (*((volatile unsigned long *) 0xE0008024))
+#define T1CCR (*((volatile unsigned long *) 0xE0008028))
+#define T1CR0 (*((volatile unsigned long *) 0xE000802C))
+#define T1CR1 (*((volatile unsigned long *) 0xE0008030))
+#define T1CR2 (*((volatile unsigned long *) 0xE0008034))
+#define T1CR3 (*((volatile unsigned long *) 0xE0008038))
+#define T1EMR (*((volatile unsigned long *) 0xE000803C))
+
+/* Pulse Width Modulator (PWM) */
+#define PWMIR (*((volatile unsigned long *) 0xE0014000))
+#define PWMTCR (*((volatile unsigned long *) 0xE0014004))
+#define PWMTC (*((volatile unsigned long *) 0xE0014008))
+#define PWMPR (*((volatile unsigned long *) 0xE001400C))
+#define PWMPC (*((volatile unsigned long *) 0xE0014010))
+#define PWMMCR (*((volatile unsigned long *) 0xE0014014))
+#define PWMMR0 (*((volatile unsigned long *) 0xE0014018))
+#define PWMMR1 (*((volatile unsigned long *) 0xE001401C))
+#define PWMMR2 (*((volatile unsigned long *) 0xE0014020))
+#define PWMMR3 (*((volatile unsigned long *) 0xE0014024))
+#define PWMMR4 (*((volatile unsigned long *) 0xE0014040))
+#define PWMMR5 (*((volatile unsigned long *) 0xE0014044))
+#define PWMMR6 (*((volatile unsigned long *) 0xE0014048))
+#define PWMCCR (*((volatile unsigned long *) 0xE0014028))
+#define PWMCR0 (*((volatile unsigned long *) 0xE001402C))
+#define PWMCR1 (*((volatile unsigned long *) 0xE0014030))
+#define PWMCR2 (*((volatile unsigned long *) 0xE0014034))
+#define PWMCR3 (*((volatile unsigned long *) 0xE0014038))
+#define PWMEMR (*((volatile unsigned long *) 0xE001403C))
+#define PWMPCR (*((volatile unsigned long *) 0xE001404C))
+#define PWMLER (*((volatile unsigned long *) 0xE0014050))
+
+/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
+#define U0RBR (*((volatile unsigned char *) 0xE000C000))
+#define U0THR (*((volatile unsigned char *) 0xE000C000))
+#define U0IER (*((volatile unsigned char *) 0xE000C004))
+#define U0IIR (*((volatile unsigned char *) 0xE000C008))
+#define U0FCR (*((volatile unsigned char *) 0xE000C008))
+#define U0LCR (*((volatile unsigned char *) 0xE000C00C))
+#define U0MCR (*((volatile unsigned char *) 0xE000C010))
+#define U0LSR (*((volatile unsigned char *) 0xE000C014))
+#define U0MSR (*((volatile unsigned char *) 0xE000C018))
+#define U0SCR (*((volatile unsigned char *) 0xE000C01C))
+#define U0DLL (*((volatile unsigned char *) 0xE000C000))
+#define U0DLM (*((volatile unsigned char *) 0xE000C004))
+
+/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
+#define U1RBR (*((volatile unsigned char *) 0xE0010000))
+#define U1THR (*((volatile unsigned char *) 0xE0010000))
+#define U1IER (*((volatile unsigned char *) 0xE0010004))
+#define U1IIR (*((volatile unsigned char *) 0xE0010008))
+#define U1FCR (*((volatile unsigned char *) 0xE0010008))
+#define U1LCR (*((volatile unsigned char *) 0xE001000C))
+#define U1MCR (*((volatile unsigned char *) 0xE0010010))
+#define U1LSR (*((volatile unsigned char *) 0xE0010014))
+#define U1MSR (*((volatile unsigned char *) 0xE0010018))
+#define U1SCR (*((volatile unsigned char *) 0xE001001C))
+#define U1DLL (*((volatile unsigned char *) 0xE0010000))
+#define U1DLM (*((volatile unsigned char *) 0xE0010004))
+
+/* I2C Interface */
+#define I2CONSET (*((volatile unsigned char *) 0xE001C000))
+#define I2STAT (*((volatile unsigned char *) 0xE001C004))
+#define I2DAT (*((volatile unsigned char *) 0xE001C008))
+#define I2ADR (*((volatile unsigned char *) 0xE001C00C))
+#define I2SCLH (*((volatile unsigned short*) 0xE001C010))
+#define I2SCLL (*((volatile unsigned short*) 0xE001C014))
+#define I2CONCLR (*((volatile unsigned char *) 0xE001C018))
+
+/* SPI (Serial Peripheral Interface) */
+#define SPCR (*((volatile unsigned char *) 0xE0020000))
+#define SPSR (*((volatile unsigned char *) 0xE0020004))
+#define SPDR (*((volatile unsigned char *) 0xE0020008))
+#define SPCCR (*((volatile unsigned char *) 0xE002000C))
+#define SPTCR (*((volatile unsigned char *) 0xE0020010))
+#define SPTSR (*((volatile unsigned char *) 0xE0020014))
+#define SPTOR (*((volatile unsigned char *) 0xE0020018))
+#define SPINT (*((volatile unsigned char *) 0xE002001C))
+
+/* Real Time Clock */
+#define ILR (*((volatile unsigned char *) 0xE0024000))
+#define CTC (*((volatile unsigned short*) 0xE0024004))
+#define CCR (*((volatile unsigned char *) 0xE0024008))
+#define CIIR (*((volatile unsigned char *) 0xE002400C))
+#define AMR (*((volatile unsigned char *) 0xE0024010))
+#define CTIME0 (*((volatile unsigned long *) 0xE0024014))
+#define CTIME1 (*((volatile unsigned long *) 0xE0024018))
+#define CTIME2 (*((volatile unsigned long *) 0xE002401C))
+#define SEC (*((volatile unsigned char *) 0xE0024020))
+#define MIN (*((volatile unsigned char *) 0xE0024024))
+#define HOUR (*((volatile unsigned char *) 0xE0024028))
+#define DOM (*((volatile unsigned char *) 0xE002402C))
+#define DOW (*((volatile unsigned char *) 0xE0024030))
+#define DOY (*((volatile unsigned short*) 0xE0024034))
+#define MONTH (*((volatile unsigned char *) 0xE0024038))
+#define YEAR (*((volatile unsigned short*) 0xE002403C))
+#define ALSEC (*((volatile unsigned char *) 0xE0024060))
+#define ALMIN (*((volatile unsigned char *) 0xE0024064))
+#define ALHOUR (*((volatile unsigned char *) 0xE0024068))
+#define ALDOM (*((volatile unsigned char *) 0xE002406C))
+#define ALDOW (*((volatile unsigned char *) 0xE0024070))
+#define ALDOY (*((volatile unsigned short*) 0xE0024074))
+#define ALMON (*((volatile unsigned char *) 0xE0024078))
+#define ALYEAR (*((volatile unsigned short*) 0xE002407C))
+#define PREINT (*((volatile unsigned short*) 0xE0024080))
+#define PREFRAC (*((volatile unsigned short*) 0xE0024084))
+
+/* Watchdog */
+#define WDMOD (*((volatile unsigned char *) 0xE0000000))
+#define WDTC (*((volatile unsigned long *) 0xE0000004))
+#define WDFEED (*((volatile unsigned char *) 0xE0000008))
+#define WDTV (*((volatile unsigned long *) 0xE000000C))
+
+#endif // __LPC210x_H
Added: trunk/firmware/arm/lpc/Template/Linkerscript
===================================================================
--- trunk/firmware/arm/lpc/Template/Linkerscript (rev 0)
+++ trunk/firmware/arm/lpc/Template/Linkerscript 2008-02-17 21:22:52 UTC (rev 853)
@@ -0,0 +1,168 @@
+/*
+ * linkerscript
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+STARTUP(crt0.o)
+
+MEMORY
+{
+ ram : ORIGIN = 0x40000000, LENGTH = 64K
+ rom : ORIGIN = 0x00000000, LENGTH = 128K
+}
+
+SECTIONS
+{
+ __sp = 0x40000000 + 64K;
+
+ /* instructions */
+ .text :
+ {
+ __text_start = . ;
+
+ *(EXCLUDE_FILE (*text.iwram*) .text)
+ *(.text.*)
+ *(.stub)
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.gnu.linkonce.t*)
+ *(.glue_7 .glue_7t)
+
+ KEEP (*(.init.crt_i_begin))
+ KEEP (*(.init))
+ KEEP (*(.init.crt_end_n))
+
+ KEEP (*(.fini.crt_i_begin))
+ KEEP (*(.fini))
+ KEEP (*(.fini.crt_end_n))
+
+ . = ALIGN(4);
+ } > ram
+
+ __text_end = . ;
+
+ .vectors : AT(0)
+ {
+ __vectors_start = . ;
+ *(.vectors)
+ . = ALIGN(4);
+ } > ram
+
+ __vectors_end = . ;
+ __vectors_load_addr = LOADADDR(.vectors);
+
+ /* read-only data */
+ .rodata :
+ {
+ *(.rodata)
+ *all.rodata*(*)
+ *(.roda)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+
+ KEEP (*(.ctors.crt_i_begin))
+ KEEP (*(SORT(.ctors)))
+ KEEP (*(.ctors.crt_end_n))
+
+ KEEP (*(.dtors.crt_i_begin))
+ KEEP (*(SORT(.dtors)))
+ KEEP (*(.dtors.crt_end_n))
+
+ . = ALIGN(4);
+ } > ram
+
+ .eh_frame :
+ {
+ KEEP (*(.eh_frame))
+
+ . = ALIGN(4);
+ } > ram
+
+ .gcc_except_table :
+ {
+ *(.gcc_except_table)
+
+ . = ALIGN(4);
+ } > ram
+
+ __ro_end = . ;
+
+ /* read-write data */
+ .data :
+ {
+ __data_start = .;
+
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ CONSTRUCTORS
+
+ . = ALIGN(4);
+ } > ram
+
+ __data_end = . ;
+
+ /* read-write uninitialized reserved space */
+ .bss :
+ {
+ __bss_start = . ;
+
+ *(.bss)
+ *(.dynbss)
+ *(.gnu.linkonce.b*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ } > ram = 0
+
+ __bss_end = . ;
+
+ /* heap */
+ _end = . ;
+ __end__ = . ;
+ PROVIDE (end = _end);
+
+/*-----------------------------------*/
+
+ /* STAB debugging sections */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+
+ /* DWARF debug sections
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
Added: trunk/firmware/arm/lpc/Template/Makefile
===================================================================
--- trunk/firmware/arm/lpc/Template/Makefile (rev 0)
+++ trunk/firmware/arm/lpc/Template/Makefile 2008-02-17 21:22:52 UTC (rev 853)
@@ -0,0 +1,78 @@
+##############################################################################
+# Makefile
+#
+
+PATH := $(PATH)
+
+# Tools
+CC := arm-thumb-elf-gcc
+CPP := arm-thumb-elf-g++
+OBJCOPY := arm-thumb-elf-objcopy
+INSIGHT := arm-thumb-elf-insight
+
+# Tool locations
+PATH := /cygdrive/c/cygwin/arm/bin:$(PATH)
+
+# Project files
+PPR := $(wildcard *.ppr)
+NAME := $(basename $(PPR))
+BIN := $(NAME).bin
+ELF := $(NAME).elf
+MAP := $(NAME).map
+LNK := Linkerscript
+
+# Options
+CFLAGS := -g -pipe -Wall -mcpu=arm7tdmi -mtune=arm7tdmi -mstructure-size-boundary=32 -Wno-multichar -fno-builtin $(INCPATHS)
+LDFLAGS := -Wl,-Map,$(MAP) -T$(LNK) -nostartfiles
+
+# Extract source files from PSPad project file
+FILES := $(shell \
+ gawk " \
+ /^\t\t[^\t]/ { OK=0 } \
+ // { if (OK==1) print $0 } \
+ /^\t\t\+compile$$/ { OK=1 } \
+ " $(PPR))
+
+# Which object files should be built from the source files?
+ALL_OBJS := $(patsubst %.cpp,%.o,\
+ $(patsubst %.s,%.o,\
+ $(patsubst %.S,%.o,\
+ $(FILES))))
+
+# Which files can be cleaned?
+CLEAN += $(ALL_OBJS) $(BIN) $(ELF) $(MAP)
+
+#
+.PHONY: all
+all: $(NAME)
+
+.PHONY: $(NAME)
+$(NAME): $(ELF) #$(BIN)
+
+.PHONY: debug
+debug: $(ELF)
+ $(if $(shell pslist | grep -i OcdLib), , cmd /c start OcdLibRemote --cpu ARM7 --device WIGGLER)
+ $(INSIGHT) $(ELF)
+
+$(BIN): $(ELF)
+ $(OBJCOPY) -O binary $(ELF) $(BIN)
+
+$(ELF): $(ALL_OBJS) $(LNK)
+ $(CPP) $(CFLAGS) $(LDFLAGS) -o $@ $(filter-out %crt0.o,$(ALL_OBJS))
+
+# Common include file dependecies
+%.c:: %.h
+%.cpp:: %.h
+
+# How to make object files?
+%.o: %.c; $(CC) $(CFLAGS) -c -o $@ $<
+%.o: %.cpp; $(CPP) $(CFLAGS) -c -o $@ $<
+%.o: %.s; $(CC) $(CFLAGS) -c -o $@ $<
+%.o: %.S; $(CC) $(CFLAGS) -c -o $@ $<
+%.o: %.bin; cd $(@D); $(OBJCOPY) -I binary -O elf32-little --rename-section .data=.rodata $(<F) $(@F)
+
+# Remove output files
+.PHONY: clean
+clean:
+ -$(RM) $(CLEAN)
+
Added: trunk/firmware/arm/lpc/Template/Project.ppr
===================================================================
--- trunk/firmware/arm/lpc/Template/Project.ppr (rev 0)
+++ trunk/firmware/arm/lpc/Template/Project.ppr 2008-02-17 21:22:52 UTC (rev 853)
@@ -0,0 +1,42 @@
+[Config]
+Relative path=1
+Compilator.FileName=make
+Compilator.PSPar=
+Compilator.Log=
+Compilator.Run=
+Compilator.DefaultDir=
+Compilator.SaveAll=1
+Compilator.Capture=1
+Compilator.ParsLog=%F:%L:
+Compilator.HideOutput=1
+Prog1=
+Prog2=
+Prog3=
+Prog4=
+Prog5=
+DefaultDir=
+DefaultCPIndex=0
+LogtoEnd=1
+DontOpen=0
+FileFormat=0
+DocumentRoot=
+HTServer=
+[Project tree]
+Project
+ +Files
+ +includes
+ LPC210x.h
+ +compile
+ main.cpp
+ crt0.s
+ +others
+ Makefile
+ Project.x
+[Open project files]
+0=main.cpp
+[Selected Project Files]
+Main=crt0.s
+Selected=main.cpp
+[main.cpp]
+TopLine=1
+Caret=1,1
Added: trunk/firmware/arm/lpc/Template/crt0.s
===================================================================
--- trunk/firmware/arm/lpc/Template/crt0.s (rev 0)
+++ trunk/firmware/arm/lpc/Template/crt0.s 2008-02-17 21:22:52 UTC (rev 853)
@@ -0,0 +1,165 @@
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+@ Startup code
+@
+@ Entry point: _start
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+ .text
+ .code 32
+ .align
+
+@ ARM has 8 exception vectors
+
+ .global _start
+_start:
+ ldr pc, =ResetHandler @ reset vector
+ ldr pc, =ResetHandler @ undefined instruction
+ ldr pc, =ResetHandler @ software interrupt
+ ldr pc, =ResetHandler @ prefetch abort
+ ldr pc, =ResetHandler @ data abort
+ ldr pc, =ResetHandler @ reserved
+ ldr pc, [pc, #-0xFF0] @ IRQ. load vector from VICVectAddr
+ ldr pc, =ResetHandler @ FIQ
+
+ .pool @ The ldr instructions load the jump
+ @ addresses indirectly from a neareast pool.
+ @ Because only the first 0x40 bytes of RAM
+ @ are remapped to address 0, we have to put
+ @ it here.
+
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+@ create a variable to hold a C function pointer to be called on IRQ
+
+ .global irqVector0
+irqVector0:
+ .word 0 @ this should be set to a C function
+
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+@ IRQHandler0
+@ This handler wraps a C function to be called upon IRQ.
+@ This handler is put into VICVectAddr0 register.
+
+ .global IRQHandler0
+IRQHandler0:
+ stmfd sp!, {r0-r3,r12,lr} @ store regs that are used here and in C
+
+ mov r0, #irqVector0
+ ldr r0, [r0]
+ ldr lr, =IRQHandler0_resume
+ mov pc, r0 @ call C function
+IRQHandler0_resume:
+
+ ldr r1, =0xFFFFF030 @ VICVectAddr
+ str r0, [r1] @ update priority hardware (required!)
+
+ ldmfd sp!, {r0-r3,r12,lr}
+ subs pc, lr, #4 @ the way IRQ handler should return
+
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+@ IRQHandler1
+@ An example without any C function wrapping.
+@
+@ .global IRQHandler1
+@IRQHandler1:
+@ stmfd sp!, {r0-r3,r12,lr} @ store regs that are used here and in C
+@
+@ ldr r1, =0xE0008000 @ T1IR
+@ mov r0, #0xFF @ all flags
+@ str r0, [r1] @ clear timer 1 interrupt flags
+@
+@ ldr r1, =0xFFFFF030 @ VICVectAddr
+@ str r0, [r1] @ update priority hardware
+@
+@ ldmfd sp!, {r0-r3,r12,lr}
+@ subs pc, lr, #4 @ the way IRQ handler should return
+
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+@ __disable_interrupts
+@ Disables the interrupts
+
+ .global __disable_interrupts
+__disable_interrupts:
+ mrs r0, CPSR
+ orr r0, r0, #0xC0 @ disable IRQ/FIQ interrupts
+ msr CPSR_fsxc, r0
+ mov pc, lr
+
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+@ __enable_interrupts
+@ Enables the interrupts
+
+ .global __enable_interrupts
+__enable_interrupts:
+ mrs r0, CPSR
+ bic r0, r0, #0x80 @ enable IRQ interrupts
+ msr CPSR_fsxc, r0
+ mov pc, lr
+
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+@ The first things that need to be done
+
+ResetHandler:
+
+@
+@ Initialize stack pointers of IRQ and supervisor mode to end of RAM
+@
+
+ ldr r2, =__sp - 0x100
+ mrs r0, cpsr @ Original PSR value
+ bic r0, r0, #0x1F @ Clear the mode bits
+ orr r0, r0, #0x12 @ Set IRQ mode bits
+ msr cpsr_c, r0 @ Change the mode
+ mov sp, r2
+
+ sub r2, r2, #0x100
+ bic r0, r0, #0x1F @ Clear the mode bits
+ orr r0, r0, #0x13 @ Set Supervisor mode bits
+ msr cpsr_c, r0 @ Change the mode
+ mov sp, r2
+
+@
+@ Initialize interrupts
+@
+
+ ldr r0, =0xE01FC040 @ MEMMAP
+ mov r1, #2 @ remap interrupt vectors to SRAM
+ str r1, [r0]
+
+ @ldr r0, =IRQHandler @ set default IRQ handler
+ @ldr r1, =0xFFFFF034 @ VICDefVectAddr
+ @str r0, [r1]
+
+ ldr r0, =IRQHandler0 @ set first IRQ handler
+ ldr r1, =0xFFFFF100 @ VICVectAddr0
+ str r0, [r1]
+
+@
+@ Clear BSS (non-initialized variables)
+@
+
+ mov r0, #0
+ mov r1, #__data_end
+ mov r2, #__bss_end
+ClearBSSLoop:
+ cmps r1, r2
+ beq ClearBSSLoopDone @ check if we're done yet
+ str r0, [r1], #4 @ fill zero's
+ b ClearBSSLoop
+ClearBSSLoopDone:
+
+@
+@ Jump to user code
+@
+
+ b main @ assume we're not going to return
+
+@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+ .end
+
Added: trunk/firmware/arm/lpc/Template/main.cpp
===================================================================
--- trunk/firmware/arm/lpc/Template/main.cpp (rev 0)
+++ trunk/firmware/arm/lpc/Template/main.cpp 2008-02-17 21:22:52 UTC (rev 853)
@@ -0,0 +1,118 @@
+/******************************************************************************\
+ main.cpp
+\******************************************************************************/
+
+/******************************************************************************\
+ Include files
+\******************************************************************************/
+#include "LPC210x.h"
+
+/******************************************************************************\
+ Initialize timer 1
+\******************************************************************************/
+
+typedef void (*IRQ)();
+//IRQ *VICVectAddr = (IRQ *)&VICVectAddr0; // non-wrapped IRQ vectors
+#define VICVectCntl (((volatile unsigned long *) 0xFFFFF200)) // array
+
+extern IRQ &irqVector0; // wrapped IRQ vector
+
+extern "C" void __enable_interrupts();
+extern "C" void __disable_interrupts();
+extern "C" void IRQHandler();
+
+/******************************************************************************\
+ MyTimerInterrupt
+\******************************************************************************/
+extern "C" void MyTimerInterrupt()
+{
+ // toggle LED
+ static int led = 1;
+ led = !led;
+ if (led) IOSET = 1<<10; else IOCLR = 1<<10; // blink
+
+ // prepare for next interrupt
+ T1IR = 0xFF; // clear interrupt flags
+}
+
+/******************************************************************************\
+ Initialize timer 1
+ (interrupt source 5)
+\******************************************************************************/
+void InitTimer()
+{
+ __disable_interrupts();
+
+ // Initialise timer1
+ T1TCR = 0; // stop and reset counter and prescaler
+ //T1TC = 0; // reset timer counter (again)
+ T1PC = 2/*div by 2*/ - 1; // prescale counter
+ //T1PR = 0; // reset timer prescaler value (again)
+ //PLLCFG; // default divider is 1. multiplier is 1.
+ //VPBDIV = 0; // VPB bus runs at 1/4 of cpu clk (default)
+ T1MR0 = 6000000 / 4/*VPBDIV*/; // max counter value
+ T1MCR = 1<<1 | 1<<0; // reset and interrupt on match
+ T1IR = 0xFF; // clear interrupt flags
+
+ // Initialise VIC
+ VICIntSelect &=~ (1<<5); // select IRQ mode instead of FIQ
+ VICVectCntl[0] = 0x20/*enable*/ | 5/*timer 1*/;
+ irqVector0 = MyTimerInterrupt; // wrapped interrupt vector
+ VICIntEnable = 1<<5; // enable interrupt source
+
+ T1TCR = 1<<0; // start
+
+ VICVectAddr = 0xFF; // update priority hardware
+
+ __enable_interrupts();
+}
+
+/******************************************************************************\
+ main
+\******************************************************************************/
+extern "C" int main()
+{
+ /*
+ * Init GPIO
+ */
+ PINSEL0 &=~ 3<<20; // P0.10 = GPIO
+ IODIR |= 1<<10; // P0.10 = output
+ IOCLR = 1<<10; // on (inverted LED)
+ IOSET = 1<<10; // off (inverted LED)
+
+ /*
+ * Init timer
+ */
+ InitTimer();
+
+ /*
+ * Main loop
+ */
+ while (1)
+ {
+ // example of some inline assembly...
+ asm
+ (
+ "ldr r0, =0xFFFFF000 \n" // VICIRQStatus
+ "ldr r1,[r0] \n"
+
+ "ldr r0, =0xFFFFF200 \n" // VICVectCntl0
+ "ldr r2,[r0] \n"
+
+ "ldr r0, =0xFFFFF008 \n" // VICRawIntr
+ "ldr r3,[r0] \n"
+
+ "ldr r0, =0xE0008000\n" // T1IR
+ "ldr r4,[r0] \n"
+
+ "ldr r0, =0xE0008008\n" // T1TC
+ "ldr r5,[r0] \n"
+
+ "ldr r0, =0xE0008018\n" // T1MR0
+ "ldr r6,[r0] \n"
+ );
+ }
+
+ return 0; // don't ever come near this
+}
+
Added: trunk/firmware/arm/lpc/common/include/LPC210x.h
===================================================================
--- trunk/firmware/arm/lpc/common/include/LPC210x.h (rev 0)
+++ trunk/firmware/arm/lpc/common/include/LPC210x.h 2008-02-17 21:22:52 UTC (rev 853)
@@ -0,0 +1,230 @@
+/***********************************************************************/
+/* This file is part of the uVision/ARM development tools */
+/* Copyright KEIL ELEKTRONIK GmbH 2002-2004 */
+/***********************************************************************/
+/* */
+/* LPC210X.H: Header file for Philips LPC2104 / LPC2105 / LPC2106 */
+/* */
+/***********************************************************************/
+
+#ifndef __LPC210x_H
+#define __LPC210x_H
+
+/* Vectored Interrupt Controller (VIC) */
+#define VICIRQStatus (*((volatile unsigned long *) 0xFFFFF000))
+#define VICFIQStatus (*((volatile unsigned long *) 0xFFFFF004))
+#define VICRawIntr (*((volatile unsigned long *) 0xFFFFF008))
+#define VICIntSelect (*((volatile unsigned long *) 0xFFFFF00C))
+#define VICIntEnable (*((volatile unsigned long *) 0xFFFFF010))
+#define VICIntEnClr (*((volatile unsigned long *) 0xFFFFF014))
+#define VICSoftInt (*((volatile unsigned long *) 0xFFFFF018))
+#define VICSoftIntClr (*((volatile unsigned long *) 0xFFFFF01C))
+#define VICProtection (*((volatile unsigned long *) 0xFFFFF020))
+#define VICVectAddr (*((volatile unsigned long *) 0xFFFFF030))
+#define VICDefVectAddr (*((volatile unsigned long *) 0xFFFFF034))
+#define VICVectAddr0 (*((volatile unsigned long *) 0xFFFFF100))
+#define VICVectAddr1 (*((volatile unsigned long *) 0xFFFFF104))
+#define VICVectAddr2 (*((volatile unsigned long *) 0xFFFFF108))
+#define VICVectAddr3 (*((volatile unsigned long *) 0xFFFFF10C))
+#define VICVectAddr4 (*((volatile unsigned long *) 0xFFFFF110))
+#define VICVectAddr5 (*((volatile unsigned long *) 0xFFFFF114))
+#define VICVectAddr6 (*((volatile unsigned long *) 0xFFFFF118))
+#define VICVectAddr7 (*((volatile unsigned long *) 0xFFFFF11C))
+#define VICVectAddr8 (*((volatile unsigned long *) 0xFFFFF120))
+#define VICVectAddr9 (*((volatile unsigned long *) 0xFFFFF124))
+#define VICVectAddr10 (*((volatile unsigned long *) 0xFFFFF128))
+#define VICVectAddr11 (*((volatile unsigned long *) 0xFFFFF12C))
+#define VICVectAddr12 (*((volatile unsigned long *) 0xFFFFF130))
+#define VICVectAddr13 (*((volatile unsigned long *) 0xFFFFF134))
+#define VICVectAddr14 (*((volatile unsigned long *) 0xFFFFF138))
+#define VICVectAddr15 (*((volatile unsigned long *) 0xFFFFF13C))
+#define VICVectCntl0 (*((volatile unsigned long *) 0xFFFFF200))
+#define VICVectCntl1 (*((volatile unsigned long *) 0xFFFFF204))
+#define VICVectCntl2 (*((volatile unsigned long *) 0xFFFFF208))
+#define VICVectCntl3 (*((volatile unsigned long *) 0xFFFFF20C))
+#define VICVectCntl4 (*((volatile unsigned long *) 0xFFFFF210))
+#define VICVectCntl5 (*((volatile unsigned long *) 0xFFFFF214))
+#define VICVectCntl6 (*((volatile unsigned long *) 0xFFFFF218))
+#define VICVectCntl7 (*((volatile unsigned long *) 0xFFFFF21C))
+#define VICVectCntl8 (*((volatile unsigned long *) 0xFFFFF220))
+#define VICVectCntl9 (*((volatile unsigned long *) 0xFFFFF224))
+#define VICVectCntl10 (*((volatile unsigned long *) 0xFFFFF228))
+#define VICVectCntl11 (*((volatile unsigned long *) 0xFFFFF22C))
+#define VICVectCntl12 (*((volatile unsigned long *) 0xFFFFF230))
+#define VICVectCntl13 (*((volatile unsigned long *) 0xFFFFF234))
+#define VICVectCntl14 (*((volatile unsigned long *) 0xFFFFF238))
+#define VICVectCntl15 (*((volatile unsigned long *) 0xFFFFF23C))
+
+/* Pin Connect Block */
+#define PINSEL0 (*((volatile unsigned long *) 0xE002C000))
+#define PINSEL1 (*((volatile unsigned long *) 0xE002C004))
+
+/* General Purpose Input/Output (GPIO) */
+#define IOPIN (*((volatile unsigned long *) 0xE0028000))
+#define IOSET (*((volatile unsigned long *) 0xE0028004))
+#define IODIR (*((volatile unsigned long *) 0xE0028008))
+#define IOCLR (*((volatile unsigned long *) 0xE002800C))
+
+/* Memory Accelerator Module (MAM) */
+#define MAMCR (*((volatile unsigned char *) 0xE01FC000))
+#define MAMTIM (*((volatile unsigned char *) 0xE01FC004))
+#define MEMMAP (*((volatile unsigned char *) 0xE01FC040))
+
+/* Phase Locked Loop (PLL) */
+#define PLLCON (*((volatile unsigned char *) 0xE01FC080))
+#define PLLCFG (*((volatile unsigned char *) 0xE01FC084))
+#define PLLSTAT (*((volatile unsigned short*) 0xE01FC088))
+#define PLLFEED (*((volatile unsigned char *) 0xE01FC08C))
+
+/* VPB Divider */
+#define VPBDIV (*((volatile unsigned char *) 0xE01FC100))
+
+/* Power Control */
+#define PCON (*((volatile unsigned char *) 0xE01FC0C0))
+#define PCONP (*((volatile unsigned long *) 0xE01FC0C4))
+
+/* External Interrupts */
+#define EXTINT (*((volatile unsigned char *) 0xE01FC140))
+#define EXTWAKE (*((volatile unsigned char *) 0xE01FC144))
+
+/* Timer 0 */
+#define T0IR (*((volatile unsigned long *) 0xE0004000))
+#define T0TCR (*((volatile unsigned long *) 0xE0004004))
+#define T0TC (*((volatile unsigned long *) 0xE0004008))
+#define T0PR (*((volatile unsigned long *) 0xE000400C))
+#define T0PC (*((volatile unsigned long *) 0xE0004010))
+#define T0MCR (*((volatile unsigned long *) 0xE0004014))
+#define T0MR0 (*((volatile unsigned long *) 0xE0004018))
+#define T0MR1 (*((volatile unsigned long *) 0xE000401C))
+#define T0MR2 (*((volatile unsigned long *) 0xE0004020))
+#define T0MR3 (*((volatile unsigned long *) 0xE0004024))
+#define T0CCR (*((volatile unsigned long *) 0xE0004028))
+#define T0CR0 (*((volatile unsigned long *) 0xE000402C))
+#define T0CR1 (*((volatile unsigned long *) 0xE0004030))
+#define T0CR2 (*((volatile unsigned long *) 0xE0004034))
+#define T0CR3 (*((volatile unsigned long *) 0xE0004038))
+#define T0EMR (*((volatile unsigned long *) 0xE000403C))
+
+/* Timer 1 */
+#define T1IR (*((volatile unsigned long *) 0xE0008000))
+#define T1TCR (*((volatile unsigned long *) 0xE0008004))
+#define T1TC (*((volatile unsigned long *) 0xE0008008))
+#define T1PR (*((volatile unsigned long *) 0xE000800C))
+#define T1PC (*((volatile unsigned long *) 0xE0008010))
+#define T1MCR (*((volatile unsigned long *) 0xE0008014))
+#define T1MR0 (*((volatile unsigned long *) 0xE0008018))
+#define T1MR1 (*((volatile unsigned long *) 0xE000801C))
+#define T1MR2 (*((volatile unsigned long *) 0xE0008020))
+#define T1MR3 (*((volatile unsigned long *) 0xE0008024))
+#define T1CCR (*((volatile unsigned long *) 0xE0008028))
+#define T1CR0 (*((volatile unsigned long *) 0xE000802C))
+#define T1CR1 (*((volatile unsigned long *) 0xE0008030))
+#define T1CR2 (*((volatile unsigned long *) 0xE0008034))
+#define T1CR3 (*((volatile unsigned long *) 0xE0008038))
+#define T1EMR (*((volatile unsigned long *) 0xE000803C))
+
+/* Pulse Width Modulator (PWM) */
+#define PWMIR (*((volatile unsigned long *) 0xE0014000))
+#define PWMTCR (*((volatile unsigned long *) 0xE0014004))
+#define PWMTC (*((volatile unsigned long *) 0xE0014008))
+#define PWMPR (*((volatile unsigned long *) 0xE001400C))
+#define PWMPC (*((volatile unsigned long *) 0xE0014010))
+#define PWMMCR (*((volatile unsigned long *) 0xE0014014))
+#define PWMMR0 (*((volatile unsigned long *) 0xE0014018))
+#define PWMMR1 (*((volatile unsigned long *) 0xE001401C))
+#define PWMMR2 (*((volatile unsigned long *) 0xE0014020))
+#define PWMMR3 (*((volatile unsigned long *) 0xE0014024))
+#define PWMMR4 (*((volatile unsigned long *) 0xE0014040))
+#define PWMMR5 (*((volatile unsigned long *) 0xE0014044))
+#define PWMMR6 (*((volatile unsigned long *) 0xE0014048))
+#define PWMCCR (*((volatile unsigned long *) 0xE0014028))
+#define PWMCR0 (*((volatile unsigned long *) 0xE001402C))
+#define PWMCR1 (*((volatile unsigned long *) 0xE0014030))
+#define PWMCR2 (*((volatile unsigned long *) 0xE0014034))
+#define PWMCR3 (*((volatile unsigned long *) 0xE0014038))
+#define PWMEMR (*((volatile unsigned long *) 0xE001403C))
+#define PWMPCR (*((volatile unsigned long *) 0xE001404C))
+#define PWMLER (*((volatile unsigned long *) 0xE0014050))
+
+/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
+#define U0RBR (*((volatile unsigned char *) 0xE000C000))
+#define U0THR (*((volatile unsigned char *) 0xE000C000))
+#define U0IER (*((volatile unsigned char *) 0xE000C004))
+#define U0IIR (*((volatile unsigned char *) 0xE000C008))
+#define U0FCR (*((volatile unsigned char *) 0xE000C008))
+#define U0LCR (*((volatile unsigned char *) 0xE000C00C))
+#define U0MCR (*((volatile unsigned char *) 0xE000C010))
+#define U0LSR (*((volatile unsigned char *) 0xE000C014))
+#define U0MSR (*((volatile unsigned char *) 0xE000C018))
+#define U0SCR (*((volatile unsigned char *) 0xE000C01C))
+#define U0DLL (*((volatile unsigned char *) 0xE000C000))
+#define U0DLM (*((volatile unsigned char *) 0xE000C004))
+
+/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
+#define U1RBR (*((volatile unsigned char *) 0xE0010000))
+#define U1THR (*((volatile unsigned char *) 0xE0010000))
+#define U1IER (*((volatile unsigned char *) 0xE0010004))
+#define U1IIR (*((volatile unsigned char *) 0xE0010008))
+#define U1FCR (*((volatile unsigned char *) 0xE0010008))
+#define U1LCR (*((volatile unsigned char *) 0xE001000C))
+#define U1MCR (*((volatile unsigned char *) 0xE0010010))
+#define U1LSR (*((volatile unsigned char *) 0xE0010014))
+#define U1MSR (*((volatile unsigned char *) 0xE0010018))
+#define U1SCR (*((volatile unsigned char *) 0xE001001C))
+#define U1DLL (*((volatile unsigned char *) 0xE0010000))
+#define U1DLM (*((volatile unsigned char *) 0xE0010004))
+
+/* I2C Interface */
+#define I2CONSET (*((volatile unsigned char *) 0xE001C000))
+#define I2STAT (*((volatile unsigned char *) 0xE001C004))
+#define I2DAT (*((volatile unsigned char *) 0xE001C008))
+#define I2ADR (*((volatile unsigned char *) 0xE001C00C))
+#define I2SCLH (*((volatile unsigned short*) 0xE001C010))
+#define I2SCLL (*((volatile unsigned short*) 0xE001C014))
+#define I2CONCLR (*((volatile unsigned char *) 0xE001C018))
+
+/* SPI (Serial Peripheral Interface) */
+#define S0SPCR (*((volatile unsigned char *) 0xE0020000))
+#define S0SPSR (*((volatile unsigned char *) 0xE0020004))
+#define S0SPDR (*((volatile unsigned char *) 0xE0020008))
+#define S0SPCCR (*((volatile unsigned char *) 0xE002000C))
+#define S0SPTCR (*((volatile unsigned char *) 0xE0020010))
+#define S0SPTSR (*((volatile unsigned char *) 0xE0020014))
+#define S0SPTOR (*((volatile unsigned char *) 0xE0020018))
+#define S0SPINT (*((volatile unsigned char *) 0xE002001C))
+
+/* Real Time Clock */
+#define ILR (*((volatile unsigned char *) 0xE0024000))
+#define CTC (*((volatile unsigned short*) 0xE0024004))
+#define CCR (*((volatile unsigned char *) 0xE0024008))
+#define CIIR (*((volatile unsigned char *) 0xE002400C))
+#define AMR (*((volatile unsigned char *) 0xE0024010))
+#define CTIME0 (*((volatile unsigned long *) 0xE0024014))
+#define CTIME1 (*((volatile unsigned long *) 0xE0024018))
+#define CTIME2 (*((volatile unsigned long *) 0xE002401C))
+#define SEC (*((volatile unsigned char *) 0xE0024020))
+#define MI...
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