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[Can-svn] SF.net SVN: can: [810] trunk/firmware/arm/str/common
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From: <ak...@us...> - 2008-02-04 12:10:06
|
Revision: 810
http://can.svn.sourceforge.net/can/?rev=810&view=rev
Author: akhe
Date: 2008-02-04 04:09:49 -0800 (Mon, 04 Feb 2008)
Log Message:
-----------
Stteing up new common str dev structure
Added Paths:
-----------
trunk/firmware/arm/str/common/str71x_lib/
trunk/firmware/arm/str/common/str71x_lib/Makefile
trunk/firmware/arm/str/common/str71x_lib/include/
trunk/firmware/arm/str/common/str71x_lib/include/71x_conf.h
trunk/firmware/arm/str/common/str71x_lib/include/71x_it.h
trunk/firmware/arm/str/common/str71x_lib/include/71x_lib.h
trunk/firmware/arm/str/common/str71x_lib/include/71x_map.h
trunk/firmware/arm/str/common/str71x_lib/include/71x_type.h
trunk/firmware/arm/str/common/str71x_lib/include/adc12.h
trunk/firmware/arm/str/common/str71x_lib/include/apb.h
trunk/firmware/arm/str/common/str71x_lib/include/bspi.h
trunk/firmware/arm/str/common/str71x_lib/include/can.h
trunk/firmware/arm/str/common/str71x_lib/include/eic.h
trunk/firmware/arm/str/common/str71x_lib/include/emi.h
trunk/firmware/arm/str/common/str71x_lib/include/flash.h
trunk/firmware/arm/str/common/str71x_lib/include/gpio.h
trunk/firmware/arm/str/common/str71x_lib/include/i2c.h
trunk/firmware/arm/str/common/str71x_lib/include/pcu.h
trunk/firmware/arm/str/common/str71x_lib/include/rccu.h
trunk/firmware/arm/str/common/str71x_lib/include/rtc.h
trunk/firmware/arm/str/common/str71x_lib/include/tim.h
trunk/firmware/arm/str/common/str71x_lib/include/uart.h
trunk/firmware/arm/str/common/str71x_lib/include/wdg.h
trunk/firmware/arm/str/common/str71x_lib/include/xti.h
trunk/firmware/arm/str/common/str71x_lib/libSTR71x_lib.a
trunk/firmware/arm/str/common/str71x_lib/src/
trunk/firmware/arm/str/common/str71x_lib/src/71x_lib.c
trunk/firmware/arm/str/common/str71x_lib/src/adc12.c
trunk/firmware/arm/str/common/str71x_lib/src/apb.c
trunk/firmware/arm/str/common/str71x_lib/src/bspi.c
trunk/firmware/arm/str/common/str71x_lib/src/can.c
trunk/firmware/arm/str/common/str71x_lib/src/eic.c
trunk/firmware/arm/str/common/str71x_lib/src/emi.c
trunk/firmware/arm/str/common/str71x_lib/src/flash.c
trunk/firmware/arm/str/common/str71x_lib/src/gpio.c
trunk/firmware/arm/str/common/str71x_lib/src/i2c.c
trunk/firmware/arm/str/common/str71x_lib/src/pcu.c
trunk/firmware/arm/str/common/str71x_lib/src/rccu.c
trunk/firmware/arm/str/common/str71x_lib/src/rtc.c
trunk/firmware/arm/str/common/str71x_lib/src/tim.c
trunk/firmware/arm/str/common/str71x_lib/src/uart.c
trunk/firmware/arm/str/common/str71x_lib/src/wdg.c
trunk/firmware/arm/str/common/str71x_lib/src/xti.c
trunk/firmware/arm/str/common/str73x_lib/
trunk/firmware/arm/str/common/str73x_lib/Makefile
trunk/firmware/arm/str/common/str73x_lib/include/
trunk/firmware/arm/str/common/str73x_lib/include/73x_adc.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_bspi.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_can.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_cfg.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_cmu.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_conf.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_dma.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_eic.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_flash.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_gpio.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_i2c.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_lib.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_map.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_prccu.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_pwm.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_rtc.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_tb.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_tim.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_type.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_uart.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_wdg.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_wiu.h
trunk/firmware/arm/str/common/str73x_lib/include/73x_wut.h
trunk/firmware/arm/str/common/str73x_lib/libSTR73x_lib.a
trunk/firmware/arm/str/common/str73x_lib/src/
trunk/firmware/arm/str/common/str73x_lib/src/73x_adc.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_bspi.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_can.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_cfg.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_cmu.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_dma.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_eic.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_flash.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_gpio.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_i2c.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_lib.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_prccu.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_pwm.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_rtc.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_tb.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_tim.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_uart.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_wdg.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_wiu.c
trunk/firmware/arm/str/common/str73x_lib/src/73x_wut.c
trunk/firmware/arm/str/common/str75x_lib/
trunk/firmware/arm/str/common/str75x_lib/Makefile
trunk/firmware/arm/str/common/str75x_lib/include/
trunk/firmware/arm/str/common/str75x_lib/include/75x_adc.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_can.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_cfg.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_conf.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_dma.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_eic.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_extit.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_gpio.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_i2c.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_lib.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_map.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_mrcc.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_pwm.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_rtc.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_smi.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_ssp.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_tb.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_tim.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_type.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_uart.h
trunk/firmware/arm/str/common/str75x_lib/include/75x_wdg.h
trunk/firmware/arm/str/common/str75x_lib/libSTR75x_lib.a
trunk/firmware/arm/str/common/str75x_lib/src/
trunk/firmware/arm/str/common/str75x_lib/src/75x_adc.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_can.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_cfg.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_dma.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_eic.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_extit.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_gpio.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_i2c.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_lib.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_mrcc.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_pwm.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_rtc.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_smi.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_ssp.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_tb.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_tim.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_uart.c
trunk/firmware/arm/str/common/str75x_lib/src/75x_wdg.c
Added: trunk/firmware/arm/str/common/str71x_lib/Makefile
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/Makefile (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/Makefile 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,37 @@
+# efsl library Makefile for STR710 by Giacomo Fazio and Antonio Nasca
+# (based on efsl library makefile for AT91SAM7S by Martin Thomas)
+
+MCU = arm7tdmi
+#THUMB = -mthumb -mthumb-interwork
+THUMB =
+
+LIBNAME = libSTR71x_lib.a
+
+COPT= -mcpu=$(MCU) $(THUMB) -gdwarf-2 -Wall -Os
+INCLUDEDIRS=-Iinclude
+CFLAGS=$(COPT) $(INCLUDEDIRS)
+# gcc4 unused code-removal:
+CFLAGS += -ffunction-sections -fdata-sections
+
+CC=arm-elf-gcc
+AR=arm-elf-ar
+OBJCOPY=arm-elf-objcopy
+
+OBJ=src/71x_lib.o src/adc12.o src/apb.o src/bspi.o
+OBJ+=src/can.o src/eic.o src/emi.o src/flash.o src/gpio.o
+OBJ+=src/i2c.o src/pcu.o src/rccu.o src/rtc.o src/tim.o src/uart.o
+OBJ+=src/wdg.o src/xti.o
+
+
+all: lib
+
+libandclean: lib srcclean
+
+lib: $(OBJ)
+ $(AR) rcs $(LIBNAME) $(OBJ)
+
+srcclean :
+ rm -f $(OBJ)
+
+clean :
+ rm -f $(OBJ) $(LIBNAME)
Added: trunk/firmware/arm/str/common/str71x_lib/include/71x_conf.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/71x_conf.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/71x_conf.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,73 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : 71x_conf.h
+* Author : MCD Application Team
+* Date First Issued : 16/05/2003
+* Description : Library configuration for the WDG example
+********************************************************************************
+* History:
+* 24/05/05 : V3.0
+* 30/11/04 : V2.0
+* 16/05/03 : Created
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+ OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+ OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+ CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+#ifndef __71x_CONF_H
+#define __71x_CONF_H
+
+/* Comment the line below to put the library in release mode */
+//#define DEBUG
+
+#define inline static __inline
+
+//#define USE_SERIAL_PORT
+//#define USE_UART0
+
+/* Main Oscillator Frequency value = 16 Mhz */
+//#define RCCU_Main_Osc 16000000
+
+/* Comment the lines below corresponding to unwanted peripherals */
+#define _ADC12
+#define _APB
+#define _APB1
+#define _APB2
+#define _BSPI
+#define _BSPI0
+#define _BSPI1
+#define _CAN
+#define _EIC
+#define _EMI
+#define _FLASH
+#define _GPIO
+#define _GPIO0
+#define _GPIO1
+#define _GPIO2
+#define _I2C
+#define _I2C0
+#define _I2C1
+#define _PCU
+#define _RCCU
+#define _RTC
+#define _TIM
+#define _TIM0
+#define _TIM1
+#define _TIM2
+#define _TIM3
+#define _UART
+#define _UART0
+#define _UART1
+#define _UART2
+#define _UART3
+#define _USB
+#define _WDG
+#define _XTI
+#define _IRQVectors
+
+#endif /* __71x_CONF_H */
+
+
+/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/
Added: trunk/firmware/arm/str/common/str71x_lib/include/71x_it.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/71x_it.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/71x_it.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,62 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : 71x_it.h
+* Author : MCD Application Team
+* Date First Issued : 05/16/2003
+* Description : Interrupt handlers
+********************************************************************************
+* History:
+* 13/01/2006 : V3.1
+* 24/05/2005 : V3.0
+* 30/11/2004 : V2.0
+* 14/07/2004 : V1.3
+* 01/01/2004 : V1.2
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+ OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+ OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+ CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+#ifndef _71x_IT_H
+#define _71x_IT_H
+
+#include "71x_lib.h"
+
+void Undefined_Handler (void);
+void FIQ_Handler (void);
+void SWI_Handler (void);
+void Prefetch_Handler (void);
+void Abort_Handler (void);
+void T0TIMI_IRQHandler (void);
+void FLASH_IRQHandler (void);
+void RCCU_IRQHandler (void);
+void RTC_IRQHandler (void);
+void WDG_IRQHandler (void);
+void XTI_IRQHandler (void);
+void USBHP_IRQHandler (void);
+void I2C0ITERR_IRQHandler(void);
+void I2C1ITERR_IRQHandler(void);
+void UART0_IRQHandler (void);
+void UART1_IRQHandler (void);
+void UART2_IRQHandler (void);
+void UART3_IRQHandler (void);
+void BSPI0_IRQHandler (void);
+void BSPI1_IRQHandler (void);
+void I2C0_IRQHandler (void);
+void I2C1_IRQHandler (void);
+void CAN_IRQHandler (void);
+void ADC12_IRQHandler (void);
+void T1TIMI_IRQHandler (void);
+void T2TIMI_IRQHandler (void);
+void T3TIMI_IRQHandler (void);
+void HDLC_IRQHandler (void);
+void USBLP_IRQHandler (void);
+void T0TOI_IRQHandler (void);
+void T0OC1_IRQHandler (void);
+void T0OC2_IRQHandler (void);
+
+#endif /* _71x_IT_H */
+
+/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/
Added: trunk/firmware/arm/str/common/str71x_lib/include/71x_lib.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/71x_lib.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/71x_lib.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,102 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : 71x_lib.h
+* Author : MCD Application Team
+* Date First Issued : 05/16/2003
+* Description : Global include for all peripherals
+********************************************************************************
+* History:
+* 13/01/2006 : V3.1
+* 24/05/2005 : V3.0
+* 30/11/2004 : V2.0
+* 14/07/2004 : V1.3
+* 01/01/2004 : V1.2
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+ OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+ OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+ CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+#ifndef __71x_LIB_H
+#define __71x_LIB_H
+
+#include "71x_map.h"
+#include "71x_conf.h"
+
+
+#ifdef _ADC12
+ #include "adc12.h"
+#endif
+
+#ifdef _APB
+ #include "apb.h"
+#endif
+
+#ifdef _BSPI
+ #include "bspi.h"
+#endif
+
+#ifdef _CAN
+ #include "can.h"
+#endif
+
+#ifdef _EIC
+ #include "eic.h"
+#endif
+
+#ifdef _EMI
+ #include "emi.h"
+#endif
+
+#ifdef _FLASH
+ #include "flash.h"
+#endif
+
+#ifdef _GPIO
+ #include "gpio.h"
+#endif
+
+#ifdef _I2C
+ #include "i2c.h"
+#endif
+
+#ifdef _PCU
+ #include "pcu.h"
+#endif
+
+#ifdef _RCCU
+ #include "rccu.h"
+#endif
+
+#ifdef _RTC
+ #include "rtc.h"
+#endif
+
+#ifdef _TIM
+ #include "tim.h"
+#endif
+
+#ifdef _UART
+ #include "uart.h"
+#endif
+
+#ifdef _USB
+#endif
+
+#ifdef _WDG
+ #include "wdg.h"
+#endif
+
+#ifdef _XTI
+ #include "xti.h"
+#endif
+
+
+#ifdef LIBDEBUG
+ void libdebug(void);
+#endif
+
+#endif /* __71x_LIB_H */
+
+/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/
Added: trunk/firmware/arm/str/common/str71x_lib/include/71x_map.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/71x_map.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/71x_map.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,612 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : 71x_map.h
+* Author : MCD Application Team
+* Date First Issued : 05/16/2003
+* Description : Peripherals memory mapping and registers structures
+********************************************************************************
+* History:
+* 13/01/2006 : V3.1
+* 24/05/2005 : V3.0
+* 30/11/2004 : V2.0
+* 14/07/2004 : V1.3
+* 01/01/2004 : V1.2
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+ OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+ OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+ CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+#ifndef __71x_MAP_H
+#define __71x_MAP_H
+
+#ifndef EXT
+ #define EXT extern
+#endif
+
+#include "71x_conf.h"
+#include "71x_type.h"
+
+
+/* IP registers structures */
+
+typedef volatile struct
+{
+ vu16 DATA0;
+ vu16 EMPTY1[3];
+ vu16 DATA1;
+ vu16 EMPTY2[3];
+ vu16 DATA2;
+ vu16 EMPTY3[3];
+ vu16 DATA3;
+ vu16 EMPTY4[3];
+ vu16 CSR;
+ vu16 EMPTY5[7];
+ vu16 CPR;
+} ADC12_TypeDef;
+
+typedef volatile struct
+{
+ vu32 CKDIS;
+ vu32 SWRES;
+} APB_TypeDef;
+
+typedef volatile struct
+{
+ vu16 RXR;
+ vu16 EMPTY1;
+ vu16 TXR;
+ vu16 EMPTY2;
+ vu16 CSR1;
+ vu16 EMPTY3;
+ vu16 CSR2;
+ vu16 EMPTY4;
+ vu16 CLK;
+} BSPI_TypeDef;
+
+typedef volatile struct
+{
+ vu16 CRR;
+ vu16 EMPTY1;
+ vu16 CMR;
+ vu16 EMPTY2;
+ vu16 M1R;
+ vu16 EMPTY3;
+ vu16 M2R;
+ vu16 EMPTY4;
+ vu16 A1R;
+ vu16 EMPTY5;
+ vu16 A2R;
+ vu16 EMPTY6;
+ vu16 MCR;
+ vu16 EMPTY7;
+ vu16 DA1R;
+ vu16 EMPTY8;
+ vu16 DA2R;
+ vu16 EMPTY9;
+ vu16 DB1R;
+ vu16 EMPTY10;
+ vu16 DB2R;
+ vu16 EMPTY11[27];
+} CAN_MsgObj_TypeDef;
+
+typedef volatile struct
+{
+ vu16 CR;
+ vu16 EMPTY1;
+ vu16 SR;
+ vu16 EMPTY2;
+ vu16 ERR;
+ vu16 EMPTY3;
+ vu16 BTR;
+ vu16 EMPTY4;
+ vu16 IDR;
+ vu16 EMPTY5;
+ vu16 TESTR;
+ vu16 EMPTY6;
+ vu16 BRPR;
+ vu16 EMPTY7[3];
+ CAN_MsgObj_TypeDef sMsgObj[2];
+ vu16 EMPTY8[16];
+ vu16 TR1R;
+ vu16 EMPTY9;
+ vu16 TR2R;
+ vu16 EMPTY10[13];
+ vu16 ND1R;
+ vu16 EMPTY11;
+ vu16 ND2R;
+ vu16 EMPTY12[13];
+ vu16 IP1R;
+ vu16 EMPTY13;
+ vu16 IP2R;
+ vu16 EMPTY14[13];
+ vu16 MV1R;
+ vu16 EMPTY15;
+ vu16 MV2R;
+ vu16 EMPTY16;
+} CAN_TypeDef;
+
+typedef volatile struct
+{
+ vu32 ICR;
+ vu32 CICR;
+ vu32 CIPR;
+ vu32 EMPTY1[3];
+ vu32 IVR;
+ vu32 FIR;
+ vu32 IER;
+ vu32 EMPTY2[7];
+ vu32 IPR;
+ vu32 EMPTY3[7];
+ vu32 SIR[32];
+} EIC_TypeDef;
+
+typedef volatile struct
+{
+ vu16 BCON0;
+ vu16 EMPTY1;
+ vu16 BCON1;
+ vu16 EMPTY2;
+ vu16 BCON2;
+ vu16 EMPTY3;
+ vu16 BCON3;
+ vu16 EMPTY4;
+} EMI_TypeDef;
+
+typedef volatile struct
+{
+ vu32 CR0;
+ vu32 CR1;
+ vu32 DR0;
+ vu32 DR1;
+ vu32 AR;
+ vu32 ER;
+} FLASHR_TypeDef;
+
+typedef volatile struct
+{
+ vu32 NVWPAR;
+ vu32 EMPTY;
+ vu32 NVAPR0;
+ vu32 NVAPR1;
+} FLASHPR_TypeDef;
+
+typedef volatile struct
+{
+ vu16 PC0;
+ vu16 EMPTY1;
+ vu16 PC1;
+ vu16 EMPTY2;
+ vu16 PC2;
+ vu16 EMPTY3;
+ vu16 PD;
+ vu16 EMPTY4;
+} GPIO_TypeDef;
+
+typedef volatile struct
+{
+ vu8 CR;
+ vu8 EMPTY1[3];
+ vu8 SR1;
+ vu8 EMPTY2[3];
+ vu8 SR2;
+ vu8 EMPTY3[3];
+ vu8 CCR;
+ vu8 EMPTY4[3];
+ vu8 OAR1;
+ vu8 EMPTY5[3];
+ vu8 OAR2;
+ vu8 EMPTY6[3];
+ vu8 DR;
+ vu8 EMPTY7[3];
+ vu8 ECCR;
+} I2C_TypeDef;
+
+typedef volatile struct
+{
+ vu32 CCR;
+ vu32 EMPTY1;
+ vu32 CFR;
+ vu32 EMPTY2[3];
+ vu32 PLL1CR;
+ vu32 PER;
+ vu32 SMR;
+} RCCU_TypeDef;
+
+typedef volatile struct
+{
+ vu16 MDIVR;
+ vu16 EMPTY1;
+ vu16 PDIVR;
+ vu16 EMPTY2;
+ vu16 RSTR;
+ vu16 EMPTY3;
+ vu16 PLL2CR;
+ vu16 EMPTY4;
+ vu16 BOOTCR;
+ vu16 EMPTY5;
+ vu16 PWRCR;
+} PCU_TypeDef;
+
+typedef volatile struct
+{
+ vu16 CRH;
+ vu16 EMPTY1;
+ vu16 CRL;
+ vu16 EMPTY2;
+ vu16 PRLH;
+ vu16 EMPTY3;
+ vu16 PRLL;
+ vu16 EMPTY4;
+ vu16 DIVH;
+ vu16 EMPTY5;
+ vu16 DIVL;
+ vu16 EMPTY6;
+ vu16 CNTH;
+ vu16 EMPTY7;
+ vu16 CNTL;
+ vu16 EMPTY8;
+ vu16 ALRH;
+ vu16 EMPTY9;
+ vu16 ALRL;
+} RTC_TypeDef;
+
+typedef volatile struct
+{
+ vu16 ICAR;
+ vu16 EMPTY1;
+ vu16 ICBR;
+ vu16 EMPTY2;
+ vu16 OCAR;
+ vu16 EMPTY3;
+ vu16 OCBR;
+ vu16 EMPTY4;
+ vu16 CNTR;
+ vu16 EMPTY5;
+ vu16 CR1;
+ vu16 EMPTY6;
+ vu16 CR2;
+ vu16 EMPTY7;
+ vu16 SR;
+} TIM_TypeDef;
+
+typedef volatile struct
+{
+ vu16 BR;
+ vu16 EMPTY1;
+ vu16 TxBUFR;
+ vu16 EMPTY2;
+ vu16 RxBUFR;
+ vu16 EMPTY3;
+ vu16 CR;
+ vu16 EMPTY4;
+ vu16 IER;
+ vu16 EMPTY5;
+ vu16 SR;
+ vu16 EMPTY6;
+ vu16 GTR;
+ vu16 EMPTY7;
+ vu16 TOR;
+ vu16 EMPTY8;
+ vu16 TxRSTR;
+ vu16 EMPTY9;
+ vu16 RxRSTR;
+} UART_TypeDef;
+
+typedef volatile struct
+{
+ vu32 EP0R;
+ vu32 EP1R;
+ vu32 EP2R;
+ vu32 EP3R;
+ vu32 EP4R;
+ vu32 EP5R;
+ vu32 EP6R;
+ vu32 EP7R;
+ vu32 EP8R;
+ vu32 EP9R;
+ vu32 EP10R;
+ vu32 EP11R;
+ vu32 EP12R;
+ vu32 EP13R;
+ vu32 EP14R;
+ vu32 EP15R;
+ vu32 CNTR;
+ vu32 ISTR;
+ vu32 FNR;
+ vu32 DADDR;
+ vu32 BTABLE;
+} USB_TypeDef;
+
+typedef volatile struct
+{
+ vu16 CR;
+ vu16 EMPTY1;
+ vu16 PR;
+ vu16 EMPTY2;
+ vu16 VR;
+ vu16 EMPTY3;
+ vu16 CNT;
+ vu16 EMPTY4;
+ vu16 SR;
+ vu16 EMPTY5;
+ vu16 MR;
+ vu16 EMPTY6;
+ vu16 KR;
+} WDG_TypeDef;
+
+typedef volatile struct
+{
+ vu8 SR;
+ vu8 EMPTY1[7];
+ vu8 CTRL;
+ vu8 EMPTY2[3];
+ vu8 MRH;
+ vu8 EMPTY3[3];
+ vu8 MRL;
+ vu8 EMPTY4[3];
+ vu8 TRH;
+ vu8 EMPTY5[3];
+ vu8 TRL;
+ vu8 EMPTY6[3];
+ vu8 PRH;
+ vu8 EMPTY7[3];
+ vu8 PRL;
+} XTI_TypeDef;
+
+
+/* IRQ vectors */
+typedef volatile struct
+{
+ vu32 T0TIMI_IRQHandler;
+ vu32 FLASH_IRQHandler;
+ vu32 RCCU_IRQHandler;
+ vu32 RTC_IRQHandler;
+ vu32 WDG_IRQHandler;
+ vu32 XTI_IRQHandler;
+ vu32 USBHP_IRQHandler;
+ vu32 I2C0ITERR_IRQHandler;
+ vu32 I2C1ITERR_IRQHandler;
+ vu32 UART0_IRQHandler;
+ vu32 UART1_IRQHandler;
+ vu32 UART2_IRQHandler;
+ vu32 UART3_IRQHandler;
+ vu32 BSPI0_IRQHandler;
+ vu32 BSPI1_IRQHandler;
+ vu32 I2C0_IRQHandler;
+ vu32 I2C1_IRQHandler;
+ vu32 CAN_IRQHandler;
+ vu32 ADC12_IRQHandler;
+ vu32 T1TIMI_IRQHandler;
+ vu32 T2TIMI_IRQHandler;
+ vu32 T3TIMI_IRQHandler;
+ vu32 EMPTY1[3];
+ vu32 HDLC_IRQHandler;
+ vu32 USBLP_IRQHandler;
+ vu32 EMPTY2[2];
+ vu32 T0TOI_IRQHandler;
+ vu32 T0OC1_IRQHandler;
+ vu32 T0OC2_IRQHandler;
+} IRQVectors_TypeDef;
+
+/*===================================================================*/
+
+/* Memory mapping */
+
+#define RAM_BASE 0x20000000
+
+#define FLASHR_BASE 0x40100000
+#define FLASHPR_BASE 0x4010DFB0
+
+#define EXTMEM_BASE 0x60000000
+#define RCCU_BASE 0xA0000000
+#define PCU_BASE 0xA0000040
+#define APB1_BASE 0xC0000000
+#define APB2_BASE 0xE0000000
+#define EIC_BASE 0xFFFFF800
+
+#define I2C0_BASE (APB1_BASE + 0x1000)
+#define I2C1_BASE (APB1_BASE + 0x2000)
+#define UART0_BASE (APB1_BASE + 0x4000)
+#define UART1_BASE (APB1_BASE + 0x5000)
+#define UART2_BASE (APB1_BASE + 0x6000)
+#define UART3_BASE (APB1_BASE + 0x7000)
+#define CAN_BASE (APB1_BASE + 0x9000)
+#define BSPI0_BASE (APB1_BASE + 0xA000)
+#define BSPI1_BASE (APB1_BASE + 0xB000)
+#define USB_BASE (APB1_BASE + 0x8800)
+
+#define XTI_BASE (APB2_BASE + 0x101C)
+#define GPIO0_BASE (APB2_BASE + 0x3000)
+#define GPIO1_BASE (APB2_BASE + 0x4000)
+#define GPIO2_BASE (APB2_BASE + 0x5000)
+#define ADC12_BASE (APB2_BASE + 0x7000)
+#define TIM0_BASE (APB2_BASE + 0x9000)
+#define TIM1_BASE (APB2_BASE + 0xA000)
+#define TIM2_BASE (APB2_BASE + 0xB000)
+#define TIM3_BASE (APB2_BASE + 0xC000)
+#define RTC_BASE (APB2_BASE + 0xD000)
+#define WDG_BASE (APB2_BASE + 0xE000)
+
+#define EMI_BASE (EXTMEM_BASE + 0x0C000000)
+
+/*===================================================================*/
+
+/* IP data access */
+
+#ifndef LIBDEBUG
+ #define ADC12 ((ADC12_TypeDef *)ADC12_BASE)
+
+ #define APB1 ((APB_TypeDef *)(APB1_BASE+0x10))
+ #define APB2 ((APB_TypeDef *)(APB2_BASE+0x10))
+
+ #define BSPI0 ((BSPI_TypeDef *)BSPI0_BASE)
+ #define BSPI1 ((BSPI_TypeDef *)BSPI1_BASE)
+
+ #define CAN ((CAN_TypeDef *)CAN_BASE)
+
+ #define EIC ((EIC_TypeDef *)EIC_BASE)
+
+ #define EMI ((EMI_TypeDef *)EMI_BASE)
+
+ #define FLASHR ((FLASHR_TypeDef *)FLASHR_BASE)
+ #define FLASHPR ((FLASHPR_TypeDef *)FLASHPR_BASE)
+
+ #define GPIO0 ((GPIO_TypeDef *)GPIO0_BASE)
+ #define GPIO1 ((GPIO_TypeDef *)GPIO1_BASE)
+ #define GPIO2 ((GPIO_TypeDef *)GPIO2_BASE)
+
+ #define I2C0 ((I2C_TypeDef *)I2C0_BASE)
+ #define I2C1 ((I2C_TypeDef *)I2C1_BASE)
+
+ #define PCU ((PCU_TypeDef *)PCU_BASE)
+
+ #define RCCU ((RCCU_TypeDef *)RCCU_BASE)
+
+ #define RTC ((RTC_TypeDef *)RTC_BASE)
+
+ #define TIM0 ((TIM_TypeDef *)TIM0_BASE)
+ #define TIM1 ((TIM_TypeDef *)TIM1_BASE)
+ #define TIM2 ((TIM_TypeDef *)TIM2_BASE)
+ #define TIM3 ((TIM_TypeDef *)TIM3_BASE)
+
+ #define UART0 ((UART_TypeDef *)UART0_BASE)
+ #define UART1 ((UART_TypeDef *)UART1_BASE)
+ #define UART2 ((UART_TypeDef *)UART2_BASE)
+ #define UART3 ((UART_TypeDef *)UART3_BASE)
+
+ #define USB ((USB_TypeDef *)USB_BASE)
+
+ #define WDG ((WDG_TypeDef *)WDG_BASE)
+
+ #define XTI ((XTI_TypeDef *)XTI_BASE)
+
+ #define IRQVectors ((IRQVectors_TypeDef *)&T0TIMI_Addr)
+
+#else /* LIBDEBUG */
+
+ #ifdef _ADC12
+ EXT ADC12_TypeDef *ADC12;
+ #endif
+
+ #ifdef _APB
+ #ifdef _APB1
+ EXT APB_TypeDef *APB1;
+ #endif
+ #ifdef _APB2
+ EXT APB_TypeDef *APB2;
+ #endif
+ #endif
+
+ #ifdef _BSPI
+ #ifdef _BSPI0
+ EXT BSPI_TypeDef *BSPI0;
+ #endif
+ #ifdef _BSPI1
+ EXT BSPI_TypeDef *BSPI1;
+ #endif
+ #endif
+
+ #ifdef _CAN
+ EXT CAN_TypeDef *CAN;
+ #endif
+
+ #ifdef _EIC
+ EXT EIC_TypeDef *EIC;
+ #endif
+
+ #ifdef _EMI
+ EXT EMI_TypeDef *EMI;
+ #endif
+
+ #ifdef _FLASH
+ EXT FLASHR_TypeDef *FLASHR;
+ EXT FLASHPR_TypeDef *FLASHPR;
+ #endif
+
+ #ifdef _GPIO
+ #ifdef _GPIO0
+ EXT GPIO_TypeDef *GPIO0;
+ #endif
+ #ifdef _GPIO1
+ EXT GPIO_TypeDef *GPIO1;
+ #endif
+ #ifdef _GPIO2
+ EXT GPIO_TypeDef *GPIO2;
+ #endif
+ #endif
+
+ #ifdef _I2C
+ #ifdef _I2C0
+ EXT I2C_TypeDef *I2C0;
+ #endif
+ #ifdef _I2C1
+ EXT I2C_TypeDef *I2C1;
+ #endif
+ #endif
+
+ #ifdef _PCU
+ EXT PCU_TypeDef *PCU;
+ #endif
+
+ #ifdef _RCCU
+ EXT RCCU_TypeDef *RCCU;
+ #endif
+
+ #ifdef _RTC
+ EXT RTC_TypeDef *RTC;
+ #endif
+
+ #ifdef _TIM
+ #ifdef _TIM0
+ EXT TIM_TypeDef *TIM0;
+ #endif
+ #ifdef _TIM1
+ EXT TIM_TypeDef *TIM1;
+ #endif
+ #ifdef _TIM2
+ EXT TIM_TypeDef *TIM2;
+ #endif
+ #ifdef _TIM3
+ EXT TIM_TypeDef *TIM3;
+ #endif
+ #endif
+
+ #ifdef _UART
+ #ifdef _UART0
+ EXT UART_TypeDef *UART0;
+ #endif
+ #ifdef _UART1
+ EXT UART_TypeDef *UART1;
+ #endif
+ #ifdef _UART2
+ EXT UART_TypeDef *UART2;
+ #endif
+ #ifdef _UART3
+ EXT UART_TypeDef *UART3;
+ #endif
+ #endif
+
+ #ifdef _USB
+ EXT USB_TypeDef *USB;
+ #endif
+
+ #ifdef _WDG
+ EXT WDG_TypeDef *WDG;
+ #endif
+
+ #ifdef _XTI
+ EXT XTI_TypeDef *XTI;
+ #endif
+
+ #ifdef _IRQVectors
+ EXT IRQVectors_TypeDef *IRQVectors;
+ #endif
+
+#endif /* LIBDEBUG */
+
+#endif /* __71x_MAP_H */
+
+/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/
Added: trunk/firmware/arm/str/common/str71x_lib/include/71x_type.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/71x_type.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/71x_type.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,52 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : 71x_type.h
+* Author : MCD Application Team
+* Date First Issued : 05/16/2003
+* Description : Common data types
+********************************************************************************
+* History:
+* 13/01/2006 : V3.1
+* 24/05/2005 : V3.0
+* 30/11/2004 : V2.0
+* 14/07/2004 : V1.3
+* 01/01/2004 : V1.2
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+ OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+ OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+ CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+#ifndef _71x_type_H
+#define _71x_type_H
+
+typedef unsigned long u32;
+typedef unsigned short u16;
+typedef unsigned char u8;
+
+typedef signed long s32;
+typedef signed short s16;
+typedef signed char s8;
+
+typedef volatile unsigned long vu32;
+typedef volatile unsigned short vu16;
+typedef volatile unsigned char vu8;
+
+typedef volatile signed long vs32;
+typedef volatile signed short vs16;
+typedef volatile signed char vs8;
+
+/*===================================================================*/
+typedef enum { FALSE = 0, TRUE = !FALSE } bool;
+/*===================================================================*/
+typedef enum { RESET = 0, SET = !RESET } FlagStatus;
+/*===================================================================*/
+typedef enum { DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
+/*===================================================================*/
+typedef enum { INDIRECT = 0, DIRECT = !INDIRECT} RegisterAccess;
+/*===================================================================*/
+
+#endif /* _71x_type_H */
+
+/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/
Added: trunk/firmware/arm/str/common/str71x_lib/include/adc12.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/adc12.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/adc12.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,186 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : adc12.h
+* Author : MCD Application Team
+* Date First Issued : 07/31/2003
+* Description : This file contains all the functions prototypes for the
+* ADC12 software library.
+********************************************************************************
+* History:
+* 13/01/2006 : V3.1
+* 24/05/2005 : V3.0
+* 30/11/2004 : V2.0
+* 14/07/2004 : V1.3
+* 01/01/2004 : V1.2
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+ OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+ OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+ CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+#ifndef _ADC12_H
+#define _ADC12_H
+
+#include "71x_map.h"
+#include "rccu.h"
+
+/* --------------------ADC12 Conversion modes----------------------------------- */
+typedef enum
+{
+ ADC12_SINGLE,
+ ADC12_ROUND
+} ADC12_Modes;
+
+/* --------------------ADC12 Channels------------------------------------------- */
+typedef enum
+{
+ ADC12_CHANNEL0 = 0x00,
+ ADC12_CHANNEL1 = 0x10,
+ ADC12_CHANNEL2 = 0x20,
+ ADC12_CHANNEL3 = 0x30
+} ADC12_Channels;
+
+/* --------------------ADC12 control status register flag----------------------- */
+typedef enum
+{
+ ADC12_DA0 = 0x0001,
+ ADC12_DA1 = 0x0002,
+ ADC12_DA2 = 0x0004,
+ ADC12_DA3 = 0x0008,
+ ADC12_OR = 0x2000
+} ADC12_Flags;
+
+/* Masks for the update of interrupt bit for channel n */
+#define ADC12_IT0_Mask 0x0100
+#define ADC12_IT1_Mask 0x0200
+#define ADC12_IT2_Mask 0x0400
+#define ADC12_IT3_Mask 0x0800
+
+/* Mask for the update of all the interrupt bit in the CSR */
+#define ADC12_IT_Mask 0x0F00
+
+/* Mask for Selecting mode */
+#define ADC12_Mode_Mask 0x0040
+
+/* Mask for configuring the converter */
+#define ADC12_Start_Mask 0x0020
+
+/*******************************************************************************
+* Function Name : ADC12_Init
+* Description : This routine is used to intialize the ADC12 registers to
+* their reset values
+* Input : None.
+* Return : None.
+*******************************************************************************/
+void ADC12_Init(void);
+
+/*******************************************************************************
+* Function Name : ADC12_ConversionStart
+* Description : This routine is used to launch the Conversion.
+* Input : None
+* Return : None
+*******************************************************************************/
+inline void ADC12_ConversionStart (void)
+{
+ /* Set the ADCen bit of the BOOTCR register */
+ PCU->BOOTCR |= ADC12_Start_Mask;
+}
+
+/*******************************************************************************
+* Function Name : ADC12_ConversionStop
+* Description : This routine is used to disable the ADC12 cell.
+* Input : None.
+* Return : None.
+*******************************************************************************/
+inline void ADC12_ConversionStop(void)
+{
+ /* Clear the ADCen bit of the BOOTCR register */
+ PCU->BOOTCR &= ~ADC12_Start_Mask;
+}
+
+/*******************************************************************************
+* Function Name : ADC12_ModeConfig
+* Description : This routine is used to select the mode of conversion.
+* Input : ADC12_SINGLE: Single channel mode
+* ADC12_ROUND : Round robin mode
+* Return : None
+*******************************************************************************/
+inline void ADC12_ModeConfig (ADC12_Modes ConversionMode)
+{
+ /* Select the mode of conversion and update the CSR */
+ ADC12->CSR= ConversionMode == ADC12_SINGLE ? ADC12->CSR | ADC12_Mode_Mask :\
+ ADC12->CSR & ~ADC12_Mode_Mask;
+}
+
+/*******************************************************************************
+* Function Name : ADC12_PrescalerConfig
+* Description : This routine is used to configure the prescaler register.
+* Input : Adc12_clk: Sampling frequency in Hz.
+* Return : None.
+*******************************************************************************/
+void ADC12_PrescalerConfig(u32 Adc12_clk);
+
+/*******************************************************************************
+* Function Name : ADC12_ChannelSelect
+* Description : This routine is used to select the channel passed as
+* parameter to be converted.
+* Input : ADC12_Channel: channel selected to be converted it may be
+* ADC12_CHANNEL0 : select channel 0
+* ADC12_CHANNEL1 : select channel 1
+* ADC12_CHANNEL2 : select channel 2
+* ADC12_CHANNEL3 : select channel 3
+* Return : None
+*******************************************************************************/
+inline void ADC12_ChannelSelect(ADC12_Channels ADC12_Channel)
+{
+ /* Update the CSR by the value of the selected channel */
+ ADC12->CSR |= ADC12_Channel;
+}
+
+/*******************************************************************************
+* Function Name : ADC12_FlagStatus
+* Description : This routine is used to test if the flag passed in parameter is set or not
+* Input : ADC12_DA0 :Data Available on Channel 0
+* ADC12_DA1 :Data Available on Channel 1
+* ADC12_DA2 :Data Available on Channel 2
+* ADC12_DA3 :Data Available on Channel 3
+* ADC12_OR :Overrun
+* Return : SET: if the flag is set
+* RESET: if the flag is cleared
+*******************************************************************************/
+inline FlagStatus ADC12_FlagStatus (ADC12_Flags flag)
+{
+ /* Test on the flag status and return set or RESET */
+ return ADC12->CSR & flag ? SET : RESET;
+}
+
+/*******************************************************************************
+* Function Name : ADC12_ConversionValue
+* Description : Read the conversion result from the data register.
+* Input : ADC12_Channel :number of the register to read
+* ADC12_CHANNEL0 : read the DATA0 register
+* ADC12_CHANNEL1 : read the DATA1 register
+* ADC12_CHANNEL2 : read the DATA2 register
+* ADC12_CHANNEL3 : read the DATA3 register
+* Return : the register value of the channel converted
+*******************************************************************************/
+inline u16 ADC12_ConversionValue( ADC12_Channels ADC12_Channel)
+{
+ /* Clear the corespondent DA bit */
+ ADC12->CSR &= ~(1<<(ADC12_Channel >> 4));
+
+ /* Only the 12 MSB of the DATAn Register are taken */
+ return *(u16 *)(ADC12_BASE + (ADC12_Channel >> 1)) >> 4;
+}
+
+/*******************************************************************************
+* Function Name : ADC12_ITConfig
+* Description : enable or disable the interruption
+* Input : status=ENABLE=>enable interrupt
+* status=DISABLE=>disable interrupt
+* Return : None
+*******************************************************************************/
+void ADC12_ITConfig (FunctionalState NewState);
+
+#endif /* _ADC12_H */
Added: trunk/firmware/arm/str/common/str71x_lib/include/apb.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/apb.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/apb.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,90 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : apb.h
+* Author : MCD Application Team
+* Date First Issued : 05/30/2003
+* Description : This file contains all the functions prototypes for the
+* APB bridge software library.
+********************************************************************************
+* History:
+* 13/01/2006 : V3.1
+* 24/05/2005 : V3.0
+* 30/11/2004 : V2.0
+* 14/07/2004 : V1.3
+* 01/01/2004 : V1.2
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+ OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+ OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+ CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+#ifndef __APB_H
+#define __APB_H
+
+#include "71x_map.h"
+
+/* APB1 Peripherals */
+#define I2C0_Periph 0x0000
+#define I2C1_Periph 0x0002
+#define UART0_Periph 0x0008
+#define UART1_Periph 0x0010
+#define UART2_Periph 0x0020
+#define UART3_Periph 0x0040
+#define USB_Periph 0x0080
+#define CAN_Periph 0x0100
+#define BSPI0_Periph 0x0200
+#define BSPI1_Periph 0x0400
+#define HDLC_Periph 0x2000
+
+/* APB2 Peripherals */
+#define XTI_Periph 0x0000
+#define GPIO0_Periph 0x0004
+#define GPIO1_Periph 0x0008
+#define GPIO2_Periph 0x0010
+#define ADC12_Periph 0x0040
+#define CKOUT_Periph 0x0080
+#define TIM0_Periph 0x0100
+#define TIM1_Periph 0x0200
+#define TIM2_Periph 0x0400
+#define TIM3_Periph 0x0800
+#define RTC_Periph 0x1000
+#define EIC_Periph 0x4000
+
+/*******************************************************************************
+* Function Name : APB_ClockConfig
+* Description : Enables/Disables the Clock gating for peripherals on the APB
+* bridge passed in parameters.
+* Input : APBx ( APB1 or APB2 )
+* NewState ENABLE or DISABLE
+* NewValue (u16)
+* Return : None
+*******************************************************************************/
+inline void APB_ClockConfig ( APB_TypeDef *APBx,
+ FunctionalState NewState,
+ u16 NewValue )
+{
+ if (NewState == ENABLE) APBx->CKDIS &= ~NewValue;
+ else APBx->CKDIS |= NewValue;
+}
+
+/*******************************************************************************
+* Function Name : APB_SwResetConfig
+* Description : Enables/Disables the software Reset for peripherals on the APB
+* bridge passed in parameters.
+* Input : APBx ( APB1 or APB2 )
+* NewState ENABLE or DISABLE
+* NewValue (u16)
+* Return : None
+*******************************************************************************/
+inline void APB_SwResetConfig ( APB_TypeDef *APBx,
+ FunctionalState NewState,
+ u16 NewValue )
+{
+ if (NewState == ENABLE) APBx->SWRES |= NewValue;
+ else APBx->SWRES &= ~NewValue;
+}
+
+#endif /* __APB_H */
+
+/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/
Added: trunk/firmware/arm/str/common/str71x_lib/include/bspi.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/bspi.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/bspi.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,325 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : bspi.h
+* Author : MCD Application Team
+* Date First Issued : 16/05/2003
+* Description : This file contains all the functions prototypes for the
+* BSPI software library.
+********************************************************************************
+* History:
+* 13/01/2006 : V3.1
+* 24/05/2005 : V3.0
+* 30/11/2004 : V2.0
+* 14/07/2004 : V1.3
+* 01/01/2004 : V1.2
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+ OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+ OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+ CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+#ifndef __BSPI_H
+#define __BSPI_H
+
+#include "71x_map.h"
+
+typedef enum {
+ BSPI_BERIT = 0x80,
+ BSPI_RCIT = 0x10,
+ BSPI_ALL = 0x90
+} BSPI_ITS;
+
+typedef enum {
+ BSPI_BERR = 0x004,
+ BSPI_RFNE = 0x008,
+ BSPI_RFF = 0x010,
+ BSPI_ROFL = 0x020,
+ BSPI_TFE = 0x040,
+ BSPI_TUFL = 0x080,
+ BSPI_TFF = 0x100,
+ BSPI_TFNE = 0x200
+} BSPI_Flags;
+
+typedef enum {
+ BSPI_TR_FE,
+ BSPI_TR_UFL,
+ BSPI_TR_FF,
+ BSPI_TR_DIS
+} BSPI_TR_IT_SRCS;
+
+typedef enum {
+ BSPI_RC_FNE,
+ BSPI_RC_FF,
+ BSPI_RC_DIS
+} BSPI_RC_IR_SRCS;
+
+#define BSPI_PESET_Mask 0x01
+#define BSPI_DFIFO_Mask 0xFFFE
+#define BSPI_CPHA_Mask 0x200
+#define BSPI_CPOL_Mask 0x100
+#define BSPI_BSPI0_Base 0xA000
+#define BSPI_BSPI1_Base 0xB000
+
+
+/*******************************************************************************
+* Function Name : BSPI_BSPI0Conf
+* Description : configure STR71x on BSPI0 mode.
+* Input 2 : NewState: specifies the status of the BSPI
+* : NewState value must be either ENABLE or DISABLE:
+* : ENABLE: the specified BSPI0 peripheral will be enabled.
+* : DISABLE: the specified BSPI0 peripheral will be disabled..
+* Output : SPI0 EN bit in BOOTCR.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_BSPI0Conf(FunctionalState NewState)
+{
+ if (NewState == ENABLE) PCU->BOOTCR |= 0x04; else PCU->BOOTCR &= ~0x04;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_Init
+* Description : Initializes BSPI peripheral control and registers to their default reset values.
+* Input : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Output : BSPI peripheral registers and BSPI global variables are initialized.
+* Return : None.
+*******************************************************************************/
+void BSPI_Init( BSPI_TypeDef *BSPIx);
+
+/*******************************************************************************
+* Function Name : BSPI_Enable
+* Description : Enables/disables the specified BSPI peripheral.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral to be enabled or disabled.
+* Input 2 : NewState: specifies the status of the BSPI
+* : NewState value must be either ENABLE or DISABLE:
+* : ENABLE: the specified BSPI peripheral will be enabled.
+* : DISABLE: the specified BSPI peripheral will be disabled.
+* Output : BSPE bit in BSPCSR1.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_Enable( BSPI_TypeDef *BSPIx, FunctionalState NewState)
+{
+ if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_PESET_Mask;
+ else BSPIx->CSR1 &= ~BSPI_PESET_Mask;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_MasterEnable
+* Description : Configures the BSPI as a Master or a Slave.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : NewState: specifies whether configuring BSPI as master is enabled or disabled.
+* : ENABLE: the specified BSPI will be configured as a master.
+* : DISABLE: the specified BSPI will be configured as a slave.
+* Output : MSTR bit in BSPCSR1 is modified register.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_MasterEnable(BSPI_TypeDef *BSPIx, FunctionalState NewState)
+{
+ if (NewState == ENABLE) BSPIx->CSR1 |= 0x02; else BSPIx->CSR1 &= ~0x02;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_TrItSrc.
+* Description : Configures the transmit interrupt source.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : TrItSrc: specifies the transmit interrupt source.
+* : Refer to the section \x91Transmit Interrupt Sources\x92 for more details on the
+* : allowed values of this parameter.
+* Output : TIE bit in BSPCSR2 register.
+* Return : None.
+*******************************************************************************/
+void BSPI_TrItSrc(BSPI_TypeDef *BSPIx, BSPI_TR_IT_SRCS TrItSrc);
+
+/*******************************************************************************
+* Function Name : BSPI_RcItSrc.
+* Description : Configures the receive interrupt source.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : RcItSrc: specifies the source for the receive interrupt.
+* : Refer to the section \x91Receive Interrupt Sources\x92 for more details on the
+* : allowed values of this parameter.
+* Output : RIE bit in BSPCSR1 is register.
+* Return : None.
+*******************************************************************************/
+void BSPI_RcItSrc(BSPI_TypeDef *BSPIx, BSPI_RC_IR_SRCS RcItSrc);
+
+/*******************************************************************************
+* Function Name : BSPI_TrFifoDepth
+* Description : Configures BSPI transmission FIFO number of words.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI.
+* Input 2 : TDepth:specifies the depth of the transmit FIFO.
+* Output : TFE bit in BSPCSR2 register.
+* Return : None.
+*******************************************************************************/
+void BSPI_TrFifoDepth(BSPI_TypeDef *BSPIx, u8 TDepth);
+
+/*******************************************************************************
+* Function Name : BSPI_RcFifoDepth
+* Description : Configures BSPI reception FIFO number of words.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : RDepth:specifies the depth of the receive FIFO.
+* Output : RFE bits [3:0] in BSPCSR1 register.
+* Return : None.
+*******************************************************************************/
+void BSPI_RcFifoDepth(BSPI_TypeDef *BSPIx, u8 RDepth);
+
+/*******************************************************************************
+* Function Name : BSPI_8bLEn
+* Description : Sets the word length of the receive FIFO and transmit data registers to either 8 or 16 bits.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI.
+* Input 2 : status: specifies if the word length is 8 or 16 bits.
+* : status value must be either ENABLE or DISABLE:
+* : ENABLE: to enable setting the word length to 8 bits.
+* : DISABLE: disables setting the word length to 8 bits: the wordlength will be configured to 16 bits.
+* Output : WL bits in BSPCSR1 register.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_8bLEn(BSPI_TypeDef *BSPIx, FunctionalState NewState)
+{
+ if (NewState == DISABLE) BSPIx->CSR1 |= 0x0400; else BSPIx->CSR1 &= ~0x0C00;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_ClkFEdge
+* Description : Enables capturing the first data sample on the first edge of SCK or on the second edge.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : NewState: specifies whether capturing the first data sample on the first edge of SCK is enabled or disabled.
+* : status value must be either ENABLE or DISABLE.
+* :DISABLE: to enable capturing the first data sample on the first edge of SCK.
+* : ENABLE: to enable capturing the first data sample on the second edge of SCK.
+* Output : CPHA bits in BSPCSR1 register.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_ClkFEdge(BSPI_TypeDef *BSPIx, FunctionalState NewState)
+{
+ if (NewState == ENABLE) BSPIx->CSR1 &= ~BSPI_CPHA_Mask;
+ else BSPIx->CSR1 |= BSPI_CPHA_Mask;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_ClkActiveHigh
+* Description : Configures the clock to be active high or low.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : NewState: specifies whether the clock is active high or low.
+* : status value must be ENABLE or DISABLE.
+* : ENABLE: configures the clock to be active high.
+* : DISABLE: confgures the clock to be active low.
+* Output : CPOL bits in BSPCSR1 register.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_ClkActiveHigh(BSPI_TypeDef *BSPIx, FunctionalState NewState)
+{
+ if (NewState == ENABLE) BSPIx->CSR1 &= ~BSPI_CPOL_Mask;
+ else BSPIx->CSR1 |= BSPI_CPOL_Mask;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_FifoDisable
+* Description : Configure the BSPI FIFO.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Output : DFIFO bit in BSPCSR2 register.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_FifoDisable(BSPI_TypeDef *BSPIx)
+{
+ BSPIx->CSR2 |= 0x0001;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_ClockDividerConfig
+* Description : Configure BSPI clock divider
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI.
+* Input 2 : Div: holds the value of the clock divider.
+* Output : Div [7:0] bits in BSPCLK register.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_ClockDividerConfig(BSPI_TypeDef *BSPIx, u8 Div)
+{
+ BSPIx->CLK = Div;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_FlagStatus.
+* Description : Check whether the specified BSPI Flag is set or not.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : flag: specifies the flag to see the status.
+* : Refer to the section \x91BSPI Flags\x92 for more details on the allowed values of this parameter.
+* Output : None.
+* Return : FlagStatus type
+* : SET: if the tested flag is set.
+* : RESET: if the corresponding flag is reset.
+*******************************************************************************/
+inline FlagStatus BSPI_FlagStatus(BSPI_TypeDef *BSPIx, BSPI_Flags flag)
+{
+ return (BSPIx->CSR2 & flag) != 0 ? SET : RESET;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_WordSend.
+* Description : Transmit a single Word.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : holds the word which will be transmitted.
+* Output : BSPTXR register.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_WordSend(BSPI_TypeDef *BSPIx, u16 Data)
+{
+ if ((BSPIx->CSR1 & 0x0400) == 0) Data <<= 8;
+ BSPIx->TXR = Data;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_BufferSend.
+* Description : Transmits data from a buffer.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : PtrToBuffer is an \x91u8\x92 pointer to the first word of the buffer to be transmitted.
+* Input 3 : NbOfWords parameter indicates the number of words saved in the buffer to be sent.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+void BSPI_BufferSend(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords);
+
+/*******************************************************************************
+* Function Name : BSPI_WordReceive.
+* Description : Returns the recent received word.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Output : None.
+* Return : The value of the received word.
+*******************************************************************************/
+inline u16 BSPI_WordReceive(BSPI_TypeDef *BSPIx)
+{
+ return (BSPIx->CSR1 & 0x0400) == 0 ? BSPIx->RXR >> 8 : BSPIx->RXR;
+}
+
+/*******************************************************************************
+* Function Name : BSPI_BufferReceive.
+* Description : Receives number of data words and stores them in user defined area.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : PtrToBuffer is an \x91u8\x92 pointer to the first word of the defined area to save the received buffer.
+* Input 3 : NbOfWords parameter indicates the number of words to be received in the buffer.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+void BSPI_BufferReceive(BSPI_TypeDef *BSPIx, u8 *PtrToBuffer, u8 NbOfWords);
+
+/*******************************************************************************
+* Function Name : BSPI_ItEnable.
+* Description : Enable the specified interrupt.
+* Input 1 : BSPIx where x can be 0 or 1 to select the BSPI peripheral.
+* Input 2 : BSPI_IT: specifies the BSPI interrupt.
+* : Refer to the section \x91Interrupt Enable\x92 for more details on the allowed values of this parameter..
+* Input 3 : NewState: specified whether the BSPI interrupt is enabled or disabled.
+* : status value must be either ENABLE or DISABLE.
+* : ENABLE: to enable interrupt
+* : DISABLE: to disable interrupt.
+* Output : BSPCSR1 register.
+* Return : None.
+*******************************************************************************/
+inline void BSPI_ItEnable(BSPI_TypeDef *BSPIx, BSPI_ITS BSPI_IE, FunctionalState NewState)
+{
+ if (NewState == ENABLE) BSPIx->CSR1 |= BSPI_IE; else BSPIx->CSR1 &= ~BSPI_IE;
+}
+
+#endif /* __BSPI_H */
+
+/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/
Added: trunk/firmware/arm/str/common/str71x_lib/include/can.h
===================================================================
--- trunk/firmware/arm/str/common/str71x_lib/include/can.h (rev 0)
+++ trunk/firmware/arm/str/common/str71x_lib/include/can.h 2008-02-04 12:09:49 UTC (rev 810)
@@ -0,0 +1,407 @@
+/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
+* File Name : can.h
+* Author : MCD Application Team
+* Date First Issued : 27/10/2003
+* Description : This file contains all the functions prototypes for the
+* CAN bus software library.
+********************************************************************************
+* History:
+* 13/01/2006 : V3.1
+* 24/05/2005 : V3.0
+* 30/11/2004 : V2.0
+* 14/07/2004 : V1.3
+* 01/01/2004 : V1.2
+*******************************************************************************
+ THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+ CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+ AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY...
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