Activity for c55xx_csl
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a_lityagin@TCT committed [9d1aa2]
+ATA:ATA_truncate - implements truncating at current file position
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a_lityagin@TCT committed [b21d00]
!ata: clear code
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a_lityagin@TCT committed [e418b3]
*opt:ata:speed: atawrite_write buffer copy cycle optimise
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a_lityagin@TCT committed [66a300]
+cslr:CSL_RFEXT, CSL_RFINST - register fields ext/seters
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a_lityagin@TCT committed [94e810]
import CSL3.004.002
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a_lityagin@TCT committed [438279]
*SD:MMC_selectCard - deploy MMC_WaitInitedCmd sub reduces code size
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a_lityagin@TCT committed [69cd63]
*ata:no_swap option made totaly removable and wraped by macros ATA_Sure_Swap(x)
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a_lityagin@TCT committed [446ba8]
*opt:ATAif - deploy MMC_phyAdress hides difference sd-HC cards
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a_lityagin@TCT committed [73f80c]
*i2c:i2cHandle - exposed to allow i2c functs extending
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a_lityagin@TCT committed [8ae96c]
!dma:DMA_config - fixed correct define used chanels of DMA
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a_lityagin@TCT committed [bf7ead]
*ATA:write:cache - faster write to file tail by ommit save data after EOF
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a_lityagin@TCT committed [851506]
*opt:mmcsd - massive code optimise - prefetching dmaRegs gives much code effort when not used optimisations (debug), (and even when used!)
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a_lityagin@TCT committed [d5c75a]
+SD:CmdBusyWaitCallback - this handle now used when wait STOP complete on MMC\SD.
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a_lityagin@TCT committed [05b5c3]
+SD:EndianSwap ctrl - read\write have flag ommitis possible swap (for LE mode) of databuffer.
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a_lityagin@TCT committed [288917]
+opt:mmcsd:MMC_MODEUSED_XXX - uses opmodes selection (to reduce code size)
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a_lityagin@TCT committed [e3089a]
*opt:ATA:_AtaWriteFatEntry, _AtaFindNextBrokenCluster, ATA_write - optimised code
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a_lityagin@TCT committed [3523ea]
*opt:mem:ATA:fat - _AtaReadFatEntry2, _AtaFatEntryNext desired to optimise a bit _AtaFindNextXXXCluster, atawrite_fat
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AlexRayne committed [153eca]
README.md edited online with Bitbucket
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a_lityagin@TCT committed [78ad7e]
+ATA:cache:rd - implements light rd buffer - direct to cache, that not need to copy data
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a_lityagin@TCT committed [97793d]
!cslr: too big shift warn release
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a_lityagin@TCT committed [16f492]
*sd:ataif:cache - new strategy cacheing
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a_lityagin@TCT committed [a81e72]
+ATA:MMC_flushCache - implements wrcache flush in ATAif
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a_lityagin@TCT committed [91adbc]
+ATA:_AtaPreparePhySectorWrite, _AtaLoadSectorWrite - prepares _AtaWriteBuffer from sector
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a_lityagin@TCT committed [b612af]
!SD:CmdBusyWaitCallback - removes debug links, remover useless vars
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a_lityagin@TCT committed [12b53b]
*opt:I2C - massive I2C code optimise - prefetching i2cRegs gives much code effort when not used optimisations (debug)
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a_lityagin@TCT committed [648b0e]
*ATAif: MMC_readNextNWords - cycle removes MMC_readNextWord for faster code
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a_lityagin@TCT committed [f0c1b0]
*ata:create:wipe - optimise wiping cluster cycle
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a_lityagin@TCT committed [ddac39]
!seneral:C55x5 enable - now CHIP_C5517 defines exactly if C5517 defined
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a_lityagin@TCT committed [c7b079]
*opt:mmcsd:mem - optimise words swap of endians correction
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a_lityagin@TCT committed [3d3371]
*opt:dma:mem DMA_config - deployed common CPU->DMA adress convention. acceptable DMA resources can be droped by macro csl-port.h:DMA_NO_CHx, MEM_NO_x
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a_lityagin@TCT committed [a1f295]
*opt:ATA:mem - massive code optimisations on create, fat_calc/read/write
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a_lityagin@TCT committed [5f2a36]
*opt:ATAif remove routines dublicates
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a_lityagin@TCT committed [9e7f3b]
*opt:ATA:mem - atawrite_write, close, create
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README.md edited online with Bitbucket
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a_lityagin@TCT committed [bae401]
+ATA:mem:_AtaPrepareDirEntryWrite - deploy this method to optimise code size
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a_lityagin@TCT committed [c509e8]
*ATA:speed:write sector - optmised ATA_write write of whole sector buffer - released useless copy
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